Oleksandr Tymoshenko ae0ad28d41 Do not enable data cache until later in kernel init. Stale bits in ... cache might cause erroneus behavior on early stage. Submitted by: Ian Lepore Tested on: Atmel, Marvell, and Eyxnos		2012-11-27 06:39:32 +00:00
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arm	Do not enable data cache until later in kernel init. Stale bits in	2012-11-27 06:39:32 +00:00
at91	Unbreak building a kernel with EHCI: there's no ehci_atmelarm.c.	2012-11-26 23:30:47 +00:00
broadcom/bcm2835	Fix spelling.	2012-11-25 16:19:12 +00:00
compile
conf	Add NOTES and Makefile in order to generate LINT. NOTES contains pretty	2012-11-27 01:17:50 +00:00
econa	Create a common set_stackptrs in sys/arm/machdep.c.	2012-09-22 06:41:56 +00:00
include	Don't define intr_disable and intr_restore as macros. The macros	2012-11-27 00:41:39 +00:00
lpc	Fix typo; s/ouput/output	2012-11-07 07:00:59 +00:00
mv	Allow building LINT by defining both SAMPLE_AT_RESET on the one hand	2012-11-27 01:10:58 +00:00
s3c2xx0	Create a common set_stackptrs in sys/arm/machdep.c.	2012-09-22 06:41:56 +00:00
sa11x0	Create a common set_stackptrs in sys/arm/machdep.c.	2012-09-22 06:41:56 +00:00
tegra	Merge the FDT versions of initarm.	2012-11-03 22:39:07 +00:00
ti	Fix spelling.	2012-11-25 16:19:12 +00:00
xscale	Clean up the two i80321 copies of initarm to be closer to one another.	2012-11-17 23:06:00 +00:00