77 lines
2.9 KiB
Plaintext
77 lines
2.9 KiB
Plaintext
/*-
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* Copyright (c) 2011-2014 Robert N. M. Watson
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* MIPS segment definitions.
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*/
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__mips_ckseg_cached__ = 0xffffffff80000000; /* BSD kernel here. */
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__mips64_xkphys_cached__ = 0x9800000000000000; /* Device memory here. */
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__mips64_xkphys_uncached__ = 0x9000000000000000; /* Device I/O here. */
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/*
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* Physical addresses of various peripherals.
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*/
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__cheri_flash_base__ = 0x74000000;
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__cheri_sdcard_base__ = 0x7f008000;
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/*
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* Location of boot2 in flash.
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*/
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__cheri_flash_boot_loader_base_ = 0x03fe0000;
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__cheri_flash_boot_loader_vaddr__ = __mips64_xkphys_cached__ +
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__cheri_flash_base__ + __cheri_flash_boot_loader_base_;
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/*
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* Location of boot file system in flash.
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*/
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__cheri_flash_bootfs_base__ = 0x1820000;
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__cheri_flash_bootfs_len__ = 0x27c0000;
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__cheri_flash_bootfs_vaddr__ = __mips64_xkphys_cached__ +
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__cheri_flash_base__ + __cheri_flash_bootfs_base__;
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/*
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* Location of SD card controller.
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*/
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__cheri_sdcard_vaddr__ = __mips64_xkphys_uncached__ + __cheri_sdcard_base__;
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/*
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* Location where the production kernel gets put. This must agree with other
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* definitions, such as in the kernel's own linker script.
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*
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* (As it happens, in the short run, we also place boot2 here, as Miniboot
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* expects to find an ELF binary there -- but that will change.)
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*/
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__kernel_base__ = 0x100000;
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__kernel_vaddr__ = __mips64_xkphys_cached__ + __kernel_base__;
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OUTPUT_ARCH(mips)
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