19d3b47b92
Mainly focus on files that use BSD 2-Clause license, however the tool I was using misidentified many licenses so this was mostly a manual - error prone - task. The Software Package Data Exchange (SPDX) group provides a specification to make it easier for automated tools to detect and summarize well known opensource licenses. We are gradually adopting the specification, noting that the tags are considered only advisory and do not, in any way, superceed or replace the license texts.
305 lines
7.6 KiB
C
305 lines
7.6 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
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* reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* NETLOGIC_BSD
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* $FreeBSD$
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*/
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#ifndef __NLM_HAL_COP2_H__
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#define __NLM_HAL_COP2_H__
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#define COP2_TX_BUF 0
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#define COP2_RX_BUF 1
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#define COP2_TXMSGSTATUS 2
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#define COP2_RXMSGSTATUS 3
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#define COP2_MSGSTATUS1 4
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#define COP2_MSGCONFIG 5
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#define COP2_MSGERROR 6
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#define CROSSTHR_POPQ_EN 0x01
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#define VC0_POPQ_EN 0x02
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#define VC1_POPQ_EN 0x04
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#define VC2_POPQ_EN 0x08
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#define VC3_POPQ_EN 0x10
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#define ALL_VC_POPQ_EN 0x1E
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#define ALL_VC_CT_POPQ_EN 0x1F
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struct nlm_fmn_msg {
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uint64_t msg[4];
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};
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#define NLM_DEFINE_COP2_ACCESSORS32(name, reg, sel) \
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static inline uint32_t nlm_read_c2_##name(void) \
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{ \
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uint32_t __rv; \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"mfc2 %0, $%1, %2\n" \
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".set pop\n" \
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: "=r" (__rv) \
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: "i" (reg), "i" (sel)); \
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return __rv; \
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} \
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\
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static inline void nlm_write_c2_##name(uint32_t val) \
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{ \
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__asm__ __volatile__( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"mtc2 %0, $%1, %2\n" \
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".set pop\n" \
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: : "r" (val), "i" (reg), "i" (sel)); \
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} struct __hack
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#if (__mips == 64)
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#define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \
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static inline uint64_t nlm_read_c2_##name(void) \
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{ \
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uint64_t __rv; \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"dmfc2 %0, $%1, %2\n" \
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".set pop\n" \
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: "=r" (__rv) \
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: "i" (reg), "i" (sel)); \
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return __rv; \
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} \
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\
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static inline void nlm_write_c2_##name(uint64_t val) \
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{ \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"dmtc2 %0, $%1, %2\n" \
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".set pop\n" \
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: : "r" (val), "i" (reg), "i" (sel)); \
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} struct __hack
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#else
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#define NLM_DEFINE_COP2_ACCESSORS64(name, reg, sel) \
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static inline uint64_t nlm_read_c2_##name(void) \
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{ \
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uint32_t __high, __low; \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"dmfc2 $8, $%2, %3\n" \
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"dsra32 %0, $8, 0\n" \
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"sll %1, $8, 0\n" \
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".set pop\n" \
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: "=r"(__high), "=r"(__low) \
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: "i"(reg), "i"(sel) \
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: "$8"); \
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\
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return ((uint64_t)__high << 32) | __low; \
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} \
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\
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static inline void nlm_write_c2_##name(uint64_t val) \
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{ \
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uint32_t __high = val >> 32; \
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uint32_t __low = val & 0xffffffff; \
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__asm__ __volatile__ ( \
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".set push\n" \
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".set noreorder\n" \
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".set mips64\n" \
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"dsll32 $8, %1, 0\n" \
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"dsll32 $9, %0, 0\n" \
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"dsrl32 $8, $8, 0\n" \
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"or $8, $8, $9\n" \
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"dmtc2 $8, $%2, %3\n" \
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".set pop\n" \
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: : "r"(__high), "r"(__low), "i"(reg), "i"(sel) \
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: "$8", "$9"); \
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} struct __hack
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#endif
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NLM_DEFINE_COP2_ACCESSORS64(txbuf0, COP2_TX_BUF, 0);
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NLM_DEFINE_COP2_ACCESSORS64(txbuf1, COP2_TX_BUF, 1);
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NLM_DEFINE_COP2_ACCESSORS64(txbuf2, COP2_TX_BUF, 2);
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NLM_DEFINE_COP2_ACCESSORS64(txbuf3, COP2_TX_BUF, 3);
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NLM_DEFINE_COP2_ACCESSORS64(rxbuf0, COP2_RX_BUF, 0);
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NLM_DEFINE_COP2_ACCESSORS64(rxbuf1, COP2_RX_BUF, 1);
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NLM_DEFINE_COP2_ACCESSORS64(rxbuf2, COP2_RX_BUF, 2);
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NLM_DEFINE_COP2_ACCESSORS64(rxbuf3, COP2_RX_BUF, 3);
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NLM_DEFINE_COP2_ACCESSORS32(txmsgstatus, COP2_TXMSGSTATUS, 0);
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NLM_DEFINE_COP2_ACCESSORS32(rxmsgstatus, COP2_RXMSGSTATUS, 0);
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NLM_DEFINE_COP2_ACCESSORS32(msgstatus1, COP2_MSGSTATUS1, 0);
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NLM_DEFINE_COP2_ACCESSORS32(msgconfig, COP2_MSGCONFIG, 0);
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NLM_DEFINE_COP2_ACCESSORS32(msgerror0, COP2_MSGERROR, 0);
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NLM_DEFINE_COP2_ACCESSORS32(msgerror1, COP2_MSGERROR, 1);
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NLM_DEFINE_COP2_ACCESSORS32(msgerror2, COP2_MSGERROR, 2);
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NLM_DEFINE_COP2_ACCESSORS32(msgerror3, COP2_MSGERROR, 3);
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/* successful completion returns 1, else 0 */
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static inline int
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nlm_msgsend(int val)
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{
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int result;
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__asm__ volatile (
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".set push\n"
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".set noreorder\n"
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".set mips64\n"
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"move $8, %1\n"
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"sync\n"
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"/* msgsnds $9, $8 */\n"
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".word 0x4a084801\n"
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"move %0, $9\n"
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".set pop\n"
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: "=r" (result)
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: "r" (val)
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: "$8", "$9");
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return result;
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}
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static inline int
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nlm_msgld(int vc)
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{
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int val;
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__asm__ volatile (
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".set push\n"
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".set noreorder\n"
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".set mips64\n"
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"move $8, %1\n"
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"/* msgld $9, $8 */\n"
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".word 0x4a084802\n"
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"move %0, $9\n"
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".set pop\n"
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: "=r" (val)
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: "r" (vc)
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: "$8", "$9");
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return val;
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}
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static inline void
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nlm_msgwait(int vc)
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{
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__asm__ volatile (
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".set push\n"
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".set noreorder\n"
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".set mips64\n"
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"move $8, %0\n"
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"/* msgwait $8 */\n"
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".word 0x4a080003\n"
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".set pop\n"
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: : "r" (vc)
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: "$8");
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}
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static inline int
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nlm_fmn_msgsend(int dstid, int size, int swcode, struct nlm_fmn_msg *m)
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{
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uint32_t flags, status;
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int rv;
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size -= 1;
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flags = nlm_save_flags_cop2();
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switch (size) {
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case 3:
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nlm_write_c2_txbuf3(m->msg[3]);
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case 2:
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nlm_write_c2_txbuf2(m->msg[2]);
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case 1:
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nlm_write_c2_txbuf1(m->msg[1]);
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case 0:
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nlm_write_c2_txbuf0(m->msg[0]);
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}
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dstid |= ((swcode << 24) | (size << 16));
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status = nlm_msgsend(dstid);
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rv = !status;
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if (rv != 0)
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rv = nlm_read_c2_txmsgstatus();
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nlm_restore_flags(flags);
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return rv;
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}
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static inline int
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nlm_fmn_msgrcv(int vc, int *srcid, int *size, int *code, struct nlm_fmn_msg *m)
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{
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uint32_t status;
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uint32_t msg_status, flags;
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int tmp_sz, rv;
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flags = nlm_save_flags_cop2();
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status = nlm_msgld(vc); /* will return 0, if error */
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rv = !status;
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if (rv == 0) {
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msg_status = nlm_read_c2_rxmsgstatus();
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*size = ((msg_status >> 26) & 0x3) + 1;
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*code = (msg_status >> 18) & 0xff;
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*srcid = (msg_status >> 4) & 0xfff;
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tmp_sz = *size - 1;
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switch (tmp_sz) {
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case 3:
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m->msg[3] = nlm_read_c2_rxbuf3();
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case 2:
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m->msg[2] = nlm_read_c2_rxbuf2();
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case 1:
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m->msg[1] = nlm_read_c2_rxbuf1();
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case 0:
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m->msg[0] = nlm_read_c2_rxbuf0();
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}
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}
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nlm_restore_flags(flags);
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return rv;
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}
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static inline void
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nlm_fmn_cpu_init(int int_vec, int ecc_en, int v0pe, int v1pe, int v2pe, int v3pe)
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{
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uint32_t val = nlm_read_c2_msgconfig();
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/* Note: in XLP PRM 0.8.1, the int_vec bits are un-documented
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* in msgconfig register of cop2.
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* As per chip/cpu RTL, [16:20] bits consist of int_vec.
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*/
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val |= (((int_vec & 0x1f) << 16) |
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((ecc_en & 0x1) << 8) |
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((v3pe & 0x1) << 4) |
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((v2pe & 0x1) << 3) |
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((v1pe & 0x1) << 2) |
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((v0pe & 0x1) << 1));
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nlm_write_c2_msgconfig(val);
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}
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#endif
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