ef270ab1b6
The ocs_fc(4) driver supports the following hardware: Emulex 16/8G FC GEN 5 HBAS LPe15004 FC Host Bus Adapters LPe160XX FC Host Bus Adapters Emulex 32/16G FC GEN 6 HBAS LPe3100X FC Host Bus Adapters LPe3200X FC Host Bus Adapters The driver supports target and initiator mode, and also supports FC-Tape. Note that the driver only currently works on little endian platforms. It is only included in the module build for amd64 and i386, and in GENERIC on amd64 only. Submitted by: Ram Kishore Vegesna <ram.vegesna@broadcom.com> Reviewed by: mav MFC after: 5 days Relnotes: yes Sponsored by: Broadcom Differential Revision: https://reviews.freebsd.org/D11423
262 lines
6.8 KiB
C
262 lines
6.8 KiB
C
/*-
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* Copyright (c) 2017 Broadcom. All rights reserved.
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* The term "Broadcom" refers to Broadcom Limited and/or its subsidiaries.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/**
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* @file
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* OCS bsd driver common include file
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*/
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#if !defined(__OCS_H__)
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#define __OCS_H__
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#include "ocs_os.h"
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#include "ocs_utils.h"
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#include "ocs_hw.h"
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#include "ocs_scsi.h"
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#include "ocs_io.h"
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#include "version.h"
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#define DRV_NAME "ocs_fc"
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#define DRV_VERSION \
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STR_BE_MAJOR "." STR_BE_MINOR "." STR_BE_BUILD "." STR_BE_BRANCH
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/**
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* @brief Interrupt context
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*/
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typedef struct ocs_intr_ctx_s {
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uint32_t vec; /** Zero based interrupt vector */
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void *softc; /** software context for interrupt */
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char name[64]; /** label for this context */
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} ocs_intr_ctx_t;
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typedef struct ocs_fcport_s {
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struct cam_sim *sim;
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struct cam_path *path;
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uint32_t role;
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ocs_tgt_resource_t targ_rsrc_wildcard;
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ocs_tgt_resource_t targ_rsrc[OCS_MAX_LUN];
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ocs_vport_spec_t *vport;
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} ocs_fcport;
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#define FCPORT(ocs, chan) (&((ocs_fcport *)(ocs)->fcports)[(chan)])
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/**
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* @brief Driver's context
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*/
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struct ocs_softc {
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device_t dev;
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struct cdev *cdev;
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ocs_pci_reg_t reg[PCI_MAX_BAR];
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uint32_t instance_index;
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const char *desc;
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uint32_t irqid;
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struct resource *irq;
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void *tag;
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ocs_intr_ctx_t intr_ctx;
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uint32_t n_vec;
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bus_dma_tag_t dmat; /** Parent DMA tag */
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bus_dma_tag_t buf_dmat;/** IO buffer DMA tag */
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char display_name[OCS_DISPLAY_NAME_LENGTH];
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uint16_t pci_vendor;
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uint16_t pci_device;
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uint16_t pci_subsystem_vendor;
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uint16_t pci_subsystem_device;
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char businfo[16];
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const char *driver_version;
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const char *fw_version;
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const char *model;
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ocs_hw_t hw;
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ocs_rlock_t lock; /**< device wide lock */
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ocs_xport_e ocs_xport;
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ocs_xport_t *xport; /**< pointer to transport object */
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ocs_domain_t *domain;
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ocs_list_t domain_list;
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uint32_t domain_instance_count;
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void (*domain_list_empty_cb)(ocs_t *ocs, void *arg);
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void *domain_list_empty_cb_arg;
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uint8_t enable_ini;
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uint8_t enable_tgt;
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uint8_t fc_type;
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int ctrlmask;
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uint8_t explicit_buffer_list;
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uint8_t external_loopback;
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uint8_t skip_hw_teardown;
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int speed;
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int topology;
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int ethernet_license;
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int num_scsi_ios;
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uint8_t enable_hlm;
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uint32_t hlm_group_size;
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uint32_t max_isr_time_msec; /*>> Maximum ISR time */
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uint32_t auto_xfer_rdy_size; /*>> Max sized write to use auto xfer rdy*/
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uint8_t esoc;
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int logmask;
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char *hw_war_version;
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uint32_t num_vports;
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uint32_t target_io_timer_sec;
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uint32_t hw_bounce;
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uint8_t rq_threads;
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uint8_t rq_selection_policy;
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uint8_t rr_quanta;
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char *filter_def;
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uint32_t max_remote_nodes;
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/*
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* tgt_rscn_delay - delay in kicking off RSCN processing
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* (nameserver queries) after receiving an RSCN on the target.
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* This prevents thrashing of nameserver requests due to a huge burst of
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* RSCNs received in a short period of time.
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* Note: this is only valid when target RSCN handling is enabled -- see
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* ctrlmask.
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*/
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time_t tgt_rscn_delay_msec; /*>> minimum target RSCN delay */
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/*
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* tgt_rscn_period - determines maximum frequency when processing
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* back-to-back RSCNs; e.g. if this value is 30, there will never be
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* any more than 1 RSCN handling per 30s window. This prevents
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* initiators on a faulty link generating many RSCN from causing the
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* target to continually query the nameserver.
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* Note: This is only valid when target RSCN handling is enabled
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*/
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time_t tgt_rscn_period_msec; /*>> minimum target RSCN period */
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uint32_t enable_task_set_full;
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uint32_t io_in_use;
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uint32_t io_high_watermark; /**< used to send task set full */
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struct mtx sim_lock;
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uint32_t config_tgt:1, /**< Configured to support target mode */
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config_ini:1; /**< Configured to support initiator mode */
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uint32_t nodedb_mask; /**< Node debugging mask */
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char modeldesc[64];
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char serialnum[64];
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char fwrev[64];
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char sli_intf[9];
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ocs_ramlog_t *ramlog;
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ocs_textbuf_t ddump_saved;
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ocs_mgmt_functions_t *mgmt_functions;
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ocs_mgmt_functions_t *tgt_mgmt_functions;
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ocs_mgmt_functions_t *ini_mgmt_functions;
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ocs_err_injection_e err_injection;
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uint32_t cmd_err_inject;
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time_t delay_value_msec;
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bool attached;
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struct mtx dbg_lock;
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struct cam_devq *devq;
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ocs_fcport *fcports;
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void* tgt_ocs;
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};
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static inline void
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ocs_device_lock_init(ocs_t *ocs)
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{
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ocs_rlock_init(ocs, &ocs->lock, "ocsdevicelock");
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}
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static inline int32_t
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ocs_device_lock_try(ocs_t *ocs)
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{
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return ocs_rlock_try(&ocs->lock);
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}
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static inline void
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ocs_device_lock(ocs_t *ocs)
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{
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ocs_rlock_acquire(&ocs->lock);
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}
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static inline void
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ocs_device_unlock(ocs_t *ocs)
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{
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ocs_rlock_release(&ocs->lock);
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}
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static inline void
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ocs_device_lock_free(ocs_t *ocs)
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{
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ocs_rlock_free(&ocs->lock);
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}
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extern int32_t ocs_device_detach(ocs_t *ocs);
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extern int32_t ocs_device_attach(ocs_t *ocs);
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#define ocs_is_initiator_enabled() (ocs->enable_ini)
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#define ocs_is_target_enabled() (ocs->enable_tgt)
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#include "ocs_xport.h"
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#include "ocs_domain.h"
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#include "ocs_sport.h"
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#include "ocs_node.h"
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#include "ocs_unsol.h"
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#include "ocs_scsi.h"
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#include "ocs_ioctl.h"
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static inline ocs_io_t *
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ocs_io_alloc(ocs_t *ocs)
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{
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return ocs_io_pool_io_alloc(ocs->xport->io_pool);
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}
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static inline void
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ocs_io_free(ocs_t *ocs, ocs_io_t *io)
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{
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ocs_io_pool_io_free(ocs->xport->io_pool, io);
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}
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#endif /* __OCS_H__ */
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