281 lines
9.7 KiB
C
281 lines
9.7 KiB
C
/*
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* Copyright (c) 2013 Qualcomm Atheros, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
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* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
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* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
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* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#include "opt_ah.h"
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#include "ah.h"
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#include "ah_internal.h"
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#include "ar9300/ar9300.h"
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#include "ar9300/ar9300reg.h"
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#include "ar9300/ar9300phy.h"
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/* chansel table, used by Hornet and Poseidon */
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static const u_int32_t ar9300_chansel_xtal_25M[] = {
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0x101479e, /* Freq 2412 - (128 << 17) + 83870 */
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0x101d027, /* Freq 2417 - (128 << 17) + 118823 */
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0x10258af, /* Freq 2422 - (129 << 17) + 22703 */
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0x102e138, /* Freq 2427 - (129 << 17) + 57656 */
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0x10369c0, /* Freq 2432 - (129 << 17) + 92608 */
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0x103f249, /* Freq 2437 - (129 << 17) + 127561 */
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0x1047ad1, /* Freq 2442 - (130 << 17) + 31441 */
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0x105035a, /* Freq 2447 - (130 << 17) + 66394 */
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0x1058be2, /* Freq 2452 - (130 << 17) + 101346 */
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0x106146b, /* Freq 2457 - (131 << 17) + 5227 */
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0x1069cf3, /* Freq 2462 - (131 << 17) + 40179 */
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0x107257c, /* Freq 2467 - (131 << 17) + 75132 */
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0x107ae04, /* Freq 2472 - (131 << 17) + 110084 */
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0x108f5b2, /* Freq 2484 - (132 << 17) + 62898 */
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};
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static const u_int32_t ar9300_chansel_xtal_40M[] = {
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0xa0ccbe, /* Freq 2412 - (80 << 17) + 52414 */
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0xa12213, /* Freq 2417 - (80 << 17) + 74259 */
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0xa17769, /* Freq 2422 - (80 << 17) + 96105 */
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0xa1ccbe, /* Freq 2427 - (80 << 17) + 117950 */
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0xa22213, /* Freq 2432 - (81 << 17) + 8723 */
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0xa27769, /* Freq 2437 - (81 << 17) + 30569 */
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0xa2ccbe, /* Freq 2442 - (81 << 17) + 52414 */
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0xa32213, /* Freq 2447 - (81 << 17) + 74259 */
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0xa37769, /* Freq 2452 - (81 << 17) + 96105 */
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0xa3ccbe, /* Freq 2457 - (81 << 17) + 117950 */
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0xa42213, /* Freq 2462 - (82 << 17) + 8723 */
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0xa47769, /* Freq 2467 - (82 << 17) + 30569 */
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0xa4ccbe, /* Freq 2472 - (82 << 17) + 52414 */
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0xa5998b, /* Freq 2484 - (82 << 17) + 104843 */
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};
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/*
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* Take the MHz channel value and set the Channel value
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*
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* ASSUMES: Writes enabled to analog bus
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*
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* Actual Expression,
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*
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* For 2GHz channel,
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* Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
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* (freq_ref = 40MHz)
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*
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* For 5GHz channel,
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* Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
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* (freq_ref = 40MHz/(24>>amode_ref_sel))
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*
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* For 5GHz channels which are 5MHz spaced,
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* Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
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* (freq_ref = 40MHz)
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*/
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static HAL_BOOL
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ar9300_set_channel(struct ath_hal *ah, struct ieee80211_channel *chan)
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{
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u_int16_t b_mode, frac_mode = 0, a_mode_ref_sel = 0;
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u_int32_t freq, channel_sel, reg32;
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u_int8_t clk_25mhz = AH9300(ah)->clk_25mhz;
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CHAN_CENTERS centers;
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int load_synth_channel;
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#ifdef AH_DEBUG_ALQ
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HAL_CHANNEL_INTERNAL *ichan = ath_hal_checkchannel(ah, chan);
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#endif
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/*
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* Put this behind AH_DEBUG_ALQ for now until the Hornet
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* channel_sel code below is made to work.
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*/
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#ifdef AH_DEBUG_ALQ
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OS_MARK(ah, AH_MARK_SETCHANNEL, ichan->channel);
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#endif
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ar9300_get_channel_centers(ah, chan, ¢ers);
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freq = centers.synth_center;
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if (freq < 4800) { /* 2 GHz, fractional mode */
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b_mode = 1; /* 2 GHz */
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if (AR_SREV_HORNET(ah)) {
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#if 0
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u_int32_t ichan =
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ieee80211_mhz2ieee(ah, chan->ic_freq, chan->ic_flags);
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HALASSERT(ichan > 0 && ichan <= 14);
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if (clk_25mhz) {
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channel_sel = ar9300_chansel_xtal_25M[ichan - 1];
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} else {
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channel_sel = ar9300_chansel_xtal_40M[ichan - 1];
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}
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#endif
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uint32_t i;
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/*
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* Pay close attention to this bit!
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*
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* We need to map the actual desired synth frequency to
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* one of the channel select array entries.
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*
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* For HT20, it'll align with the channel we select.
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*
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* For HT40 though it won't - the centre frequency
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* will not be the frequency of chan->ic_freq or ichan->freq;
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* it needs to be whatever frequency maps to 'freq'.
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*/
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i = ath_hal_mhz2ieee_2ghz(ah, freq);
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HALASSERT(i > 0 && i <= 14);
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if (clk_25mhz) {
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channel_sel = ar9300_chansel_xtal_25M[i - 1];
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} else {
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channel_sel = ar9300_chansel_xtal_40M[i - 1];
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}
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} else if (AR_SREV_POSEIDON(ah) || AR_SREV_APHRODITE(ah)) {
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u_int32_t channel_frac;
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/*
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* freq_ref = (40 / (refdiva >> a_mode_ref_sel));
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* (where refdiva = 1 and amoderefsel = 0)
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* ndiv = ((chan_mhz * 4) / 3) / freq_ref;
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* chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
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*/
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channel_sel = (freq * 4) / 120;
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channel_frac = (((freq * 4) % 120) * 0x20000) / 120;
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channel_sel = (channel_sel << 17) | (channel_frac);
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} else if (AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah) || AR_SREV_HONEYBEE(ah)) {
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u_int32_t channel_frac;
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if (clk_25mhz) {
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/*
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* freq_ref = (50 / (refdiva >> a_mode_ref_sel));
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* (where refdiva = 1 and amoderefsel = 0)
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* ndiv = ((chan_mhz * 4) / 3) / freq_ref;
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* chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
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*/
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if (AR_SREV_SCORPION(ah) || AR_SREV_HONEYBEE(ah)) {
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/* Doubler is off for Scorpion */
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channel_sel = (freq * 4) / 75;
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channel_frac = (((freq * 4) % 75) * 0x20000) / 75;
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} else {
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channel_sel = (freq * 2) / 75;
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channel_frac = (((freq * 2) % 75) * 0x20000) / 75;
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}
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} else {
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/*
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* freq_ref = (50 / (refdiva >> a_mode_ref_sel));
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* (where refdiva = 1 and amoderefsel = 0)
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* ndiv = ((chan_mhz * 4) / 3) / freq_ref;
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* chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
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*/
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if (AR_SREV_SCORPION(ah)) {
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/* Doubler is off for Scorpion */
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channel_sel = (freq * 4) / 120;
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channel_frac = (((freq * 4) % 120) * 0x20000) / 120;
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} else {
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channel_sel = (freq * 2) / 120;
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channel_frac = (((freq * 2) % 120) * 0x20000) / 120;
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}
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}
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channel_sel = (channel_sel << 17) | (channel_frac);
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} else {
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channel_sel = CHANSEL_2G(freq);
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}
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} else {
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b_mode = 0; /* 5 GHz */
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if ((AR_SREV_WASP(ah) || AR_SREV_SCORPION(ah)) && clk_25mhz){
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u_int32_t channel_frac;
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/*
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* freq_ref = (50 / (refdiva >> amoderefsel));
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* (refdiva = 1, amoderefsel = 0)
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* ndiv = ((chan_mhz * 2) / 3) / freq_ref;
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* chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
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*/
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channel_sel = freq / 75 ;
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channel_frac = ((freq % 75) * 0x20000) / 75;
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channel_sel = (channel_sel << 17) | (channel_frac);
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} else {
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channel_sel = CHANSEL_5G(freq);
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/* Doubler is ON, so, divide channel_sel by 2. */
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channel_sel >>= 1;
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}
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}
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/* Enable fractional mode for all channels */
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frac_mode = 1;
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a_mode_ref_sel = 0;
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load_synth_channel = 0;
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reg32 = (b_mode << 29);
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OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
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/* Enable Long shift Select for Synthesizer */
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OS_REG_RMW_FIELD(ah,
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AR_PHY_65NM_CH0_SYNTH4, AR_PHY_SYNTH4_LONG_SHIFT_SELECT, 1);
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/* program synth. setting */
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reg32 =
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(channel_sel << 2) |
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(a_mode_ref_sel << 28) |
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(frac_mode << 30) |
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(load_synth_channel << 31);
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if (IEEE80211_IS_CHAN_QUARTER(chan)) {
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reg32 += CHANSEL_5G_DOT5MHZ;
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}
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OS_REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
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/* Toggle Load Synth channel bit */
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load_synth_channel = 1;
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reg32 |= load_synth_channel << 31;
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OS_REG_WRITE(ah, AR_PHY_65NM_CH0_SYNTH7, reg32);
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AH_PRIVATE(ah)->ah_curchan = chan;
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return AH_TRUE;
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}
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#if 0
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static HAL_BOOL
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ar9300_get_chip_power_limits(struct ath_hal *ah, HAL_CHANNEL *chans,
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u_int32_t nchans)
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{
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int i;
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for (i = 0; i < nchans; i++) {
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chans[i].max_tx_power = AR9300_MAX_RATE_POWER;
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chans[i].min_tx_power = AR9300_MAX_RATE_POWER;
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}
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return AH_TRUE;
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}
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#endif
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/* XXX FreeBSD */
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static HAL_BOOL
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ar9300_get_chip_power_limits(struct ath_hal *ah,
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struct ieee80211_channel *chan)
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{
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/* XXX ? */
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chan->ic_minpower = 0;
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chan->ic_maxpower = AR9300_MAX_RATE_POWER;
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return AH_TRUE;
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}
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HAL_BOOL
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ar9300_rf_attach(struct ath_hal *ah, HAL_STATUS *status)
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{
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struct ath_hal_9300 *ahp = AH9300(ah);
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ahp->ah_rf_hal.set_channel = ar9300_set_channel;
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ahp->ah_rf_hal.get_chip_power_lim = ar9300_get_chip_power_limits;
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*status = HAL_OK;
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return AH_TRUE;
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}
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