Konstantin Belousov 411c83ccd6 If full width writes to the performance monitoring counters are ... supported, use full-width aliases MSRs for writes. This fixes the "[pmc,X] negative increment" assertion on the context switch when clipped counter value is sign-extended. Add definitions for the MSR IA32_PERF_CAPABILITIES needed to detect the feature. PR: 207068 Submitted by: joss.upton@yahoo.com MFC after: 2 weeks		2016-02-12 07:27:24 +00:00
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hwpmc_amd.c
hwpmc_amd.h
hwpmc_arm64_md.c
hwpmc_arm64.c
hwpmc_arm64.h
hwpmc_arm.c
hwpmc_armv7.c
hwpmc_armv7.h
hwpmc_core.c	If full width writes to the performance monitoring counters are	2016-02-12 07:27:24 +00:00
hwpmc_core.h	If full width writes to the performance monitoring counters are	2016-02-12 07:27:24 +00:00
hwpmc_e500.c
hwpmc_intel.c
hwpmc_logging.c
hwpmc_mips24k.c
hwpmc_mips74k.c
hwpmc_mips.c
hwpmc_mod.c	Remove tautological cast.	2016-02-12 07:19:59 +00:00
hwpmc_mpc7xxx.c
hwpmc_octeon.c
hwpmc_pentium.c
hwpmc_pentium.h
hwpmc_piv.c
hwpmc_piv.h
hwpmc_powerpc.c
hwpmc_powerpc.h
hwpmc_ppc970.c
hwpmc_ppro.c
hwpmc_ppro.h
hwpmc_riscv.h	Welcome the RISC-V 64-bit kernel.	2016-01-29 15:12:31 +00:00
hwpmc_soft.c
hwpmc_soft.h
hwpmc_sparc64.c
hwpmc_tsc.c
hwpmc_tsc.h
hwpmc_uncore.c
hwpmc_uncore.h
hwpmc_x86.c
hwpmc_xscale.c
hwpmc_xscale.h
pmc_events.h