a0f70ac053
deltas, but it is possible since I had a few merge conflicts over the last few days while this has been sitting ready to go. (Part 1 was committed to the config files, but cvs aborted grrr..) Approved by: core
1062 lines
23 KiB
C
1062 lines
23 KiB
C
/*
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* sound/sscape.c
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*
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* Low level driver for Ensoniq Soundscape
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*
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* Copyright by Hannu Savolainen 1994
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer. 2.
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <i386/isa/sound/sound_config.h>
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#if NSSCAPE > 0
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#include <i386/isa/sound/coproc.h>
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#define EXCLUDE_NATIVE_PCM
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/*
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* I/O ports
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*/
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#define MIDI_DATA 0
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#define MIDI_CTRL 1
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#define HOST_CTRL 2
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#define TX_READY 0x02
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#define RX_READY 0x01
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#define HOST_DATA 3
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#define ODIE_ADDR 4
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#define ODIE_DATA 5
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/*
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* Indirect registers
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*/
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#define GA_INTSTAT_REG 0
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#define GA_INTENA_REG 1
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#define GA_DMAA_REG 2
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#define GA_DMAB_REG 3
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#define GA_INTCFG_REG 4
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#define GA_DMACFG_REG 5
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#define GA_CDCFG_REG 6
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#define GA_SMCFGA_REG 7
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#define GA_SMCFGB_REG 8
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#define GA_HMCTL_REG 9
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/*
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* DMA channel identifiers (A and B)
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*/
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#define SSCAPE_DMA_A 0
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#define SSCAPE_DMA_B 1
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#define PORT(name) (devc->base+name)
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/*
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* Host commands recognized by the OBP microcode
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*/
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#define CMD_GEN_HOST_ACK 0x80
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#define CMD_GEN_MPU_ACK 0x81
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#define CMD_GET_BOARD_TYPE 0x82
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#define CMD_SET_CONTROL 0x88
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#define CMD_GET_CONTROL 0x89
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#define CTL_MASTER_VOL 0
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#define CTL_MIC_MODE 2
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#define CTL_SYNTH_VOL 4
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#define CTL_WAVE_VOL 7
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#define CMD_SET_MT32 0x96
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#define CMD_GET_MT32 0x97
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#define CMD_SET_EXTMIDI 0x9b
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#define CMD_GET_EXTMIDI 0x9c
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#define CMD_ACK 0x80
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typedef struct sscape_info {
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int base, irq, dma;
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int ok; /* Properly detected */
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int failed;
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int dma_allocated;
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int my_audiodev;
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int opened;
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sound_os_info *osp;
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}
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sscape_info;
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static struct sscape_info dev_info =
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{0};
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static struct sscape_info *devc = &dev_info;
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static int *sscape_sleeper = NULL;
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static volatile struct snd_wait sscape_sleep_flag =
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{0};
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/* Some older cards have assigned interrupt bits differently than new ones */
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static char valid_interrupts_old[] =
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{9, 7, 5, 15};
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static char valid_interrupts_new[] =
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{9, 5, 7, 10};
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static char *valid_interrupts = valid_interrupts_new;
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#ifdef REVEAL_SPEA
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static char old_hardware = 1;
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#else
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static char old_hardware = 0;
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#endif
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static u_char
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sscape_read(struct sscape_info * devc, int reg)
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{
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u_long flags;
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u_char val;
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flags = splhigh();
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outb(PORT(ODIE_ADDR), reg);
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val = inb(PORT(ODIE_DATA));
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splx(flags);
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return val;
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}
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static void
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sscape_write(struct sscape_info * devc, int reg, int data)
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{
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u_long flags;
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flags = splhigh();
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outb(PORT(ODIE_ADDR), reg);
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outb(PORT(ODIE_DATA), data);
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splx(flags);
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}
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static void
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host_open(struct sscape_info * devc)
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{
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outb(PORT(HOST_CTRL), 0x00); /* Put the board to the host mode */
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}
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static void
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host_close(struct sscape_info * devc)
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{
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outb(PORT(HOST_CTRL), 0x03); /* Put the board to the MIDI mode */
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}
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static int
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host_write(struct sscape_info * devc, u_char *data, int count)
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{
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u_long flags;
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int i, timeout_val;
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flags = splhigh();
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/*
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* Send the command and data bytes
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*/
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for (i = 0; i < count; i++) {
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for (timeout_val = 10000; timeout_val > 0; timeout_val--)
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if (inb(PORT(HOST_CTRL)) & TX_READY)
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break;
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if (timeout_val <= 0) {
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splx(flags);
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return 0;
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}
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outb(PORT(HOST_DATA), data[i]);
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}
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splx(flags);
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return 1;
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}
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static int
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host_read(struct sscape_info * devc)
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{
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u_long flags;
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int timeout_val;
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u_char data;
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flags = splhigh();
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/*
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* Read a byte
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*/
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for (timeout_val = 10000; timeout_val > 0; timeout_val--)
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if (inb(PORT(HOST_CTRL)) & RX_READY)
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break;
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if (timeout_val <= 0) {
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splx(flags);
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return -1;
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}
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data = inb(PORT(HOST_DATA));
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splx(flags);
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return data;
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}
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static int
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host_command1(struct sscape_info * devc, int cmd)
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{
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u_char buf[10];
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buf[0] = (u_char) (cmd & 0xff);
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return host_write(devc, buf, 1);
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}
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static int
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host_command2(struct sscape_info * devc, int cmd, int parm1)
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{
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u_char buf[10];
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buf[0] = (u_char) (cmd & 0xff);
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buf[1] = (u_char) (parm1 & 0xff);
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return host_write(devc, buf, 2);
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}
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static int
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host_command3(struct sscape_info * devc, int cmd, int parm1, int parm2)
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{
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u_char buf[10];
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buf[0] = (u_char) (cmd & 0xff);
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buf[1] = (u_char) (parm1 & 0xff);
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buf[2] = (u_char) (parm2 & 0xff);
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return host_write(devc, buf, 3);
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}
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static void
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set_mt32(struct sscape_info * devc, int value)
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{
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host_open(devc);
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host_command2(devc, CMD_SET_MT32,
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value ? 1 : 0);
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if (host_read(devc) != CMD_ACK) {
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printf("SNDSCAPE: Setting MT32 mode failed\n");
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}
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host_close(devc);
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}
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static void
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set_control(struct sscape_info * devc, int ctrl, int value)
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{
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host_open(devc);
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host_command3(devc, CMD_SET_CONTROL, ctrl, value);
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if (host_read(devc) != CMD_ACK) {
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printf("SNDSCAPE: Setting control (%d) failed\n", ctrl);
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}
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host_close(devc);
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}
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static int
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get_board_type(struct sscape_info * devc)
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{
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int tmp;
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host_open(devc);
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if (!host_command1(devc, CMD_GET_BOARD_TYPE))
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tmp = -1;
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else
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tmp = host_read(devc);
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host_close(devc);
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return tmp;
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}
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void
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sscapeintr(int irq)
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{
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u_char bits, tmp;
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DEB(printf("sscapeintr(0x%02x)\n", (bits = sscape_read(devc, GA_INTSTAT_REG))));
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if ((sscape_sleep_flag.mode & WK_SLEEP)) {
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sscape_sleep_flag.mode = WK_WAKEUP;
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wakeup(sscape_sleeper);
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}
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if (bits & 0x02) { /* Host interface interrupt */
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printf("SSCAPE: Host interrupt, data=%02x\n", host_read(devc));
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}
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#if (defined(CONFIG_MPU401) || defined(CONFIG_MPU_EMU)) && defined(CONFIG_MIDI)
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if (bits & 0x01) {
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static int debug = 0;
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mpuintr(irq);
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if (debug++ > 10) { /* Temporary debugging hack */
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sscape_write(devc, GA_INTENA_REG, 0x00); /* Disable all interr. */
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}
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}
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#endif
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/*
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* Acknowledge interrupts (toggle the interrupt bits)
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*/
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tmp = sscape_read(devc, GA_INTENA_REG);
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sscape_write(devc, GA_INTENA_REG, (~bits & 0x0e) | (tmp & 0xf1));
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}
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static void
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do_dma(struct sscape_info * devc, int dma_chan, u_long buf, int blk_size, int mode)
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{
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u_char temp;
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if (dma_chan != SSCAPE_DMA_A) {
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printf("SSCAPE: Tried to use DMA channel != A. Why?\n");
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return;
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}
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DMAbuf_start_dma(devc->my_audiodev, buf, blk_size, mode);
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temp = devc->dma << 4; /* Setup DMA channel select bits */
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if (devc->dma <= 3)
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temp |= 0x80; /* 8 bit DMA channel */
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temp |= 1; /* Trigger DMA */
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sscape_write(devc, GA_DMAA_REG, temp);
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temp &= 0xfe; /* Clear DMA trigger */
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sscape_write(devc, GA_DMAA_REG, temp);
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}
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static int
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verify_mpu(struct sscape_info * devc)
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{
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/*
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* The SoundScape board could be in three modes (MPU, 8250 and host).
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* If the card is not in the MPU mode, enabling the MPU driver will
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* cause infinite loop (the driver believes that there is always some
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* received data in the buffer.
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*
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* Detect this by looking if there are more than 10 received MIDI bytes
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* (0x00) in the buffer.
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*/
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int i;
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for (i = 0; i < 10; i++) {
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if (inb(devc->base + HOST_CTRL) & 0x80)
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return 1;
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if (inb(devc->base) != 0x00)
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return 1;
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}
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printf("SoundScape: The device is not in the MPU-401 mode\n");
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return 0;
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}
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static int
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sscape_coproc_open(void *dev_info, int sub_device)
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{
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if (sub_device == COPR_MIDI) {
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set_mt32(devc, 0);
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if (!verify_mpu(devc))
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return -(EIO);
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}
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sscape_sleep_flag.aborting = 0;
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sscape_sleep_flag.mode = WK_NONE;
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return 0;
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}
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static void
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sscape_coproc_close(void *dev_info, int sub_device)
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{
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struct sscape_info *devc = dev_info;
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u_long flags;
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flags = splhigh();
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if (devc->dma_allocated) {
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sscape_write(devc, GA_DMAA_REG, 0x20); /* DMA channel disabled */
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#ifdef CONFIG_NATIVE_PCM
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#endif
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devc->dma_allocated = 0;
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}
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sscape_sleep_flag.aborting = 0;
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sscape_sleep_flag.mode = WK_NONE;
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splx(flags);
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return;
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}
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static void
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sscape_coproc_reset(void *dev_info)
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{
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}
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static int
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sscape_download_boot(struct sscape_info * devc, u_char *block, int size, int flag)
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{
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u_long flags;
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u_char temp;
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int done, timeout_val;
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if (flag & CPF_FIRST) {
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/*
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* First block. Have to allocate DMA and to reset the board
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* before continuing.
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*/
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flags = splhigh();
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if (devc->dma_allocated == 0) {
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devc->dma_allocated = 1;
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}
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splx(flags);
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sscape_write(devc, GA_HMCTL_REG,
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(temp = sscape_read(devc, GA_HMCTL_REG)) & 0x3f); /* Reset */
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for (timeout_val = 10000; timeout_val > 0; timeout_val--)
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sscape_read(devc, GA_HMCTL_REG); /* Delay */
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/* Take board out of reset */
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sscape_write(devc, GA_HMCTL_REG,
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(temp = sscape_read(devc, GA_HMCTL_REG)) | 0x80);
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}
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/*
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* Transfer one code block using DMA
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*/
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bcopy(block, audio_devs[devc->my_audiodev]->dmap_out->raw_buf, size);
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flags = splhigh();
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/******** INTERRUPTS DISABLED NOW ********/
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do_dma(devc, SSCAPE_DMA_A,
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audio_devs[devc->my_audiodev]->dmap_out->raw_buf_phys,
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size, 1);
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/*
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* Wait until transfer completes.
|
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*/
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sscape_sleep_flag.aborting = 0;
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sscape_sleep_flag.mode = WK_NONE;
|
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done = 0;
|
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timeout_val = 100;
|
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while (!done && timeout_val-- > 0) {
|
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int chn;
|
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sscape_sleeper = &chn;
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DO_SLEEP(chn, sscape_sleep_flag, 1);
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|
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done = 1;
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}
|
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|
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splx(flags);
|
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if (!done)
|
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return 0;
|
|
|
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if (flag & CPF_LAST) {
|
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/*
|
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* Take the board out of reset
|
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*/
|
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outb(PORT(HOST_CTRL), 0x00);
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outb(PORT(MIDI_CTRL), 0x00);
|
|
|
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temp = sscape_read(devc, GA_HMCTL_REG);
|
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temp |= 0x40;
|
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sscape_write(devc, GA_HMCTL_REG, temp); /* Kickstart the board */
|
|
|
|
/*
|
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* Wait until the ODB wakes up
|
|
*/
|
|
|
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flags = splhigh();
|
|
done = 0;
|
|
timeout_val = 5 * hz;
|
|
while (!done && timeout_val-- > 0) {
|
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int chn;
|
|
|
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sscape_sleeper = &chn;
|
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DO_SLEEP(chn, sscape_sleep_flag, 1);
|
|
|
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if (inb(PORT(HOST_DATA)) == 0xff) /* OBP startup acknowledge */
|
|
done = 1;
|
|
}
|
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splx(flags);
|
|
if (!done) {
|
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printf("SoundScape: The OBP didn't respond after code download\n");
|
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return 0;
|
|
}
|
|
flags = splhigh();
|
|
done = 0;
|
|
timeout_val = 5 * hz;
|
|
while (!done && timeout_val-- > 0) {
|
|
int chn;
|
|
|
|
sscape_sleeper = &chn;
|
|
DO_SLEEP(chn, sscape_sleep_flag, 1);
|
|
|
|
if (inb(PORT(HOST_DATA)) == 0xfe) /* Host startup acknowledge */
|
|
done = 1;
|
|
}
|
|
splx(flags);
|
|
if (!done) {
|
|
printf("SoundScape: OBP Initialization failed.\n");
|
|
return 0;
|
|
}
|
|
printf("SoundScape board of type %d initialized OK\n",
|
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get_board_type(devc));
|
|
|
|
set_control(devc, CTL_MASTER_VOL, 100);
|
|
set_control(devc, CTL_SYNTH_VOL, 100);
|
|
|
|
#ifdef SSCAPE_DEBUG3
|
|
/*
|
|
* Temporary debugging aid. Print contents of the registers
|
|
* after downloading the code.
|
|
*/
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 13; i++)
|
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printf("I%d = %02x (new value)\n", i, sscape_read(devc, i));
|
|
}
|
|
#endif
|
|
|
|
}
|
|
return 1;
|
|
}
|
|
|
|
static int
|
|
download_boot_block(void *dev_info, copr_buffer * buf)
|
|
{
|
|
if (buf->len <= 0 || buf->len > sizeof(buf->data))
|
|
return -(EINVAL);
|
|
|
|
if (!sscape_download_boot(devc, buf->data, buf->len, buf->flags)) {
|
|
printf("SSCAPE: Unable to load microcode block to the OBP.\n");
|
|
return -(EIO);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
sscape_coproc_ioctl(void *dev_info, u_int cmd, ioctl_arg arg, int local)
|
|
{
|
|
|
|
switch (cmd) {
|
|
case SNDCTL_COPR_RESET:
|
|
sscape_coproc_reset(dev_info);
|
|
return 0;
|
|
break;
|
|
|
|
case SNDCTL_COPR_LOAD:
|
|
{
|
|
copr_buffer *buf;
|
|
int err;
|
|
|
|
buf = (copr_buffer *) malloc(sizeof(copr_buffer), M_TEMP, M_WAITOK);
|
|
if (buf == NULL)
|
|
return -(ENOSPC);
|
|
bcopy(&(((char *) arg)[0]), (char *) buf, sizeof(*buf));
|
|
err = download_boot_block(dev_info, buf);
|
|
free(buf, M_TEMP);
|
|
return err;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
return -(EINVAL);
|
|
}
|
|
|
|
}
|
|
|
|
static coproc_operations sscape_coproc_operations =
|
|
{
|
|
"SoundScape M68K",
|
|
sscape_coproc_open,
|
|
sscape_coproc_close,
|
|
sscape_coproc_ioctl,
|
|
sscape_coproc_reset,
|
|
&dev_info
|
|
};
|
|
|
|
static int
|
|
sscape_audio_open(int dev, int mode)
|
|
{
|
|
u_long flags;
|
|
sscape_info *devc = (sscape_info *) audio_devs[dev]->devc;
|
|
|
|
flags = splhigh();
|
|
if (devc->opened) {
|
|
splx(flags);
|
|
return -(EBUSY);
|
|
}
|
|
devc->opened = 1;
|
|
splx(flags);
|
|
#ifdef SSCAPE_DEBUG4
|
|
/*
|
|
* Temporary debugging aid. Print contents of the registers when the
|
|
* device is opened.
|
|
*/
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 13; i++)
|
|
printf("I%d = %02x\n", i, sscape_read(devc, i));
|
|
}
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
sscape_audio_close(int dev)
|
|
{
|
|
u_long flags;
|
|
sscape_info *devc = (sscape_info *) audio_devs[dev]->devc;
|
|
|
|
DEB(printf("sscape_audio_close(void)\n"));
|
|
|
|
flags = splhigh();
|
|
|
|
devc->opened = 0;
|
|
|
|
splx(flags);
|
|
}
|
|
|
|
static int
|
|
set_speed(sscape_info * devc, int arg)
|
|
{
|
|
return 8000;
|
|
}
|
|
|
|
static int
|
|
set_channels(sscape_info * devc, int arg)
|
|
{
|
|
return 1;
|
|
}
|
|
|
|
static int
|
|
set_format(sscape_info * devc, int arg)
|
|
{
|
|
return AFMT_U8;
|
|
}
|
|
|
|
static int
|
|
sscape_audio_ioctl(int dev, u_int cmd, ioctl_arg arg, int local)
|
|
{
|
|
sscape_info *devc = (sscape_info *) audio_devs[dev]->devc;
|
|
|
|
switch (cmd) {
|
|
case SOUND_PCM_WRITE_RATE:
|
|
if (local)
|
|
return set_speed(devc, (int) arg);
|
|
return *(int *) arg = set_speed(devc, (*(int *) arg));
|
|
|
|
case SOUND_PCM_READ_RATE:
|
|
if (local)
|
|
return 8000;
|
|
return *(int *) arg = 8000;
|
|
|
|
case SNDCTL_DSP_STEREO:
|
|
if (local)
|
|
return set_channels(devc, (int) arg + 1) - 1;
|
|
return *(int *) arg = set_channels(devc, (*(int *) arg) + 1) - 1;
|
|
|
|
case SOUND_PCM_WRITE_CHANNELS:
|
|
if (local)
|
|
return set_channels(devc, (int) arg);
|
|
return *(int *) arg = set_channels(devc, (*(int *) arg));
|
|
|
|
case SOUND_PCM_READ_CHANNELS:
|
|
if (local)
|
|
return 1;
|
|
return *(int *) arg = 1;
|
|
|
|
case SNDCTL_DSP_SAMPLESIZE:
|
|
if (local)
|
|
return set_format(devc, (int) arg);
|
|
return *(int *) arg = set_format(devc, (*(int *) arg));
|
|
|
|
case SOUND_PCM_READ_BITS:
|
|
if (local)
|
|
return 8;
|
|
return *(int *) arg = 8;
|
|
|
|
default:;
|
|
}
|
|
return -(EINVAL);
|
|
}
|
|
|
|
static void
|
|
sscape_audio_output_block(int dev, u_long buf, int count, int intrflag, int dma_restart)
|
|
{
|
|
}
|
|
|
|
static void
|
|
sscape_audio_start_input(int dev, u_long buf, int count, int intrflag, int dma_restart)
|
|
{
|
|
}
|
|
|
|
static int
|
|
sscape_audio_prepare_for_input(int dev, int bsize, int bcount)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
sscape_audio_prepare_for_output(int dev, int bsize, int bcount)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
sscape_audio_halt(int dev)
|
|
{
|
|
}
|
|
|
|
static void
|
|
sscape_audio_reset(int dev)
|
|
{
|
|
sscape_audio_halt(dev);
|
|
}
|
|
|
|
|
|
#if !defined(EXCLUDE_NATIVE_PCM) && defined(CONFIG_AUDIO)
|
|
static struct audio_operations sscape_audio_operations =
|
|
{
|
|
"Not functional",
|
|
0,
|
|
AFMT_U8 | AFMT_S16_LE,
|
|
NULL,
|
|
sscape_audio_open,
|
|
sscape_audio_close,
|
|
sscape_audio_output_block,
|
|
sscape_audio_start_input,
|
|
sscape_audio_ioctl,
|
|
sscape_audio_prepare_for_input,
|
|
sscape_audio_prepare_for_output,
|
|
sscape_audio_reset,
|
|
sscape_audio_halt,
|
|
NULL,
|
|
NULL
|
|
};
|
|
#endif /* !defined(EXCLUDE_NATIVE_PCM) && defined(CONFIG_AUDIO) */
|
|
|
|
static int sscape_detected = 0;
|
|
|
|
void
|
|
attach_sscape(struct address_info * hw_config)
|
|
{
|
|
#ifndef SSCAPE_REGS
|
|
/*
|
|
* Config register values for Spea/V7 Media FX and Ensoniq S-2000.
|
|
* These values are card dependent. If you have another SoundScape
|
|
* based card, you have to find the correct values. Do the following:
|
|
* - Compile this driver with SSCAPE_DEBUG1 defined. - Shut down and
|
|
* power off your machine. - Boot with DOS so that the SSINIT.EXE
|
|
* program is run. - Warm boot to {Linux|SYSV|BSD} and write down the
|
|
* lines displayed when detecting the SoundScape. - Modify the
|
|
* following list to use the values printed during boot. Undefine the
|
|
* SSCAPE_DEBUG1
|
|
*/
|
|
#define SSCAPE_REGS { \
|
|
/* I0 */ 0x00, \
|
|
0xf0, /* Note! Ignored. Set always to 0xf0 */ \
|
|
0x20, /* Note! Ignored. Set always to 0x20 */ \
|
|
0x20, /* Note! Ignored. Set always to 0x20 */ \
|
|
0xf5, /* Ignored */ \
|
|
0x10, \
|
|
0x00, \
|
|
0x2e, /* I7 MEM config A. Likely to vary between models */ \
|
|
0x00, /* I8 MEM config B. Likely to vary between models */ \
|
|
/* I9 */ 0x40 /* Ignored */ \
|
|
}
|
|
#endif
|
|
|
|
u_long flags;
|
|
static u_char regs[10] = SSCAPE_REGS;
|
|
|
|
int i, irq_bits = 0xff;
|
|
|
|
if (sscape_detected != hw_config->io_base)
|
|
return;
|
|
|
|
if (old_hardware) {
|
|
valid_interrupts = valid_interrupts_old;
|
|
conf_printf("Ensoniq Soundscape (old)", hw_config);
|
|
} else
|
|
conf_printf("Ensoniq Soundscape", hw_config);
|
|
|
|
for (i = 0; i < sizeof(valid_interrupts); i++)
|
|
if (hw_config->irq == valid_interrupts[i]) {
|
|
irq_bits = i;
|
|
break;
|
|
}
|
|
if (hw_config->irq > 15 || (regs[4] = irq_bits == 0xff)) {
|
|
printf("Invalid IRQ%d\n", hw_config->irq);
|
|
return;
|
|
}
|
|
flags = splhigh();
|
|
|
|
for (i = 1; i < 10; i++)
|
|
switch (i) {
|
|
case 1: /* Host interrupt enable */
|
|
sscape_write(devc, i, 0xf0); /* All interrupts enabled */
|
|
break;
|
|
|
|
case 2: /* DMA A status/trigger register */
|
|
case 3: /* DMA B status/trigger register */
|
|
sscape_write(devc, i, 0x20); /* DMA channel disabled */
|
|
break;
|
|
|
|
case 4: /* Host interrupt config reg */
|
|
sscape_write(devc, i, 0xf0 | (irq_bits << 2) | irq_bits);
|
|
break;
|
|
|
|
case 5: /* Don't destroy CD-ROM DMA config bits (0xc0) */
|
|
sscape_write(devc, i, (regs[i] & 0x3f) |
|
|
(sscape_read(devc, i) & 0xc0));
|
|
break;
|
|
|
|
case 6: /* CD-ROM config. Don't touch. */
|
|
break;
|
|
|
|
case 9: /* Master control reg. Don't modify CR-ROM
|
|
* bits. Disable SB emul */
|
|
sscape_write(devc, i, (sscape_read(devc, i) & 0xf0) | 0x00);
|
|
break;
|
|
|
|
default:
|
|
sscape_write(devc, i, regs[i]);
|
|
}
|
|
|
|
splx(flags);
|
|
|
|
#ifdef SSCAPE_DEBUG2
|
|
/*
|
|
* Temporary debugging aid. Print contents of the registers after
|
|
* changing them.
|
|
*/
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 13; i++)
|
|
printf("I%d = %02x (new value)\n", i, sscape_read(devc, i));
|
|
}
|
|
#endif
|
|
|
|
#if defined(CONFIG_MIDI) && defined(CONFIG_MPU_EMU)
|
|
if (probe_mpu401(hw_config))
|
|
hw_config->always_detect = 1;
|
|
{
|
|
int prev_devs;
|
|
|
|
prev_devs = num_midis;
|
|
attach_mpu401(hw_config);
|
|
|
|
if (num_midis == (prev_devs + 1)) /* The MPU driver
|
|
* installed itself */
|
|
midi_devs[prev_devs]->coproc = &sscape_coproc_operations;
|
|
}
|
|
#endif
|
|
|
|
#ifndef EXCLUDE_NATIVE_PCM
|
|
/* Not supported yet */
|
|
|
|
#ifdef CONFIG_AUDIO
|
|
if (num_audiodevs < MAX_AUDIO_DEV) {
|
|
int my_dev;
|
|
|
|
audio_devs[my_dev = num_audiodevs++] = &sscape_audio_operations;
|
|
audio_devs[my_dev]->dmachan1 = hw_config->dma;
|
|
audio_devs[my_dev]->buffsize = DSP_BUFFSIZE;
|
|
audio_devs[my_dev]->devc = devc;
|
|
devc->my_audiodev = my_dev;
|
|
devc->opened = 0;
|
|
audio_devs[my_dev]->coproc = &sscape_coproc_operations;
|
|
if (snd_set_irq_handler(hw_config->irq, sscapeintr, devc->osp) < 0)
|
|
printf("Error: Can't allocate IRQ for SoundScape\n");
|
|
sscape_write(devc, GA_INTENA_REG, 0x80); /* Master IRQ enable */
|
|
} else
|
|
printf("SoundScape: More than enough audio devices detected\n");
|
|
#endif
|
|
#endif
|
|
devc->ok = 1;
|
|
devc->failed = 0;
|
|
return;
|
|
}
|
|
|
|
int
|
|
probe_sscape(struct address_info * hw_config)
|
|
{
|
|
u_char save;
|
|
|
|
devc->failed = 1;
|
|
devc->base = hw_config->io_base;
|
|
devc->irq = hw_config->irq;
|
|
devc->dma = hw_config->dma;
|
|
devc->osp = hw_config->osp;
|
|
|
|
if (sscape_detected != 0 && sscape_detected != hw_config->io_base)
|
|
return 0;
|
|
|
|
/*
|
|
* First check that the address register of "ODIE" is there and that
|
|
* it has exactly 4 writeable bits. First 4 bits
|
|
*/
|
|
if ((save = inb(PORT(ODIE_ADDR))) & 0xf0)
|
|
return 0;
|
|
|
|
outb(PORT(ODIE_ADDR), 0x00);
|
|
if (inb(PORT(ODIE_ADDR)) != 0x00)
|
|
return 0;
|
|
|
|
outb(PORT(ODIE_ADDR), 0xff);
|
|
if (inb(PORT(ODIE_ADDR)) != 0x0f)
|
|
return 0;
|
|
|
|
outb(PORT(ODIE_ADDR), save);
|
|
|
|
/*
|
|
* Now verify that some indirect registers return zero on some bits.
|
|
* This may break the driver with some future revisions of "ODIE"
|
|
* but...
|
|
*/
|
|
|
|
if (sscape_read(devc, 0) & 0x0c)
|
|
return 0;
|
|
|
|
if (sscape_read(devc, 1) & 0x0f)
|
|
return 0;
|
|
|
|
if (sscape_read(devc, 5) & 0x0f)
|
|
return 0;
|
|
|
|
#ifdef SSCAPE_DEBUG1
|
|
/*
|
|
* Temporary debugging aid. Print contents of the registers before
|
|
* changing them.
|
|
*/
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 13; i++)
|
|
printf("I%d = %02x (old value)\n", i, sscape_read(devc, i));
|
|
}
|
|
#endif
|
|
|
|
if (old_hardware) { /* Check that it's really an old Spea/Reveal card. */
|
|
u_char tmp;
|
|
int cc;
|
|
|
|
if (!((tmp = sscape_read(devc, GA_HMCTL_REG)) & 0xc0)) {
|
|
sscape_write(devc, GA_HMCTL_REG, tmp | 0x80);
|
|
for (cc = 0; cc < 200000; ++cc)
|
|
inb(devc->base + ODIE_ADDR);
|
|
} else
|
|
old_hardware = 0;
|
|
}
|
|
if (0) {
|
|
printf("sscape.c: Can't allocate DMA channel\n");
|
|
return 0;
|
|
}
|
|
sscape_detected = hw_config->io_base;
|
|
|
|
return 1;
|
|
}
|
|
|
|
int
|
|
probe_ss_mss(struct address_info * hw_config)
|
|
{
|
|
int i, irq_bits = 0xff;
|
|
|
|
if (devc->failed)
|
|
return 0;
|
|
|
|
if (devc->ok == 0) {
|
|
printf("SoundScape: Invalid initialization order.\n");
|
|
return 0;
|
|
}
|
|
for (i = 0; i < sizeof(valid_interrupts); i++)
|
|
if (hw_config->irq == valid_interrupts[i]) {
|
|
irq_bits = i;
|
|
break;
|
|
}
|
|
if (hw_config->irq > 15 || irq_bits == 0xff) {
|
|
printf("SoundScape: Invalid MSS IRQ%d\n", hw_config->irq);
|
|
return 0;
|
|
}
|
|
return ad1848_detect(hw_config->io_base, NULL, hw_config->osp);
|
|
}
|
|
|
|
void
|
|
attach_ss_mss(struct address_info * hw_config)
|
|
{
|
|
/*
|
|
* This routine configures the SoundScape card for use with the Win
|
|
* Sound System driver. The AD1848 codec interface uses the CD-ROM
|
|
* config registers of the "ODIE".
|
|
*/
|
|
|
|
int i, irq_bits = 0xff;
|
|
|
|
#ifndef CONFIG_NATIVE_PCM
|
|
int prev_devs = num_audiodevs;
|
|
#endif
|
|
|
|
/*
|
|
* Setup the DMA polarity.
|
|
*/
|
|
sscape_write(devc, GA_DMACFG_REG, 0x50);
|
|
|
|
/*
|
|
* Take the gate-arry off of the DMA channel.
|
|
*/
|
|
sscape_write(devc, GA_DMAB_REG, 0x20);
|
|
|
|
/*
|
|
* Init the AD1848 (CD-ROM) config reg.
|
|
*/
|
|
|
|
for (i = 0; i < sizeof(valid_interrupts); i++)
|
|
if (hw_config->irq == valid_interrupts[i]) {
|
|
irq_bits = i;
|
|
break;
|
|
}
|
|
sscape_write(devc, GA_CDCFG_REG, 0x89 | (hw_config->dma << 4) |
|
|
(irq_bits << 1));
|
|
|
|
if (hw_config->irq == devc->irq)
|
|
printf("SoundScape: Warning! WSS mode can't share IRQ with MIDI\n");
|
|
|
|
ad1848_init("SoundScape", hw_config->io_base,
|
|
hw_config->irq,
|
|
hw_config->dma,
|
|
hw_config->dma,
|
|
0,
|
|
devc->osp);
|
|
|
|
#ifndef CONFIG_NATIVE_PCM
|
|
/* Check if the AD1848 driver installed itself */
|
|
if (num_audiodevs == (prev_devs + 1))
|
|
audio_devs[prev_devs]->coproc = &sscape_coproc_operations;
|
|
#endif
|
|
|
|
return;
|
|
}
|
|
|
|
#endif
|