Andriy Gapon 593077d613 pmc_process_csw_out: ignore deleted counters ... I see the fllowing panic on AMD when exiting pmcstat: panic: [pmc,1473] pp_pmcval outside of expected range cpu=2 ri=17 pp_pmcval=fffffffffa529f5b pm_reloadcount=10000 It seems that at least on AMD a performance counter keeps counting after overflowing. When pmcstat exits it sets counters that it used to PMC_STATE_DELETED and waits until their use count goes to zero. amd_intr() wouldn't reload a counter in that state and, thus, a counter would be allowed to overflow. That means that the counter's value would be allowed to go outside the expected range. MFC after: 2 weeks		2016-11-10 11:12:45 +00:00
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hwpmc_amd.c	hwpmc: fix a race between amd_stop_pmc and amd_intr	2016-10-30 09:38:10 +00:00
hwpmc_amd.h
hwpmc_arm64_md.c
hwpmc_arm64.c
hwpmc_arm64.h
hwpmc_arm.c
hwpmc_armv7.c
hwpmc_armv7.h
hwpmc_core.c
hwpmc_core.h
hwpmc_e500.c
hwpmc_intel.c
hwpmc_logging.c	hwpmc: remove sys/capability.h backwards compatibility	2016-09-20 12:56:03 +00:00
hwpmc_mips24k.c
hwpmc_mips74k.c
hwpmc_mips.c
hwpmc_mod.c	pmc_process_csw_out: ignore deleted counters	2016-11-10 11:12:45 +00:00
hwpmc_mpc7xxx.c
hwpmc_octeon.c
hwpmc_pentium.c
hwpmc_pentium.h
hwpmc_piv.c
hwpmc_piv.h
hwpmc_powerpc.c
hwpmc_powerpc.h
hwpmc_ppc970.c
hwpmc_ppro.c
hwpmc_ppro.h
hwpmc_riscv.h
hwpmc_soft.c
hwpmc_soft.h
hwpmc_sparc64.c
hwpmc_tsc.c
hwpmc_tsc.h
hwpmc_uncore.c
hwpmc_uncore.h
hwpmc_x86.c
hwpmc_xscale.c
hwpmc_xscale.h
pmc_events.h