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which can be synthesised in Altera FPGAs. An altera_sdcardc device probes during the boot, and /dev/altera_sdcard devices come and go as inserted and removed. The device driver attaches directly to the Nexus, as is common for system-on-chip device drivers. This IP core suffers a number of significant limitations, including a lack of interrupt-driven I/O -- we must implement timer-driven polling, only CSD 0 cards (up to 2G) are supported, there are serious memory access issues that require the driver to verify writes to memory-mapped buffers, undocumented alignment requirements, and erroneous error returns. The driver must therefore work quite hard, despite a fairly simple hardware-software interface. The IP core also supports at most one outstanding I/O at a time, so is not a speed demon. However, with the above workarounds, and subject to performance problems, it works quite reliably in practice, and we can use it for read-write mounts of root file systems, etc. Sponsored by: DARPA, AFRL
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119 lines
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.\"-
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.\" Copyright (c) 2012 Robert N. M. Watson
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.\" All rights reserved.
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.\"
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.\" This software was developed by SRI International and the University of
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.\" Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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.\" ("CTSRD"), as part of the DARPA CRASH research programme.
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.\"
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.\" Redistribution and use in source and binary forms, with or without
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.\" modification, are permitted provided that the following conditions
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.\" are met:
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.\" 1. Redistributions of source code must retain the above copyright
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.\" notice, this list of conditions and the following disclaimer.
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.\" 2. Redistributions in binary form must reproduce the above copyright
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.\" notice, this list of conditions and the following disclaimer in the
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.\" documentation and/or other materials provided with the distribution.
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.\"
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.\" THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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.\" ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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.\" IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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.\" ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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.\" FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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.\" LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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.\" OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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.\" SUCH DAMAGE.
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.\"
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.\" $FreeBSD$
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.\"
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.Dd August 18, 2012
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.Dt ALTERA_SDCARD 4
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.Os
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.Sh NAME
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.Nm altera_sdcard
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.Nd driver for the Altera University Program Secure Data Card IP Core
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.Sh SYNOPSIS
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.Cd "device altera_sdcard"
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.Pp
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In
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.Pa /boot/device.hints :
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.Cd hint.altera_sdcardc.0.at="nexus0"
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.Cd hint.altera_sdcardc.0.maddr=0x7f008000
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.Cd hint.altera_sdcardc.0.msize=0x400
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.Sh DESCRIPTION
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The
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.Nm
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device driver provides support for the Altera University Program Secure Data
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Card (SD Card) IP Core device.
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A controller device,
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.Li altera_sdcardcX ,
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will be attached during boot.
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Inserted disks are presented as
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.Xr disk 9
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devices,
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.Li altera_sdcardX ,
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corresponding to the controller number.
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.Sh HARDWARE
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The current version of the
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.Nm
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driver supports the SD Card IP core as described in the August 2011 version of
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Altera's documentation.
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The core supports only cards up to 2G (CSD 0); larger cards, or cards using
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newer CSD versions, will not be detected.
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The IP core has two key limitations: a lack of interrupt support, requiring
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timer-driven polling to detect I/O completion, and support for only single
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512-byte block read and write operations at a time.
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The combined effect of those two limits is that the system clock rate,
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.Dv HZ ,
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must be set to at least 200 in order to accomplish the maximum 100KB/s data
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rate supported by the IP core.
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.Sh SEE ALSO
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.Xr disk 9
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.Rs
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.%T Altera University Program Secure Data Card IP Core
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.%D August 2011
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.%I Altera Corporation - University Program
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.%U ftp://ftp.altera.com/up/pub/Altera_Material/11.0/University_Program_IP_Cores/Memory/SD_Card_Interface_for_SoPC_Builder.pdf
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.Re
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.Sh HISTORY
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The
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.Nm
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device driver first appeared in
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.Fx 10.0 .
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.Sh AUTHORS
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The
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.Nm
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device driver and this manual page were
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developed by SRI International and the University of Cambridge Computer
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Laboratory under DARPA/AFRL contract
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.Pq FA8750-10-C-0237
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.Pq Do CTSRD Dc ,
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as part of the DARPA CRASH research programme.
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This device driver was written by
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.An Robert N. M. Watson .
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.Sh BUGS
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.Nm
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contains a number of work-arounds for IP core bugs.
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Perhaps most critically,
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.Nm
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ignores the CRC error bit returned in the RR1 register, which appears to be
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unexpectedly set by the IP core.
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.Pp
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.Nm
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uses fixed polling intervals are used for card insertion/removal and
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I/O completion detection; an adaptive strategy might improve performance by
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reducing the latency to detecting completed I/O.
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However, in our experiments, using polling rates greater than 200 times a
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second did not improve performance.
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.Pp
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.Nm
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supports only a
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.Li nexus
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bus attachment, which is appropriate for system-on-chip busses such as
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Altera's Avalon bus.
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If the IP core is configured off of another bus type, then additional bus
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attachments will be required.
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