b29224c2a0
to see what features they may support before calling identify/probe/attach. This is necessary because the ACPI 3.0 spec requires driver support be advertised before running any methods. For now, the flags are as specified in for the _PDC and _OSC methods but we can support private flags as needed. Add an implementation of this for acpi_cpu. It checks all its children (notably cpufreq drivers) and calls the _PDC method to report the results.
966 lines
29 KiB
C
966 lines
29 KiB
C
/*-
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* Copyright (c) 2003-2005 Nate Lawson (SDG)
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* Copyright (c) 2001 Michael Smith
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_acpi.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/module.h>
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#include <sys/pcpu.h>
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#include <sys/power.h>
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#include <sys/proc.h>
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#include <sys/sbuf.h>
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#include <sys/smp.h>
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#include <dev/pci/pcivar.h>
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#include <machine/atomic.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include "acpi.h"
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#include <dev/acpica/acpivar.h>
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/*
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* Support for ACPI Processor devices, including C[1-3] sleep states.
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*
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* TODO: implement scans of all CPUs to be sure all Cx states are
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* equivalent.
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*/
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/* Hooks for the ACPI CA debugging infrastructure */
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#define _COMPONENT ACPI_PROCESSOR
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ACPI_MODULE_NAME("PROCESSOR")
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struct acpi_cx {
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struct resource *p_lvlx; /* Register to read to enter state. */
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uint32_t type; /* C1-3 (C4 and up treated as C3). */
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uint32_t trans_lat; /* Transition latency (usec). */
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uint32_t power; /* Power consumed (mW). */
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int res_type; /* Resource type for p_lvlx. */
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};
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#define MAX_CX_STATES 8
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struct acpi_cpu_softc {
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device_t cpu_dev;
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ACPI_HANDLE cpu_handle;
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struct pcpu *cpu_pcpu;
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uint32_t cpu_acpi_id; /* ACPI processor id */
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uint32_t cpu_p_blk; /* ACPI P_BLK location */
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uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
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struct acpi_cx cpu_cx_states[MAX_CX_STATES];
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int cpu_cx_count; /* Number of valid Cx states. */
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int cpu_prev_sleep;/* Last idle sleep duration. */
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int cpu_features; /* Child driver supported features. */
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};
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struct acpi_cpu_device {
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struct resource_list ad_rl;
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};
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#define CPU_GET_REG(reg, width) \
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(bus_space_read_ ## width(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0))
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#define CPU_SET_REG(reg, width, val) \
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(bus_space_write_ ## width(rman_get_bustag((reg)), \
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rman_get_bushandle((reg)), 0, (val)))
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#define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
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#define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
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#define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
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#define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
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#define PCI_VENDOR_INTEL 0x8086
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#define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
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#define PCI_REVISION_A_STEP 0
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#define PCI_REVISION_B_STEP 1
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#define PCI_REVISION_4E 2
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#define PCI_REVISION_4M 3
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/* Platform hardware resource information. */
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static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
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static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
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static int cpu_rid; /* Driver-wide resource id. */
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static int cpu_quirks; /* Indicate any hardware bugs. */
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/* Runtime state. */
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static int cpu_cx_count; /* Number of valid states */
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static int cpu_non_c3; /* Index of lowest non-C3 state. */
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static u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
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/* Values for sysctl. */
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static struct sysctl_ctx_list acpi_cpu_sysctl_ctx;
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static struct sysctl_oid *acpi_cpu_sysctl_tree;
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static int cpu_cx_lowest;
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static char cpu_cx_supported[64];
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static device_t *cpu_devices;
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static int cpu_ndevices;
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static struct acpi_cpu_softc **cpu_softc;
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ACPI_SERIAL_DECL(cpu, "ACPI CPU");
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static int acpi_cpu_probe(device_t dev);
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static int acpi_cpu_attach(device_t dev);
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static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
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uint32_t *cpu_id);
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static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
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static device_t acpi_cpu_add_child(device_t dev, int order, const char *name,
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int unit);
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static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
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uintptr_t *result);
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static int acpi_cpu_shutdown(device_t dev);
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static int acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
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static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
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static void acpi_cpu_startup(void *arg);
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static void acpi_cpu_startup_cx(void);
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static void acpi_cpu_idle(void);
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static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
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static int acpi_cpu_quirks(struct acpi_cpu_softc *sc);
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static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
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static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
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static device_method_t acpi_cpu_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, acpi_cpu_probe),
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DEVMETHOD(device_attach, acpi_cpu_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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/* Bus interface */
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DEVMETHOD(bus_add_child, acpi_cpu_add_child),
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DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
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DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
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DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
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DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
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DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
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DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
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DEVMETHOD(bus_driver_added, bus_generic_driver_added),
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DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
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DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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{0, 0}
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};
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static driver_t acpi_cpu_driver = {
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"cpu",
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acpi_cpu_methods,
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sizeof(struct acpi_cpu_softc),
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};
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static devclass_t acpi_cpu_devclass;
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DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
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MODULE_DEPEND(cpu, acpi, 1, 1, 1);
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static int
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acpi_cpu_probe(device_t dev)
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{
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int acpi_id, cpu_id;
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ACPI_BUFFER buf;
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ACPI_HANDLE handle;
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ACPI_OBJECT *obj;
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ACPI_STATUS status;
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if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
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return (ENXIO);
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handle = acpi_get_handle(dev);
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if (cpu_softc == NULL)
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cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
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(mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
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/* Get our Processor object. */
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buf.Pointer = NULL;
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buf.Length = ACPI_ALLOCATE_BUFFER;
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status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "probe failed to get Processor obj - %s\n",
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AcpiFormatException(status));
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return (ENXIO);
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}
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obj = (ACPI_OBJECT *)buf.Pointer;
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if (obj->Type != ACPI_TYPE_PROCESSOR) {
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device_printf(dev, "Processor object has bad type %d\n", obj->Type);
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AcpiOsFree(obj);
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return (ENXIO);
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}
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/*
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* Find the processor associated with our unit. We could use the
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* ProcId as a key, however, some boxes do not have the same values
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* in their Processor object as the ProcId values in the MADT.
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*/
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acpi_id = obj->Processor.ProcId;
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AcpiOsFree(obj);
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if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
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return (ENXIO);
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/*
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* Check if we already probed this processor. We scan the bus twice
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* so it's possible we've already seen this one.
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*/
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if (cpu_softc[cpu_id] != NULL)
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return (ENXIO);
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/* Mark this processor as in-use and save our derived id for attach. */
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cpu_softc[cpu_id] = (void *)1;
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acpi_set_magic(dev, cpu_id);
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device_set_desc(dev, "ACPI CPU");
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return (0);
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}
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static int
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acpi_cpu_attach(device_t dev)
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{
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ACPI_BUFFER buf;
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ACPI_OBJECT *obj;
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struct pcpu *pcpu_data;
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struct acpi_cpu_softc *sc;
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struct acpi_softc *acpi_sc;
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ACPI_STATUS status;
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u_int features;
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int cpu_id, drv_count, i;
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driver_t **drivers;
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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sc = device_get_softc(dev);
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sc->cpu_dev = dev;
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sc->cpu_handle = acpi_get_handle(dev);
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cpu_id = acpi_get_magic(dev);
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cpu_softc[cpu_id] = sc;
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pcpu_data = pcpu_find(cpu_id);
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pcpu_data->pc_device = dev;
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sc->cpu_pcpu = pcpu_data;
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cpu_smi_cmd = AcpiGbl_FADT->SmiCmd;
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cpu_cst_cnt = AcpiGbl_FADT->CstCnt;
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buf.Pointer = NULL;
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buf.Length = ACPI_ALLOCATE_BUFFER;
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status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
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if (ACPI_FAILURE(status)) {
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device_printf(dev, "attach failed to get Processor obj - %s\n",
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AcpiFormatException(status));
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return (ENXIO);
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}
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obj = (ACPI_OBJECT *)buf.Pointer;
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sc->cpu_p_blk = obj->Processor.PblkAddress;
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sc->cpu_p_blk_len = obj->Processor.PblkLength;
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sc->cpu_acpi_id = obj->Processor.ProcId;
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AcpiOsFree(obj);
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ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
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device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
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acpi_sc = acpi_device_get_parent_softc(dev);
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sysctl_ctx_init(&acpi_cpu_sysctl_ctx);
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acpi_cpu_sysctl_tree = SYSCTL_ADD_NODE(&acpi_cpu_sysctl_ctx,
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SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
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CTLFLAG_RD, 0, "");
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/*
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* Before calling any CPU methods, collect child driver feature hints
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* and notify ACPI of them.
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*/
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if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
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for (i = 0; i < drv_count; i++) {
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if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
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sc->cpu_features |= features;
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}
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free(drivers, M_TEMP);
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}
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if (sc->cpu_features)
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acpi_SetInteger(sc->cpu_dev, "_PDC", sc->cpu_features);
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/*
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* Probe for Cx state support. If it isn't present, free up unused
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* resources.
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*/
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if (acpi_cpu_cx_probe(sc) == 0) {
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status = AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
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acpi_cpu_notify, sc);
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if (device_get_unit(dev) == 0)
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AcpiOsQueueForExecution(OSD_PRIORITY_LO, acpi_cpu_startup, NULL);
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} else
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sysctl_ctx_free(&acpi_cpu_sysctl_ctx);
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/* Finally, call identify and probe/attach for child devices. */
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bus_generic_probe(dev);
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bus_generic_attach(dev);
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return (0);
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}
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/*
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* Find the nth present CPU and return its pc_cpuid as well as set the
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* pc_acpi_id from the most reliable source.
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*/
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static int
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acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
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{
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struct pcpu *pcpu_data;
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uint32_t i;
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KASSERT(acpi_id != NULL, ("Null acpi_id"));
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KASSERT(cpu_id != NULL, ("Null cpu_id"));
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for (i = 0; i <= mp_maxid; i++) {
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if (CPU_ABSENT(i))
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continue;
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pcpu_data = pcpu_find(i);
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KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
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if (idx-- == 0) {
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/*
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* If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
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* override it with the value from the ASL. Otherwise, if the
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* two don't match, prefer the MADT-derived value. Finally,
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* return the pc_cpuid to reference this processor.
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*/
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if (pcpu_data->pc_acpi_id == 0xffffffff)
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pcpu_data->pc_acpi_id = *acpi_id;
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else if (pcpu_data->pc_acpi_id != *acpi_id)
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*acpi_id = pcpu_data->pc_acpi_id;
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*cpu_id = pcpu_data->pc_cpuid;
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return (0);
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}
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}
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return (ESRCH);
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}
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|
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static struct resource_list *
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acpi_cpu_get_rlist(device_t dev, device_t child)
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{
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struct acpi_cpu_device *ad;
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ad = device_get_ivars(child);
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if (ad == NULL)
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return (NULL);
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return (&ad->ad_rl);
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}
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|
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static device_t
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acpi_cpu_add_child(device_t dev, int order, const char *name, int unit)
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{
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struct acpi_cpu_device *ad;
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device_t child;
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if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
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return (NULL);
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resource_list_init(&ad->ad_rl);
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child = device_add_child_ordered(dev, order, name, unit);
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if (child != NULL)
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device_set_ivars(child, ad);
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else
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free(ad, M_TEMP);
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return (child);
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}
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|
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static int
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acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
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{
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struct acpi_cpu_softc *sc;
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|
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sc = device_get_softc(dev);
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switch (index) {
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case ACPI_IVAR_HANDLE:
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*result = (uintptr_t)sc->cpu_handle;
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break;
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case CPU_IVAR_PCPU:
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*result = (uintptr_t)sc->cpu_pcpu;
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break;
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default:
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return (ENOENT);
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}
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return (0);
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|
}
|
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|
|
static int
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acpi_cpu_shutdown(device_t dev)
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|
{
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ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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/* Allow children to shutdown first. */
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bus_generic_shutdown(dev);
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/* Disable any entry to the idle function. */
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cpu_cx_count = 0;
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/* Signal and wait for all processors to exit acpi_cpu_idle(). */
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smp_rendezvous(NULL, NULL, NULL, NULL);
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return_VALUE (0);
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}
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|
|
static int
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acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
|
|
{
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|
ACPI_GENERIC_ADDRESS gas;
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struct acpi_cx *cx_ptr;
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int error;
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|
|
|
ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
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|
|
|
/*
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|
* Bus mastering arbitration control is needed to keep caches coherent
|
|
* while sleeping in C3. If it's not present but a working flush cache
|
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* instruction is present, flush the caches before entering C3 instead.
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|
* Otherwise, just disable C3 completely.
|
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*/
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|
if (AcpiGbl_FADT->V1_Pm2CntBlk == 0 || AcpiGbl_FADT->Pm2CntLen == 0) {
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if (AcpiGbl_FADT->WbInvd && AcpiGbl_FADT->WbInvdFlush == 0) {
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cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
|
|
"acpi_cpu%d: no BM control, using flush cache method\n",
|
|
device_get_unit(sc->cpu_dev)));
|
|
} else {
|
|
cpu_quirks |= CPU_QUIRK_NO_C3;
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
|
|
"acpi_cpu%d: no BM control, C3 not available\n",
|
|
device_get_unit(sc->cpu_dev)));
|
|
}
|
|
}
|
|
|
|
/*
|
|
* First, check for the ACPI 2.0 _CST sleep states object.
|
|
* If not usable, fall back to the P_BLK's P_LVL2 and P_LVL3.
|
|
*/
|
|
sc->cpu_cx_count = 0;
|
|
error = acpi_cpu_cx_cst(sc);
|
|
if (error != 0) {
|
|
cx_ptr = sc->cpu_cx_states;
|
|
|
|
/* C1 has been required since just after ACPI 1.0 */
|
|
cx_ptr->type = ACPI_STATE_C1;
|
|
cx_ptr->trans_lat = 0;
|
|
cpu_non_c3 = 0;
|
|
cx_ptr++;
|
|
sc->cpu_cx_count++;
|
|
|
|
/*
|
|
* The spec says P_BLK must be 6 bytes long. However, some systems
|
|
* use it to indicate a fractional set of features present so we
|
|
* take 5 as C2. Some may also have a value of 7 to indicate
|
|
* another C3 but most use _CST for this (as required) and having
|
|
* "only" C1-C3 is not a hardship.
|
|
*/
|
|
if (sc->cpu_p_blk_len < 5)
|
|
goto done;
|
|
|
|
/* Validate and allocate resources for C2 (P_LVL2). */
|
|
gas.AddressSpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
|
|
gas.RegisterBitWidth = 8;
|
|
if (AcpiGbl_FADT->Plvl2Lat <= 100) {
|
|
gas.Address = sc->cpu_p_blk + 4;
|
|
acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas,
|
|
&cx_ptr->p_lvlx);
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
cpu_rid++;
|
|
cx_ptr->type = ACPI_STATE_C2;
|
|
cx_ptr->trans_lat = AcpiGbl_FADT->Plvl2Lat;
|
|
cpu_non_c3 = 1;
|
|
cx_ptr++;
|
|
sc->cpu_cx_count++;
|
|
}
|
|
}
|
|
if (sc->cpu_p_blk_len < 6)
|
|
goto done;
|
|
|
|
/* Validate and allocate resources for C3 (P_LVL3). */
|
|
if (AcpiGbl_FADT->Plvl3Lat <= 1000 &&
|
|
(cpu_quirks & CPU_QUIRK_NO_C3) == 0) {
|
|
gas.Address = sc->cpu_p_blk + 5;
|
|
acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &cpu_rid, &gas,
|
|
&cx_ptr->p_lvlx);
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
cpu_rid++;
|
|
cx_ptr->type = ACPI_STATE_C3;
|
|
cx_ptr->trans_lat = AcpiGbl_FADT->Plvl3Lat;
|
|
cx_ptr++;
|
|
sc->cpu_cx_count++;
|
|
}
|
|
}
|
|
}
|
|
|
|
done:
|
|
/* If no valid registers were found, don't attach. */
|
|
if (sc->cpu_cx_count == 0)
|
|
return (ENXIO);
|
|
|
|
/* Use initial sleep value of 1 sec. to start with lowest idle state. */
|
|
sc->cpu_prev_sleep = 1000000;
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Parse a _CST package and set up its Cx states. Since the _CST object
|
|
* can change dynamically, our notify handler may call this function
|
|
* to clean up and probe the new _CST package.
|
|
*/
|
|
static int
|
|
acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
|
|
{
|
|
struct acpi_cx *cx_ptr;
|
|
ACPI_STATUS status;
|
|
ACPI_BUFFER buf;
|
|
ACPI_OBJECT *top;
|
|
ACPI_OBJECT *pkg;
|
|
uint32_t count;
|
|
int i;
|
|
|
|
ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
|
|
|
|
buf.Pointer = NULL;
|
|
buf.Length = ACPI_ALLOCATE_BUFFER;
|
|
status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
|
|
if (ACPI_FAILURE(status))
|
|
return (ENXIO);
|
|
|
|
/* _CST is a package with a count and at least one Cx package. */
|
|
top = (ACPI_OBJECT *)buf.Pointer;
|
|
if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
|
|
device_printf(sc->cpu_dev, "Invalid _CST package\n");
|
|
AcpiOsFree(buf.Pointer);
|
|
return (ENXIO);
|
|
}
|
|
if (count != top->Package.Count - 1) {
|
|
device_printf(sc->cpu_dev, "Invalid _CST state count (%d != %d)\n",
|
|
count, top->Package.Count - 1);
|
|
count = top->Package.Count - 1;
|
|
}
|
|
if (count > MAX_CX_STATES) {
|
|
device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
|
|
count = MAX_CX_STATES;
|
|
}
|
|
|
|
/* Set up all valid states. */
|
|
sc->cpu_cx_count = 0;
|
|
cx_ptr = sc->cpu_cx_states;
|
|
for (i = 0; i < count; i++) {
|
|
pkg = &top->Package.Elements[i + 1];
|
|
if (!ACPI_PKG_VALID(pkg, 4) ||
|
|
acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
|
|
acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
|
|
acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
|
|
|
|
device_printf(sc->cpu_dev, "Skipping invalid Cx state package\n");
|
|
continue;
|
|
}
|
|
|
|
/* Validate the state to see if we should use it. */
|
|
switch (cx_ptr->type) {
|
|
case ACPI_STATE_C1:
|
|
cpu_non_c3 = i;
|
|
cx_ptr++;
|
|
sc->cpu_cx_count++;
|
|
continue;
|
|
case ACPI_STATE_C2:
|
|
if (cx_ptr->trans_lat > 100) {
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
|
|
"acpi_cpu%d: C2[%d] not available.\n",
|
|
device_get_unit(sc->cpu_dev), i));
|
|
continue;
|
|
}
|
|
cpu_non_c3 = i;
|
|
break;
|
|
case ACPI_STATE_C3:
|
|
default:
|
|
if (cx_ptr->trans_lat > 1000 ||
|
|
(cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
|
|
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
|
|
"acpi_cpu%d: C3[%d] not available.\n",
|
|
device_get_unit(sc->cpu_dev), i));
|
|
continue;
|
|
}
|
|
break;
|
|
}
|
|
|
|
#ifdef notyet
|
|
/* Free up any previous register. */
|
|
if (cx_ptr->p_lvlx != NULL) {
|
|
bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
|
|
cx_ptr->p_lvlx = NULL;
|
|
}
|
|
#endif
|
|
|
|
/* Allocate the control register for C2 or C3. */
|
|
acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &cpu_rid,
|
|
&cx_ptr->p_lvlx);
|
|
if (cx_ptr->p_lvlx) {
|
|
cpu_rid++;
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO,
|
|
"acpi_cpu%d: Got C%d - %d latency\n",
|
|
device_get_unit(sc->cpu_dev), cx_ptr->type,
|
|
cx_ptr->trans_lat));
|
|
cx_ptr++;
|
|
sc->cpu_cx_count++;
|
|
}
|
|
}
|
|
AcpiOsFree(buf.Pointer);
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
* Call this *after* all CPUs have been attached.
|
|
*/
|
|
static void
|
|
acpi_cpu_startup(void *arg)
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
int count, i;
|
|
|
|
/* Get set of CPU devices */
|
|
devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
|
|
|
|
/* Check for quirks via the first CPU device. */
|
|
sc = device_get_softc(cpu_devices[0]);
|
|
acpi_cpu_quirks(sc);
|
|
|
|
/*
|
|
* Make sure all the processors' Cx counts match. We should probably
|
|
* also check the contents of each. However, no known systems have
|
|
* non-matching Cx counts so we'll deal with this later.
|
|
*/
|
|
count = MAX_CX_STATES;
|
|
for (i = 0; i < cpu_ndevices; i++) {
|
|
sc = device_get_softc(cpu_devices[i]);
|
|
count = min(sc->cpu_cx_count, count);
|
|
}
|
|
cpu_cx_count = count;
|
|
|
|
/* Perform Cx final initialization. */
|
|
sc = device_get_softc(cpu_devices[0]);
|
|
if (cpu_cx_count > 0)
|
|
acpi_cpu_startup_cx();
|
|
}
|
|
|
|
static void
|
|
acpi_cpu_startup_cx()
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
struct sbuf sb;
|
|
int i;
|
|
|
|
/*
|
|
* Set up the list of Cx states, eliminating C3 states by truncating
|
|
* cpu_cx_count if quirks indicate C3 is not usable.
|
|
*/
|
|
sc = device_get_softc(cpu_devices[0]);
|
|
sbuf_new(&sb, cpu_cx_supported, sizeof(cpu_cx_supported), SBUF_FIXEDLEN);
|
|
for (i = 0; i < cpu_cx_count; i++) {
|
|
if ((cpu_quirks & CPU_QUIRK_NO_C3) == 0 ||
|
|
sc->cpu_cx_states[i].type != ACPI_STATE_C3)
|
|
sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
|
|
else
|
|
cpu_cx_count = i;
|
|
}
|
|
sbuf_trim(&sb);
|
|
sbuf_finish(&sb);
|
|
SYSCTL_ADD_STRING(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_supported", CTLFLAG_RD, cpu_cx_supported,
|
|
0, "Cx/microsecond values for supported Cx states");
|
|
SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
|
|
NULL, 0, acpi_cpu_cx_lowest_sysctl, "A",
|
|
"lowest Cx sleep state to use");
|
|
SYSCTL_ADD_PROC(&acpi_cpu_sysctl_ctx,
|
|
SYSCTL_CHILDREN(acpi_cpu_sysctl_tree),
|
|
OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
|
|
NULL, 0, acpi_cpu_usage_sysctl, "A",
|
|
"percent usage for each Cx state");
|
|
|
|
#ifdef notyet
|
|
/* Signal platform that we can handle _CST notification. */
|
|
if (cpu_cst_cnt != 0) {
|
|
ACPI_LOCK(acpi);
|
|
AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
|
|
ACPI_UNLOCK(acpi);
|
|
}
|
|
#endif
|
|
|
|
/* Take over idling from cpu_idle_default(). */
|
|
cpu_idle_hook = acpi_cpu_idle;
|
|
}
|
|
|
|
/*
|
|
* Idle the CPU in the lowest state possible. This function is called with
|
|
* interrupts disabled. Note that once it re-enables interrupts, a task
|
|
* switch can occur so do not access shared data (i.e. the softc) after
|
|
* interrupts are re-enabled.
|
|
*/
|
|
static void
|
|
acpi_cpu_idle()
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
struct acpi_cx *cx_next;
|
|
uint32_t start_time, end_time;
|
|
int bm_active, cx_next_idx, i;
|
|
|
|
/* If disabled, return immediately. */
|
|
if (cpu_cx_count == 0) {
|
|
ACPI_ENABLE_IRQS();
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* Look up our CPU id to get our softc. If it's NULL, we'll use C1
|
|
* since there is no ACPI processor object for this CPU. This occurs
|
|
* for logical CPUs in the HTT case.
|
|
*/
|
|
sc = cpu_softc[PCPU_GET(cpuid)];
|
|
if (sc == NULL) {
|
|
acpi_cpu_c1();
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* If we slept 100 us or more, use the lowest Cx state. Otherwise,
|
|
* find the lowest state that has a latency less than or equal to
|
|
* the length of our last sleep.
|
|
*/
|
|
cx_next_idx = cpu_cx_lowest;
|
|
if (sc->cpu_prev_sleep < 100)
|
|
for (i = cpu_cx_lowest; i >= 0; i--)
|
|
if (sc->cpu_cx_states[i].trans_lat <= sc->cpu_prev_sleep) {
|
|
cx_next_idx = i;
|
|
break;
|
|
}
|
|
|
|
/*
|
|
* Check for bus master activity. If there was activity, clear
|
|
* the bit and use the lowest non-C3 state. Note that the USB
|
|
* driver polling for new devices keeps this bit set all the
|
|
* time if USB is loaded.
|
|
*/
|
|
if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
|
|
AcpiGetRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active,
|
|
ACPI_MTX_DO_NOT_LOCK);
|
|
if (bm_active != 0) {
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1,
|
|
ACPI_MTX_DO_NOT_LOCK);
|
|
cx_next_idx = min(cx_next_idx, cpu_non_c3);
|
|
}
|
|
}
|
|
|
|
/* Select the next state and update statistics. */
|
|
cx_next = &sc->cpu_cx_states[cx_next_idx];
|
|
cpu_cx_stats[cx_next_idx]++;
|
|
KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
|
|
|
|
/*
|
|
* Execute HLT (or equivalent) and wait for an interrupt. We can't
|
|
* calculate the time spent in C1 since the place we wake up is an
|
|
* ISR. Assume we slept one quantum and return.
|
|
*/
|
|
if (cx_next->type == ACPI_STATE_C1) {
|
|
sc->cpu_prev_sleep = 1000000 / hz;
|
|
acpi_cpu_c1();
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* For C3, disable bus master arbitration and enable bus master wake
|
|
* if BM control is available, otherwise flush the CPU cache.
|
|
*/
|
|
if (cx_next->type == ACPI_STATE_C3) {
|
|
if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
|
|
AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 1, ACPI_MTX_DO_NOT_LOCK);
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 1,
|
|
ACPI_MTX_DO_NOT_LOCK);
|
|
} else
|
|
ACPI_FLUSH_CPU_CACHE();
|
|
}
|
|
|
|
/*
|
|
* Read from P_LVLx to enter C2(+), checking time spent asleep.
|
|
* Use the ACPI timer for measuring sleep time. Since we need to
|
|
* get the time very close to the CPU start/stop clock logic, this
|
|
* is the only reliable time source.
|
|
*/
|
|
AcpiHwLowLevelRead(32, &start_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
CPU_GET_REG(cx_next->p_lvlx, 1);
|
|
|
|
/*
|
|
* Read the end time twice. Since it may take an arbitrary time
|
|
* to enter the idle state, the first read may be executed before
|
|
* the processor has stopped. Doing it again provides enough
|
|
* margin that we are certain to have a correct value.
|
|
*/
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
AcpiHwLowLevelRead(32, &end_time, &AcpiGbl_FADT->XPmTmrBlk);
|
|
|
|
/* Enable bus master arbitration and disable bus master wakeup. */
|
|
if (cx_next->type == ACPI_STATE_C3 &&
|
|
(cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
|
|
AcpiSetRegister(ACPI_BITREG_ARB_DISABLE, 0, ACPI_MTX_DO_NOT_LOCK);
|
|
AcpiSetRegister(ACPI_BITREG_BUS_MASTER_RLD, 0, ACPI_MTX_DO_NOT_LOCK);
|
|
}
|
|
|
|
/* Find the actual time asleep in microseconds, minus overhead. */
|
|
end_time = acpi_TimerDelta(end_time, start_time);
|
|
sc->cpu_prev_sleep = PM_USEC(end_time) - cx_next->trans_lat;
|
|
ACPI_ENABLE_IRQS();
|
|
}
|
|
|
|
/*
|
|
* Re-evaluate the _CST object when we are notified that it changed.
|
|
*
|
|
* XXX Re-evaluation disabled until locking is done.
|
|
*/
|
|
static void
|
|
acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
|
|
{
|
|
struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
|
|
|
|
if (notify != ACPI_NOTIFY_CX_STATES)
|
|
return;
|
|
|
|
device_printf(sc->cpu_dev, "Cx states changed\n");
|
|
/* acpi_cpu_cx_cst(sc); */
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_quirks(struct acpi_cpu_softc *sc)
|
|
{
|
|
device_t acpi_dev;
|
|
|
|
/*
|
|
* C3 on multiple CPUs requires using the expensive flush cache
|
|
* instruction.
|
|
*/
|
|
if (mp_ncpus > 1)
|
|
cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
|
|
|
|
/* Look for various quirks of the PIIX4 part. */
|
|
acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
|
|
if (acpi_dev != NULL) {
|
|
switch (pci_get_revid(acpi_dev)) {
|
|
/*
|
|
* Disable C3 support for all PIIX4 chipsets. Some of these parts
|
|
* do not report the BMIDE status to the BM status register and
|
|
* others have a livelock bug if Type-F DMA is enabled. Linux
|
|
* works around the BMIDE bug by reading the BM status directly
|
|
* but we take the simpler approach of disabling C3 for these
|
|
* parts.
|
|
*
|
|
* See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
|
|
* Livelock") from the January 2002 PIIX4 specification update.
|
|
* Applies to all PIIX4 models.
|
|
*/
|
|
case PCI_REVISION_4E:
|
|
case PCI_REVISION_4M:
|
|
cpu_quirks |= CPU_QUIRK_NO_C3;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
struct sbuf sb;
|
|
char buf[128];
|
|
int i;
|
|
uintmax_t fract, sum, whole;
|
|
|
|
sum = 0;
|
|
for (i = 0; i < cpu_cx_count; i++)
|
|
sum += cpu_cx_stats[i];
|
|
sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
|
|
for (i = 0; i < cpu_cx_count; i++) {
|
|
if (sum > 0) {
|
|
whole = (uintmax_t)cpu_cx_stats[i] * 100;
|
|
fract = (whole % sum) * 100;
|
|
sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
|
|
(u_int)(fract / sum));
|
|
} else
|
|
sbuf_printf(&sb, "0%% ");
|
|
}
|
|
sbuf_trim(&sb);
|
|
sbuf_finish(&sb);
|
|
sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
|
|
sbuf_delete(&sb);
|
|
|
|
return (0);
|
|
}
|
|
|
|
static int
|
|
acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
|
|
{
|
|
struct acpi_cpu_softc *sc;
|
|
char state[8];
|
|
int val, error, i;
|
|
|
|
sc = device_get_softc(cpu_devices[0]);
|
|
snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
|
|
error = sysctl_handle_string(oidp, state, sizeof(state), req);
|
|
if (error != 0 || req->newptr == NULL)
|
|
return (error);
|
|
if (strlen(state) < 2 || toupper(state[0]) != 'C')
|
|
return (EINVAL);
|
|
val = (int) strtol(state + 1, NULL, 10) - 1;
|
|
if (val < 0 || val > cpu_cx_count - 1)
|
|
return (EINVAL);
|
|
|
|
ACPI_SERIAL_BEGIN(cpu);
|
|
cpu_cx_lowest = val;
|
|
|
|
/* If not disabling, cache the new lowest non-C3 state. */
|
|
cpu_non_c3 = 0;
|
|
for (i = cpu_cx_lowest; i >= 0; i--) {
|
|
if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
|
|
cpu_non_c3 = i;
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Reset the statistics counters. */
|
|
bzero(cpu_cx_stats, sizeof(cpu_cx_stats));
|
|
ACPI_SERIAL_END(cpu);
|
|
|
|
return (0);
|
|
}
|