56e91aa977
* Add in the hints needed for AR933x ath(4) support - this is the nicer way that allows ath to be a module; * ATH_EEPROM_FIRMWARE is also required for all AR933x chipsets. Tested: * Carambola2, AR933x
108 lines
3.2 KiB
Plaintext
108 lines
3.2 KiB
Plaintext
#
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# This file adds to the values in AR91XX_BASE.hints.
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#
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# $FreeBSD$
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# mdiobus on arge1
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hint.argemdio.0.at="nexus0"
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hint.argemdio.0.maddr=0x1a000000
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hint.argemdio.0.msize=0x1000
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hint.argemdio.0.order=0
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# Embedded Atheros Switch
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hint.arswitch.0.at="mdio0"
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# XXX this should really say it's an AR933x switch, as there
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# are some vlan specific differences here!
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hint.arswitch.0.is_7240=1
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hint.arswitch.0.numphys=4
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hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY
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hint.arswitch.0.is_rgmii=0
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hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII
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# arge0 - MII, autoneg, phy(4)
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hint.arge.0.phymask=0x10 # PHY4
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hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus
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hint.arge.0.eeprommac=0x1fff0000
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# arge1 - GMII, 1000/full
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hint.arge.1.phymask=0x0 # No directly mapped PHYs
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hint.arge.1.media=1000
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hint.arge.1.fduplex=1
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hint.arge.1.eeprommac=0x1fff0006
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# ART calibration data mapping
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hint.ar71xx_caldata.0.at="nexus0"
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hint.ar71xx_caldata.0.order=0
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# Where the ART is - last 64k in the first 8MB of flash
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hint.ar71xx_caldata.0.map.0.ath_fixup_addr=0x1fff0000
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hint.ar71xx_caldata.0.map.0.ath_fixup_size=16384
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# And now tell the ath(4) driver where to look!
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hint.ath.0.eeprom_firmware="ar71xx_caldata.0.map.0.eeprom_firmware"
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# The AP121 16MB flash layout:
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#
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# [ 0.700000] 0x000000000000-0x000000040000 : "u-boot"
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# [ 0.710000] 0x000000040000-0x000000050000 : "u-boot-env"
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# [ 0.710000] 0x000000050000-0x000000250000 : "kernel"
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# [ 0.720000] 0x000000250000-0x000000fe0000 : "rootfs"
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# [ 0.720000] mtd: partition "rootfs" set to be root filesystem
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# [ 0.730000] mtd: partition "rootfs_data" created automatically, ofs=480000, len=B60000
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# [ 0.740000] 0x000000480000-0x000000fe0000 : "rootfs_data"
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# [ 0.740000] 0x000000fe0000-0x000000ff0000 : "nvram"
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# [ 0.750000] 0x000000ff0000-0x000001000000 : "art"
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# [ 0.750000] 0x000000050000-0x000000fe0000 : "firmware"
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hint.map.0.at="flash/spi0"
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hint.map.0.start=0x00000000
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hint.map.0.end=0x000040000
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hint.map.0.name="uboot"
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hint.map.0.readonly=1
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hint.map.1.at="flash/spi0"
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hint.map.1.start=0x00040000
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hint.map.1.end=0x00050000
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hint.map.1.name="uboot-env"
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hint.map.1.readonly=0
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hint.map.2.at="flash/spi0"
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hint.map.2.start=0x00050000
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hint.map.2.end="search:0x00050000:0x10000:.!/bin/sh"
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hint.map.2.name="kernel"
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hint.map.2.readonly=0
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hint.map.3.at="flash/spi0"
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hint.map.3.start="search:0x00050000:0x10000:.!/bin/sh"
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hint.map.3.end=0x00fe0000
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hint.map.3.name="rootfs"
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hint.map.3.readonly=0
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hint.map.4.at="flash/spi0"
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hint.map.4.start=0x00fe0000
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hint.map.4.end=0x00ff0000
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hint.map.4.name="cfg"
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hint.map.4.readonly=0
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# This is radio calibration section. It is (or should be!) unique
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# for each board, to take into account thermal and electrical differences
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# as well as the regulatory compliance data.
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#
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hint.map.5.at="flash/spi0"
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hint.map.5.start=0x00ff0000
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hint.map.5.end=0x01000000
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hint.map.5.name="art"
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hint.map.5.readonly=1
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# GPIO specific configuration block
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# Don't flip on anything that isn't already enabled.
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# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're
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# not used here.
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hint.gpio.0.function_set=0x00000000
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hint.gpio.0.function_clear=0x00000000
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# These are the GPIO LEDs and buttons which can be software controlled.
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hint.gpio.0.pinmask=0x00fc1803
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