237 lines
8.0 KiB
C++
237 lines
8.0 KiB
C++
/*
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* \file trc_i_decode.cpp
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* \brief OpenCSD :
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*
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* \copyright Copyright (c) 2015, ARM Limited. All Rights Reserved.
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*/
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/*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 'AS IS' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opencsd/ocsd_if_types.h"
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#include "i_dec/trc_i_decode.h"
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#include "i_dec/trc_idec_arminst.h"
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ocsd_err_t TrcIDecode::DecodeInstruction(ocsd_instr_info *instr_info)
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{
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ocsd_err_t err = OCSD_OK;
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struct decode_info info;
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info.instr_sub_type = OCSD_S_INSTR_NONE;
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info.arch_version = instr_info->pe_type.arch;
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switch(instr_info->isa)
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{
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case ocsd_isa_arm:
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err = DecodeA32(instr_info, &info);
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break;
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case ocsd_isa_thumb2:
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err = DecodeT32(instr_info, &info);
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break;
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case ocsd_isa_aarch64:
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err = DecodeA64(instr_info, &info);
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break;
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case ocsd_isa_tee:
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case ocsd_isa_jazelle:
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default:
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// unsupported ISA
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err = OCSD_ERR_UNSUPPORTED_ISA;
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break;
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}
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instr_info->sub_type = info.instr_sub_type;
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return err;
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}
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ocsd_err_t TrcIDecode::DecodeA32(ocsd_instr_info *instr_info, struct decode_info *info)
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{
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uint32_t branchAddr = 0;
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arm_barrier_t barrier;
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instr_info->instr_size = 4; // instruction size A32
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instr_info->type = OCSD_INSTR_OTHER; // default type
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instr_info->next_isa = instr_info->isa; // assume same ISA
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instr_info->is_link = 0;
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if(inst_ARM_is_indirect_branch(instr_info->opcode, info))
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{
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instr_info->type = OCSD_INSTR_BR_INDIRECT;
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instr_info->is_link = inst_ARM_is_branch_and_link(instr_info->opcode, info);
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}
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else if(inst_ARM_is_direct_branch(instr_info->opcode))
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{
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inst_ARM_branch_destination((uint32_t)instr_info->instr_addr,instr_info->opcode,&branchAddr);
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instr_info->type = OCSD_INSTR_BR;
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if (branchAddr & 0x1)
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{
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instr_info->next_isa = ocsd_isa_thumb2;
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branchAddr &= ~0x1;
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}
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instr_info->branch_addr = (ocsd_vaddr_t)branchAddr;
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instr_info->is_link = inst_ARM_is_branch_and_link(instr_info->opcode, info);
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}
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else if((barrier = inst_ARM_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
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{
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switch(barrier)
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{
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case ARM_BARRIER_ISB:
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instr_info->type = OCSD_INSTR_ISB;
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break;
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case ARM_BARRIER_DSB:
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case ARM_BARRIER_DMB:
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if(instr_info->dsb_dmb_waypoints)
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instr_info->type = OCSD_INSTR_DSB_DMB;
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break;
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}
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}
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else if (instr_info->wfi_wfe_branch)
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{
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if (inst_ARM_wfiwfe(instr_info->opcode))
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{
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instr_info->type = OCSD_INSTR_WFI_WFE;
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}
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}
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instr_info->is_conditional = inst_ARM_is_conditional(instr_info->opcode);
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return OCSD_OK;
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}
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ocsd_err_t TrcIDecode::DecodeA64(ocsd_instr_info *instr_info, struct decode_info *info)
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{
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uint64_t branchAddr = 0;
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arm_barrier_t barrier;
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instr_info->instr_size = 4; // default address update
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instr_info->type = OCSD_INSTR_OTHER; // default type
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instr_info->next_isa = instr_info->isa; // assume same ISA
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instr_info->is_link = 0;
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if(inst_A64_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link, info))
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{
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instr_info->type = OCSD_INSTR_BR_INDIRECT;
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}
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else if(inst_A64_is_direct_branch_link(instr_info->opcode, &instr_info->is_link, info))
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{
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inst_A64_branch_destination(instr_info->instr_addr,instr_info->opcode,&branchAddr);
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instr_info->type = OCSD_INSTR_BR;
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instr_info->branch_addr = (ocsd_vaddr_t)branchAddr;
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}
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else if((barrier = inst_A64_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
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{
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switch(barrier)
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{
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case ARM_BARRIER_ISB:
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instr_info->type = OCSD_INSTR_ISB;
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break;
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case ARM_BARRIER_DSB:
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case ARM_BARRIER_DMB:
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if(instr_info->dsb_dmb_waypoints)
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instr_info->type = OCSD_INSTR_DSB_DMB;
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break;
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}
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}
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else if (instr_info->wfi_wfe_branch &&
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inst_A64_wfiwfe(instr_info->opcode, info))
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{
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instr_info->type = OCSD_INSTR_WFI_WFE;
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}
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else if (OCSD_IS_ARCH_MINVER(info->arch_version, ARCH_AA64))
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{
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if (inst_A64_Tstart(instr_info->opcode))
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instr_info->type = OCSD_INSTR_TSTART;
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}
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instr_info->is_conditional = inst_A64_is_conditional(instr_info->opcode);
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return OCSD_OK;
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}
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ocsd_err_t TrcIDecode::DecodeT32(ocsd_instr_info *instr_info, struct decode_info *info)
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{
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uint32_t branchAddr = 0;
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arm_barrier_t barrier;
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// need to align the 32 bit opcode as 2 16 bit, with LS 16 as in top 16 bit of
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// 32 bit word - T2 routines assume 16 bit in top 16 bit of 32 bit opcode.
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uint32_t op_temp = (instr_info->opcode >> 16) & 0xFFFF;
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op_temp |= ((instr_info->opcode & 0xFFFF) << 16);
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instr_info->opcode = op_temp;
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instr_info->instr_size = is_wide_thumb((uint16_t)(instr_info->opcode >> 16)) ? 4 : 2;
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instr_info->type = OCSD_INSTR_OTHER; // default type
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instr_info->next_isa = instr_info->isa; // assume same ISA
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instr_info->is_link = 0;
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instr_info->is_conditional = 0;
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if(inst_Thumb_is_direct_branch_link(instr_info->opcode,&instr_info->is_link, &instr_info->is_conditional, info))
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{
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inst_Thumb_branch_destination((uint32_t)instr_info->instr_addr,instr_info->opcode,&branchAddr);
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instr_info->type = OCSD_INSTR_BR;
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instr_info->branch_addr = (ocsd_vaddr_t)(branchAddr & ~0x1);
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if((branchAddr & 0x1) == 0)
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instr_info->next_isa = ocsd_isa_arm;
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}
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else if (inst_Thumb_is_indirect_branch_link(instr_info->opcode, &instr_info->is_link, info))
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{
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instr_info->type = OCSD_INSTR_BR_INDIRECT;
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}
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else if((barrier = inst_Thumb_barrier(instr_info->opcode)) != ARM_BARRIER_NONE)
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{
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switch(barrier)
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{
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case ARM_BARRIER_ISB:
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instr_info->type = OCSD_INSTR_ISB;
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break;
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case ARM_BARRIER_DSB:
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case ARM_BARRIER_DMB:
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if(instr_info->dsb_dmb_waypoints)
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instr_info->type = OCSD_INSTR_DSB_DMB;
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break;
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}
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}
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else if (instr_info->wfi_wfe_branch)
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{
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if (inst_Thumb_wfiwfe(instr_info->opcode))
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{
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instr_info->type = OCSD_INSTR_WFI_WFE;
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}
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}
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instr_info->is_conditional = inst_Thumb_is_conditional(instr_info->opcode);
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instr_info->thumb_it_conditions = inst_Thumb_is_IT(instr_info->opcode);
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return OCSD_OK;
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}
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/* End of File trc_i_decode.cpp */
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