b5393d9f78
cope with a few interface changes required by the ia64. In particular, function pointers on ia64 need special treatment in rtld.
307 lines
7.1 KiB
ArmAsm
307 lines
7.1 KiB
ArmAsm
/* $FreeBSD$ */
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/* From: NetBSD: rtld_start.S,v 1.1 1996/12/16 20:38:09 cgd Exp */
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/*
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* Copyright 1996 Matt Thomas <matt@3am-software.com>
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* Copyright 2000 John D. Polstra
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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#include <sys/syscall.h>
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ENTRY(_rtld_start, 0)
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alloc r2=ar.pfs,3,0,3,0
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;;
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1: mov r14=ip // calculate gp
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addl r3=@gprel(1b),r0
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;;
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sub gp=r14,r3
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;;
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.section .sdata
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2: data4 @ltv(1b) // unrelocated address of 1b
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.align 8
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.previous
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add r15=@gprel(2b),gp
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;;
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ld8 r15=[r15]
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;;
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sub out0=r14,r15 // out0 is image base address
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br.call.sptk.many rp=_rtld_reloc // fixup image
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add sp=-16,sp // 16 bytes for us, 16 for _rtld
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;;
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mov out0=in0
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add out1=16,sp // address for exit proc
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add out2=24,sp // address for obj_main
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br.call.sptk.many rp=_rtld // r8=_rtld(sp, &exit_proc, &obj_main)
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add r16=16,sp // address for exit proc
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;;
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ld8 r15=[r16] // read exit proc
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add sp=16,sp // readjust stack
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mov b7=r8 // address of real _start
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;;
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alloc r2=ar.pfs,0,0,3,0 // dump register frame
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mov out2=r15
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br.call.sptk.many rp=b7 // transfer to main program
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br.call.sptk.many rp=exit // die
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END(_rtld_start)
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/*
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* _rtld_bind_start: lookup a lazy binding and transfer to real target
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*
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* Arguments:
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* r1 gp value for rtld
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* r15 Index in plt
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* r16 Obj_Entry of caller
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* in0-in7 Arguments for target procedure
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* rp Return address back to caller
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*/
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ENTRY(_rtld_bind_start, 0)
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{ .mii
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alloc loc0=ar.pfs,8,6,3,0 // space to save r8-r11
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add r17=16-8*16,sp // leave 16 bytes for _rtld_bind
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add r18=32-8*16,sp
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;;
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} { .mii
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mov loc2=r8 // structure return address
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add sp=-8*16,sp // space to save f8-f15
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mov loc1=rp
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;;
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} { .mii
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stf.spill [r17]=f8,32 // save float arguments
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mov loc3=r9 // language specific
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mov loc4=r10 // language specific
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} { .mii
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stf.spill [r18]=f9,32
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mov loc5=r11 // language specific
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shl out1=r15,4 // 16 * index
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;;
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} { .mmi
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stf.spill [r17]=f10,32
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stf.spill [r18]=f11,32
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mov out0=r16 // Obj_Entry for caller
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;;
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} { .mmi
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stf.spill [r17]=f12,32
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stf.spill [r18]=f13,32
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shladd out1=r15,3,out1 // rela offset = 24 * index
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;;
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} { .mmb
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stf.spill [r17]=f14,32
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stf.spill [r18]=f15,32
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br.call.sptk.many rp=_rtld_bind
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} { .mii
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ld8 r14=[r8],8 // target address
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add r17=16,sp
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add r18=32,sp
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;;
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} { .mii
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ld8 r1=[r8] // target gp
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mov ar.pfs=loc0 // clean up
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mov rp=loc1
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} { .mmi
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ldf.fill f8=[r17],32 // restore float arguments
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ldf.fill f9=[r18],32
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mov r8=loc2 // restore structure pointer
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;;
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} { .mmi
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ldf.fill f10=[r17],32
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ldf.fill f11=[r18],32
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mov r9=loc3
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;;
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} { .mmi
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ldf.fill f12=[r17],32
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ldf.fill f13=[r18],32
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mov r10=loc4
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;;
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} { .mmi
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ldf.fill f14=[r17],32
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ldf.fill f15=[r18],32
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mov r11=loc5
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;;
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} { .mii
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nop.m 0
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mov b7=r14
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add sp=8*16,sp
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;;
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} { .mib
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alloc r14=ar.pfs,0,0,8,0 // drop our register frame
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nop.i 0
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br.sptk.many b7 // jump to target
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}
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END(_rtld_bind_start)
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/*
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* int cmp0_and_store_int(volatile int *p, int newval);
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*
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* If an int holds 0, store newval into it; else do nothing. Returns
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* the previous value.
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*/
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ENTRY(cmp0_and_store_int, 2)
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mov ar.ccv=0
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;;
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cmpxchg4.acq r8=[in0],in1,ar.ccv
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br.ret.sptk.many rp
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END(cmp0_and_store_int)
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ENTRY(atomic_add_int, 2)
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1: ld4 r14=[in0]
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;;
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mov ar.ccv=r14
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add r15=in1,r14
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;;
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cmpxchg4.acq r16=[in0],r15,ar.ccv
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;;
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cmp.ne p6,p0=r14,r16
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(p6) br.cond.spnt.few 1b
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br.ret.sptk.many rp
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END(atomic_add_int)
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/* Atomically increment an int. */
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ENTRY(atomic_incr_int, 1)
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1: ld4 r14=[in0]
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;;
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mov ar.ccv=r14
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add r15=1,r14
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;;
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cmpxchg4.acq r16=[in0],r15,ar.ccv
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;;
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cmp.ne p6,p0=r14,r16
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(p6) br.cond.spnt.few 1b
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br.ret.sptk.many rp
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END(atomic_incr_int)
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/* Atomically decrement an int. */
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ENTRY(atomic_decr_int, 1)
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1: ld4 r14=[in0]
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;;
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mov ar.ccv=r14
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add r15=-1,r14
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;;
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cmpxchg4.acq r16=[in0],r15,ar.ccv
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;;
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cmp.ne p6,p0=r14,r16
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(p6) br.cond.spnt.few 1b
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br.ret.sptk.many rp
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END(atomic_decr_int)
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#define DT_NULL 0 /* Terminating entry. */
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#define DT_RELA 7 /* Address of ElfNN_Rela relocations. */
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#define DT_RELASZ 8 /* Total size of ElfNN_Rela relocations. */
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#define DT_RELAENT 9 /* Size of each ElfNN_Rela relocation entry. */
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#define R_IA64_NONE 0 /* None */
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#define R_IA64_DIR64LSB 0x27 /* word64 LSB S + A */
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#define R_IA64_REL64LSB 0x6f /* word64 LSB BD + A */
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/*
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* _rtld_reloc: relocate the rtld image, apart from @fptrs.
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*
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* Assumes that rtld was linked at zero and that we only need to
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* handle REL64LSB and DIR64LSB relocations.
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*
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* Arguments:
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* r1 gp value for rtld
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* in0 rtld base address
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*/
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STATIC_ENTRY(_rtld_reloc, 1)
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alloc loc0=ar.pfs,1,2,0,0
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mov loc1=rp
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;;
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movl r15=@gprel(_DYNAMIC) // find _DYNAMIC etc.
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;;
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add r15=r15,gp // relocate _DYNAMIC etc.
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;;
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1: ld8 r16=[r15],8 // read r15->d_tag
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;;
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ld8 r17=[r15],8 // and r15->d_val
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;;
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cmp.eq p6,p0=DT_NULL,r16 // done?
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(p6) br.cond.dpnt.few 2f
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;;
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cmp.eq p6,p0=DT_RELA,r16
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;;
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(p6) add r18=r17,in0 // found rela section
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;;
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cmp.eq p6,p0=DT_RELASZ,r16
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;;
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(p6) mov r19=r17 // found rela size
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;;
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cmp.eq p6,p0=DT_RELAENT,r16
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;;
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(p6) mov r22=r17 // found rela entry size
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;;
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br.sptk.few 1b
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2:
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ld8 r15=[r18],8 // read r_offset
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;;
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ld8 r16=[r18],8 // read r_info
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add r15=r15,in0 // relocate r_offset
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;;
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ld8 r17=[r18],8 // read r_addend
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sub r19=r19,r22 // update relasz
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extr.u r23=r16,0,32 // ELF64_R_TYPE(r16)
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;;
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cmp.eq p6,p0=R_IA64_NONE,r23
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(p6) br.cond.dpnt.few 3f
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;;
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cmp.eq p6,p0=R_IA64_DIR64LSB,r23
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;;
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(p6) br.cond.dptk.few 4f
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;;
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cmp.eq p6,p0=R_IA64_REL64LSB,r23
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;;
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(p6) br.cond.dptk.few 4f
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;;
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3: cmp.ltu p6,p0=0,r19 // more?
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(p6) br.cond.dptk.few 2b // loop
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mov r8=0 // success return value
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;;
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br.cond.sptk.few 9f // done
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4:
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ld8 r16=[r15] // read value
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;;
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add r16=r16,in0 // relocate it
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;;
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st8 [r15]=r16 // and store it back
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br.cond.sptk.few 3b
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9:
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mov ar.pfs=loc0
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mov rp=loc1
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;;
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br.ret.sptk.few rp
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END(_rtld_reloc)
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