915 lines
34 KiB
C++
915 lines
34 KiB
C++
//===-- PrologEpilogInserter.cpp - Insert Prolog/Epilog code in function --===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass is responsible for finalizing the functions frame layout, saving
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// callee saved registers, and for emitting prolog & epilog code for the
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// function.
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//
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// This pass must be run after register allocation. After this pass is
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// executed, it is illegal to construct MO_FrameIndex operands.
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//
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// This pass provides an optional shrink wrapping variant of prolog/epilog
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// insertion, enabled via --shrink-wrap. See ShrinkWrapping.cpp.
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//
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//===----------------------------------------------------------------------===//
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#include "PrologEpilogInserter.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/MachineLoopInfo.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/RegisterScavenging.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetFrameInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/ADT/IndexedMap.h"
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#include "llvm/ADT/STLExtras.h"
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#include <climits>
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using namespace llvm;
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char PEI::ID = 0;
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static RegisterPass<PEI>
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X("prologepilog", "Prologue/Epilogue Insertion");
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/// createPrologEpilogCodeInserter - This function returns a pass that inserts
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/// prolog and epilog code, and eliminates abstract frame references.
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///
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FunctionPass *llvm::createPrologEpilogCodeInserter() { return new PEI(); }
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/// runOnMachineFunction - Insert prolog/epilog code and replace abstract
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/// frame indexes with appropriate references.
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///
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bool PEI::runOnMachineFunction(MachineFunction &Fn) {
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const Function* F = Fn.getFunction();
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const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
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RS = TRI->requiresRegisterScavenging(Fn) ? new RegScavenger() : NULL;
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FrameIndexVirtualScavenging = TRI->requiresFrameIndexScavenging(Fn);
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FrameConstantRegMap.clear();
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// Get MachineModuleInfo so that we can track the construction of the
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// frame.
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if (MachineModuleInfo *MMI = getAnalysisIfAvailable<MachineModuleInfo>())
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Fn.getFrameInfo()->setMachineModuleInfo(MMI);
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// Calculate the MaxCallFrameSize and HasCalls variables for the function's
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// frame information. Also eliminates call frame pseudo instructions.
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calculateCallsInformation(Fn);
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// Allow the target machine to make some adjustments to the function
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// e.g. UsedPhysRegs before calculateCalleeSavedRegisters.
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TRI->processFunctionBeforeCalleeSavedScan(Fn, RS);
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// Scan the function for modified callee saved registers and insert spill code
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// for any callee saved registers that are modified.
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calculateCalleeSavedRegisters(Fn);
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// Determine placement of CSR spill/restore code:
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// - with shrink wrapping, place spills and restores to tightly
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// enclose regions in the Machine CFG of the function where
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// they are used. Without shrink wrapping
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// - default (no shrink wrapping), place all spills in the
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// entry block, all restores in return blocks.
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placeCSRSpillsAndRestores(Fn);
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// Add the code to save and restore the callee saved registers
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if (!F->hasFnAttr(Attribute::Naked))
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insertCSRSpillsAndRestores(Fn);
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// Allow the target machine to make final modifications to the function
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// before the frame layout is finalized.
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TRI->processFunctionBeforeFrameFinalized(Fn);
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// Calculate actual frame offsets for all abstract stack objects...
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calculateFrameObjectOffsets(Fn);
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// Add prolog and epilog code to the function. This function is required
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// to align the stack frame as necessary for any stack variables or
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// called functions. Because of this, calculateCalleeSavedRegisters
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// must be called before this function in order to set the HasCalls
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// and MaxCallFrameSize variables.
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if (!F->hasFnAttr(Attribute::Naked))
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insertPrologEpilogCode(Fn);
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// Replace all MO_FrameIndex operands with physical register references
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// and actual offsets.
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//
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replaceFrameIndices(Fn);
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// If register scavenging is needed, as we've enabled doing it as a
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// post-pass, scavenge the virtual registers that frame index elimiation
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// inserted.
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if (TRI->requiresRegisterScavenging(Fn) && FrameIndexVirtualScavenging)
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scavengeFrameVirtualRegs(Fn);
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delete RS;
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clearAllSets();
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return true;
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}
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#if 0
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void PEI::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesCFG();
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if (ShrinkWrapping || ShrinkWrapFunc != "") {
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AU.addRequired<MachineLoopInfo>();
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AU.addRequired<MachineDominatorTree>();
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}
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AU.addPreserved<MachineLoopInfo>();
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AU.addPreserved<MachineDominatorTree>();
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MachineFunctionPass::getAnalysisUsage(AU);
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}
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#endif
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/// calculateCallsInformation - Calculate the MaxCallFrameSize and HasCalls
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/// variables for the function's frame information and eliminate call frame
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/// pseudo instructions.
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void PEI::calculateCallsInformation(MachineFunction &Fn) {
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const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
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MachineFrameInfo *FFI = Fn.getFrameInfo();
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unsigned MaxCallFrameSize = 0;
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bool HasCalls = FFI->hasCalls();
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// Get the function call frame set-up and tear-down instruction opcode
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int FrameSetupOpcode = RegInfo->getCallFrameSetupOpcode();
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int FrameDestroyOpcode = RegInfo->getCallFrameDestroyOpcode();
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// Early exit for targets which have no call frame setup/destroy pseudo
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// instructions.
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if (FrameSetupOpcode == -1 && FrameDestroyOpcode == -1)
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return;
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std::vector<MachineBasicBlock::iterator> FrameSDOps;
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for (MachineFunction::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB)
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for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ++I)
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if (I->getOpcode() == FrameSetupOpcode ||
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I->getOpcode() == FrameDestroyOpcode) {
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assert(I->getNumOperands() >= 1 && "Call Frame Setup/Destroy Pseudo"
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" instructions should have a single immediate argument!");
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unsigned Size = I->getOperand(0).getImm();
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if (Size > MaxCallFrameSize) MaxCallFrameSize = Size;
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HasCalls = true;
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FrameSDOps.push_back(I);
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} else if (I->isInlineAsm()) {
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// An InlineAsm might be a call; assume it is to get the stack frame
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// aligned correctly for calls.
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HasCalls = true;
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}
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FFI->setHasCalls(HasCalls);
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FFI->setMaxCallFrameSize(MaxCallFrameSize);
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for (std::vector<MachineBasicBlock::iterator>::iterator
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i = FrameSDOps.begin(), e = FrameSDOps.end(); i != e; ++i) {
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MachineBasicBlock::iterator I = *i;
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// If call frames are not being included as part of the stack frame, and
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// the target doesn't indicate otherwise, remove the call frame pseudos
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// here. The sub/add sp instruction pairs are still inserted, but we don't
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// need to track the SP adjustment for frame index elimination.
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if (RegInfo->canSimplifyCallFramePseudos(Fn))
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RegInfo->eliminateCallFramePseudoInstr(Fn, *I->getParent(), I);
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}
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}
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/// calculateCalleeSavedRegisters - Scan the function for modified callee saved
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/// registers.
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void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) {
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const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
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const TargetFrameInfo *TFI = Fn.getTarget().getFrameInfo();
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MachineFrameInfo *FFI = Fn.getFrameInfo();
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// Get the callee saved register list...
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const unsigned *CSRegs = RegInfo->getCalleeSavedRegs(&Fn);
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// These are used to keep track the callee-save area. Initialize them.
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MinCSFrameIndex = INT_MAX;
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MaxCSFrameIndex = 0;
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// Early exit for targets which have no callee saved registers.
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if (CSRegs == 0 || CSRegs[0] == 0)
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return;
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// Figure out which *callee saved* registers are modified by the current
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// function, thus needing to be saved and restored in the prolog/epilog.
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const TargetRegisterClass * const *CSRegClasses =
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RegInfo->getCalleeSavedRegClasses(&Fn);
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std::vector<CalleeSavedInfo> CSI;
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for (unsigned i = 0; CSRegs[i]; ++i) {
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unsigned Reg = CSRegs[i];
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if (Fn.getRegInfo().isPhysRegUsed(Reg)) {
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// If the reg is modified, save it!
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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} else {
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for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
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*AliasSet; ++AliasSet) { // Check alias registers too.
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if (Fn.getRegInfo().isPhysRegUsed(*AliasSet)) {
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CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i]));
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break;
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}
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}
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}
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}
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if (CSI.empty())
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return; // Early exit if no callee saved registers are modified!
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unsigned NumFixedSpillSlots;
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const TargetFrameInfo::SpillSlot *FixedSpillSlots =
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TFI->getCalleeSavedSpillSlots(NumFixedSpillSlots);
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// Now that we know which registers need to be saved and restored, allocate
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// stack slots for them.
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for (std::vector<CalleeSavedInfo>::iterator
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I = CSI.begin(), E = CSI.end(); I != E; ++I) {
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unsigned Reg = I->getReg();
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const TargetRegisterClass *RC = I->getRegClass();
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int FrameIdx;
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if (RegInfo->hasReservedSpillSlot(Fn, Reg, FrameIdx)) {
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I->setFrameIdx(FrameIdx);
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continue;
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}
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// Check to see if this physreg must be spilled to a particular stack slot
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// on this target.
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const TargetFrameInfo::SpillSlot *FixedSlot = FixedSpillSlots;
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while (FixedSlot != FixedSpillSlots+NumFixedSpillSlots &&
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FixedSlot->Reg != Reg)
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++FixedSlot;
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if (FixedSlot == FixedSpillSlots + NumFixedSpillSlots) {
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// Nope, just spill it anywhere convenient.
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unsigned Align = RC->getAlignment();
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unsigned StackAlign = TFI->getStackAlignment();
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// We may not be able to satisfy the desired alignment specification of
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// the TargetRegisterClass if the stack alignment is smaller. Use the
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// min.
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Align = std::min(Align, StackAlign);
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FrameIdx = FFI->CreateStackObject(RC->getSize(), Align, true);
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if ((unsigned)FrameIdx < MinCSFrameIndex) MinCSFrameIndex = FrameIdx;
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if ((unsigned)FrameIdx > MaxCSFrameIndex) MaxCSFrameIndex = FrameIdx;
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} else {
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// Spill it to the stack where we must.
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FrameIdx = FFI->CreateFixedObject(RC->getSize(), FixedSlot->Offset,
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true, false);
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}
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I->setFrameIdx(FrameIdx);
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}
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FFI->setCalleeSavedInfo(CSI);
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}
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/// insertCSRSpillsAndRestores - Insert spill and restore code for
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/// callee saved registers used in the function, handling shrink wrapping.
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///
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void PEI::insertCSRSpillsAndRestores(MachineFunction &Fn) {
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// Get callee saved register information.
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MachineFrameInfo *FFI = Fn.getFrameInfo();
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const std::vector<CalleeSavedInfo> &CSI = FFI->getCalleeSavedInfo();
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FFI->setCalleeSavedInfoValid(true);
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// Early exit if no callee saved registers are modified!
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if (CSI.empty())
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return;
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const TargetInstrInfo &TII = *Fn.getTarget().getInstrInfo();
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MachineBasicBlock::iterator I;
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if (! ShrinkWrapThisFunction) {
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// Spill using target interface.
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I = EntryBlock->begin();
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if (!TII.spillCalleeSavedRegisters(*EntryBlock, I, CSI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in.
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// It's killed at the spill.
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EntryBlock->addLiveIn(CSI[i].getReg());
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// Insert the spill to the stack frame.
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TII.storeRegToStackSlot(*EntryBlock, I, CSI[i].getReg(), true,
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CSI[i].getFrameIdx(), CSI[i].getRegClass());
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}
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}
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// Restore using target interface.
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for (unsigned ri = 0, re = ReturnBlocks.size(); ri != re; ++ri) {
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MachineBasicBlock* MBB = ReturnBlocks[ri];
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I = MBB->end(); --I;
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// Skip over all terminator instructions, which are part of the return
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// sequence.
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator())
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I = I2;
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bool AtStart = I == MBB->begin();
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MachineBasicBlock::iterator BeforeI = I;
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if (!AtStart)
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--BeforeI;
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// Restore all registers immediately before the return and any
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// terminators that preceed it.
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if (!TII.restoreCalleeSavedRegisters(*MBB, I, CSI)) {
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for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
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TII.loadRegFromStackSlot(*MBB, I, CSI[i].getReg(),
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CSI[i].getFrameIdx(),
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CSI[i].getRegClass());
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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}
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}
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}
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}
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return;
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}
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// Insert spills.
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std::vector<CalleeSavedInfo> blockCSI;
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for (CSRegBlockMap::iterator BI = CSRSave.begin(),
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BE = CSRSave.end(); BI != BE; ++BI) {
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MachineBasicBlock* MBB = BI->first;
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CSRegSet save = BI->second;
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if (save.empty())
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continue;
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blockCSI.clear();
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for (CSRegSet::iterator RI = save.begin(),
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RE = save.end(); RI != RE; ++RI) {
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blockCSI.push_back(CSI[*RI]);
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}
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assert(blockCSI.size() > 0 &&
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"Could not collect callee saved register info");
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I = MBB->begin();
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// When shrink wrapping, use stack slot stores/loads.
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for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
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// Add the callee-saved register as live-in.
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// It's killed at the spill.
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MBB->addLiveIn(blockCSI[i].getReg());
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// Insert the spill to the stack frame.
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TII.storeRegToStackSlot(*MBB, I, blockCSI[i].getReg(),
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true,
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blockCSI[i].getFrameIdx(),
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blockCSI[i].getRegClass());
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}
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}
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for (CSRegBlockMap::iterator BI = CSRRestore.begin(),
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BE = CSRRestore.end(); BI != BE; ++BI) {
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MachineBasicBlock* MBB = BI->first;
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CSRegSet restore = BI->second;
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if (restore.empty())
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continue;
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blockCSI.clear();
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for (CSRegSet::iterator RI = restore.begin(),
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RE = restore.end(); RI != RE; ++RI) {
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blockCSI.push_back(CSI[*RI]);
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}
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assert(blockCSI.size() > 0 &&
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"Could not find callee saved register info");
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// If MBB is empty and needs restores, insert at the _beginning_.
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if (MBB->empty()) {
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I = MBB->begin();
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} else {
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I = MBB->end();
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--I;
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// Skip over all terminator instructions, which are part of the
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// return sequence.
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if (! I->getDesc().isTerminator()) {
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++I;
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} else {
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MachineBasicBlock::iterator I2 = I;
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while (I2 != MBB->begin() && (--I2)->getDesc().isTerminator())
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I = I2;
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}
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}
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bool AtStart = I == MBB->begin();
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MachineBasicBlock::iterator BeforeI = I;
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if (!AtStart)
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--BeforeI;
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// Restore all registers immediately before the return and any
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// terminators that preceed it.
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for (unsigned i = 0, e = blockCSI.size(); i != e; ++i) {
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TII.loadRegFromStackSlot(*MBB, I, blockCSI[i].getReg(),
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blockCSI[i].getFrameIdx(),
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blockCSI[i].getRegClass());
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assert(I != MBB->begin() &&
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"loadRegFromStackSlot didn't insert any code!");
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// Insert in reverse order. loadRegFromStackSlot can insert
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// multiple instructions.
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if (AtStart)
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I = MBB->begin();
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else {
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I = BeforeI;
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++I;
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}
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}
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}
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}
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/// AdjustStackOffset - Helper function used to adjust the stack frame offset.
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static inline void
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AdjustStackOffset(MachineFrameInfo *FFI, int FrameIdx,
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bool StackGrowsDown, int64_t &Offset,
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unsigned &MaxAlign) {
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// If the stack grows down, add the object size to find the lowest address.
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if (StackGrowsDown)
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Offset += FFI->getObjectSize(FrameIdx);
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unsigned Align = FFI->getObjectAlignment(FrameIdx);
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// If the alignment of this object is greater than that of the stack, then
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// increase the stack alignment to match.
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MaxAlign = std::max(MaxAlign, Align);
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// Adjust to alignment boundary.
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Offset = (Offset + Align - 1) / Align * Align;
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if (StackGrowsDown) {
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FFI->setObjectOffset(FrameIdx, -Offset); // Set the computed offset
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} else {
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FFI->setObjectOffset(FrameIdx, Offset);
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Offset += FFI->getObjectSize(FrameIdx);
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}
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}
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/// calculateFrameObjectOffsets - Calculate actual frame offsets for all of the
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/// abstract stack objects.
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///
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void PEI::calculateFrameObjectOffsets(MachineFunction &Fn) {
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const TargetFrameInfo &TFI = *Fn.getTarget().getFrameInfo();
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bool StackGrowsDown =
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TFI.getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
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// Loop over all of the stack objects, assigning sequential addresses...
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MachineFrameInfo *FFI = Fn.getFrameInfo();
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// Start at the beginning of the local area.
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// The Offset is the distance from the stack top in the direction
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// of stack growth -- so it's always nonnegative.
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int LocalAreaOffset = TFI.getOffsetOfLocalArea();
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if (StackGrowsDown)
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LocalAreaOffset = -LocalAreaOffset;
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assert(LocalAreaOffset >= 0
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&& "Local area offset should be in direction of stack growth");
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int64_t Offset = LocalAreaOffset;
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|
// If there are fixed sized objects that are preallocated in the local area,
|
|
// non-fixed objects can't be allocated right at the start of local area.
|
|
// We currently don't support filling in holes in between fixed sized
|
|
// objects, so we adjust 'Offset' to point to the end of last fixed sized
|
|
// preallocated object.
|
|
for (int i = FFI->getObjectIndexBegin(); i != 0; ++i) {
|
|
int64_t FixedOff;
|
|
if (StackGrowsDown) {
|
|
// The maximum distance from the stack pointer is at lower address of
|
|
// the object -- which is given by offset. For down growing stack
|
|
// the offset is negative, so we negate the offset to get the distance.
|
|
FixedOff = -FFI->getObjectOffset(i);
|
|
} else {
|
|
// The maximum distance from the start pointer is at the upper
|
|
// address of the object.
|
|
FixedOff = FFI->getObjectOffset(i) + FFI->getObjectSize(i);
|
|
}
|
|
if (FixedOff > Offset) Offset = FixedOff;
|
|
}
|
|
|
|
// First assign frame offsets to stack objects that are used to spill
|
|
// callee saved registers.
|
|
if (StackGrowsDown) {
|
|
for (unsigned i = MinCSFrameIndex; i <= MaxCSFrameIndex; ++i) {
|
|
// If stack grows down, we need to add size of find the lowest
|
|
// address of the object.
|
|
Offset += FFI->getObjectSize(i);
|
|
|
|
unsigned Align = FFI->getObjectAlignment(i);
|
|
// Adjust to alignment boundary
|
|
Offset = (Offset+Align-1)/Align*Align;
|
|
|
|
FFI->setObjectOffset(i, -Offset); // Set the computed offset
|
|
}
|
|
} else {
|
|
int MaxCSFI = MaxCSFrameIndex, MinCSFI = MinCSFrameIndex;
|
|
for (int i = MaxCSFI; i >= MinCSFI ; --i) {
|
|
unsigned Align = FFI->getObjectAlignment(i);
|
|
// Adjust to alignment boundary
|
|
Offset = (Offset+Align-1)/Align*Align;
|
|
|
|
FFI->setObjectOffset(i, Offset);
|
|
Offset += FFI->getObjectSize(i);
|
|
}
|
|
}
|
|
|
|
unsigned MaxAlign = FFI->getMaxAlignment();
|
|
|
|
// Make sure the special register scavenging spill slot is closest to the
|
|
// frame pointer if a frame pointer is required.
|
|
const TargetRegisterInfo *RegInfo = Fn.getTarget().getRegisterInfo();
|
|
if (RS && RegInfo->hasFP(Fn) && !RegInfo->needsStackRealignment(Fn)) {
|
|
int SFI = RS->getScavengingFrameIndex();
|
|
if (SFI >= 0)
|
|
AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
// Make sure that the stack protector comes before the local variables on the
|
|
// stack.
|
|
if (FFI->getStackProtectorIndex() >= 0)
|
|
AdjustStackOffset(FFI, FFI->getStackProtectorIndex(), StackGrowsDown,
|
|
Offset, MaxAlign);
|
|
|
|
// Then assign frame offsets to stack objects that are not used to spill
|
|
// callee saved registers.
|
|
for (unsigned i = 0, e = FFI->getObjectIndexEnd(); i != e; ++i) {
|
|
if (i >= MinCSFrameIndex && i <= MaxCSFrameIndex)
|
|
continue;
|
|
if (RS && (int)i == RS->getScavengingFrameIndex())
|
|
continue;
|
|
if (FFI->isDeadObjectIndex(i))
|
|
continue;
|
|
if (FFI->getStackProtectorIndex() == (int)i)
|
|
continue;
|
|
|
|
AdjustStackOffset(FFI, i, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
// Make sure the special register scavenging spill slot is closest to the
|
|
// stack pointer.
|
|
if (RS && (!RegInfo->hasFP(Fn) || RegInfo->needsStackRealignment(Fn))) {
|
|
int SFI = RS->getScavengingFrameIndex();
|
|
if (SFI >= 0)
|
|
AdjustStackOffset(FFI, SFI, StackGrowsDown, Offset, MaxAlign);
|
|
}
|
|
|
|
if (!RegInfo->targetHandlesStackFrameRounding()) {
|
|
// If we have reserved argument space for call sites in the function
|
|
// immediately on entry to the current function, count it as part of the
|
|
// overall stack size.
|
|
if (FFI->hasCalls() && RegInfo->hasReservedCallFrame(Fn))
|
|
Offset += FFI->getMaxCallFrameSize();
|
|
|
|
// Round up the size to a multiple of the alignment. If the function has
|
|
// any calls or alloca's, align to the target's StackAlignment value to
|
|
// ensure that the callee's frame or the alloca data is suitably aligned;
|
|
// otherwise, for leaf functions, align to the TransientStackAlignment
|
|
// value.
|
|
unsigned StackAlign;
|
|
if (FFI->hasCalls() || FFI->hasVarSizedObjects() ||
|
|
(RegInfo->needsStackRealignment(Fn) && FFI->getObjectIndexEnd() != 0))
|
|
StackAlign = TFI.getStackAlignment();
|
|
else
|
|
StackAlign = TFI.getTransientStackAlignment();
|
|
// If the frame pointer is eliminated, all frame offsets will be relative
|
|
// to SP not FP; align to MaxAlign so this works.
|
|
StackAlign = std::max(StackAlign, MaxAlign);
|
|
unsigned AlignMask = StackAlign - 1;
|
|
Offset = (Offset + AlignMask) & ~uint64_t(AlignMask);
|
|
}
|
|
|
|
// Update frame info to pretend that this is part of the stack...
|
|
FFI->setStackSize(Offset - LocalAreaOffset);
|
|
}
|
|
|
|
|
|
/// insertPrologEpilogCode - Scan the function for modified callee saved
|
|
/// registers, insert spill code for these callee saved registers, then add
|
|
/// prolog and epilog code to the function.
|
|
///
|
|
void PEI::insertPrologEpilogCode(MachineFunction &Fn) {
|
|
const TargetRegisterInfo *TRI = Fn.getTarget().getRegisterInfo();
|
|
|
|
// Add prologue to the function...
|
|
TRI->emitPrologue(Fn);
|
|
|
|
// Add epilogue to restore the callee-save registers in each exiting block
|
|
for (MachineFunction::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I) {
|
|
// If last instruction is a return instruction, add an epilogue
|
|
if (!I->empty() && I->back().getDesc().isReturn())
|
|
TRI->emitEpilogue(Fn, *I);
|
|
}
|
|
}
|
|
|
|
|
|
/// replaceFrameIndices - Replace all MO_FrameIndex operands with physical
|
|
/// register references and actual offsets.
|
|
///
|
|
void PEI::replaceFrameIndices(MachineFunction &Fn) {
|
|
if (!Fn.getFrameInfo()->hasStackObjects()) return; // Nothing to do?
|
|
|
|
const TargetMachine &TM = Fn.getTarget();
|
|
assert(TM.getRegisterInfo() && "TM::getRegisterInfo() must be implemented!");
|
|
const TargetRegisterInfo &TRI = *TM.getRegisterInfo();
|
|
const TargetFrameInfo *TFI = TM.getFrameInfo();
|
|
bool StackGrowsDown =
|
|
TFI->getStackGrowthDirection() == TargetFrameInfo::StackGrowsDown;
|
|
int FrameSetupOpcode = TRI.getCallFrameSetupOpcode();
|
|
int FrameDestroyOpcode = TRI.getCallFrameDestroyOpcode();
|
|
|
|
for (MachineFunction::iterator BB = Fn.begin(),
|
|
E = Fn.end(); BB != E; ++BB) {
|
|
int SPAdj = 0; // SP offset due to call frame setup / destroy.
|
|
if (RS && !FrameIndexVirtualScavenging) RS->enterBasicBlock(BB);
|
|
|
|
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
|
|
|
|
if (I->getOpcode() == FrameSetupOpcode ||
|
|
I->getOpcode() == FrameDestroyOpcode) {
|
|
// Remember how much SP has been adjusted to create the call
|
|
// frame.
|
|
int Size = I->getOperand(0).getImm();
|
|
|
|
if ((!StackGrowsDown && I->getOpcode() == FrameSetupOpcode) ||
|
|
(StackGrowsDown && I->getOpcode() == FrameDestroyOpcode))
|
|
Size = -Size;
|
|
|
|
SPAdj += Size;
|
|
|
|
MachineBasicBlock::iterator PrevI = BB->end();
|
|
if (I != BB->begin()) PrevI = prior(I);
|
|
TRI.eliminateCallFramePseudoInstr(Fn, *BB, I);
|
|
|
|
// Visit the instructions created by eliminateCallFramePseudoInstr().
|
|
if (PrevI == BB->end())
|
|
I = BB->begin(); // The replaced instr was the first in the block.
|
|
else
|
|
I = llvm::next(PrevI);
|
|
continue;
|
|
}
|
|
|
|
MachineInstr *MI = I;
|
|
bool DoIncr = true;
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if (MI->getOperand(i).isFI()) {
|
|
// Some instructions (e.g. inline asm instructions) can have
|
|
// multiple frame indices and/or cause eliminateFrameIndex
|
|
// to insert more than one instruction. We need the register
|
|
// scavenger to go through all of these instructions so that
|
|
// it can update its register information. We keep the
|
|
// iterator at the point before insertion so that we can
|
|
// revisit them in full.
|
|
bool AtBeginning = (I == BB->begin());
|
|
if (!AtBeginning) --I;
|
|
|
|
// If this instruction has a FrameIndex operand, we need to
|
|
// use that target machine register info object to eliminate
|
|
// it.
|
|
TargetRegisterInfo::FrameIndexValue Value;
|
|
unsigned VReg =
|
|
TRI.eliminateFrameIndex(MI, SPAdj, &Value,
|
|
FrameIndexVirtualScavenging ? NULL : RS);
|
|
if (VReg) {
|
|
assert (FrameIndexVirtualScavenging &&
|
|
"Not scavenging, but virtual returned from "
|
|
"eliminateFrameIndex()!");
|
|
FrameConstantRegMap[VReg] = FrameConstantEntry(Value, SPAdj);
|
|
}
|
|
|
|
// Reset the iterator if we were at the beginning of the BB.
|
|
if (AtBeginning) {
|
|
I = BB->begin();
|
|
DoIncr = false;
|
|
}
|
|
|
|
MI = 0;
|
|
break;
|
|
}
|
|
|
|
if (DoIncr && I != BB->end()) ++I;
|
|
|
|
// Update register states.
|
|
if (RS && !FrameIndexVirtualScavenging && MI) RS->forward(MI);
|
|
}
|
|
|
|
assert(SPAdj == 0 && "Unbalanced call frame setup / destroy pairs?");
|
|
}
|
|
}
|
|
|
|
/// findLastUseReg - find the killing use of the specified register within
|
|
/// the instruciton range. Return the operand number of the kill in Operand.
|
|
static MachineBasicBlock::iterator
|
|
findLastUseReg(MachineBasicBlock::iterator I, MachineBasicBlock::iterator ME,
|
|
unsigned Reg) {
|
|
// Scan forward to find the last use of this virtual register
|
|
for (++I; I != ME; ++I) {
|
|
MachineInstr *MI = I;
|
|
bool isDefInsn = false;
|
|
bool isKillInsn = false;
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i)
|
|
if (MI->getOperand(i).isReg()) {
|
|
unsigned OpReg = MI->getOperand(i).getReg();
|
|
if (OpReg == 0 || !TargetRegisterInfo::isVirtualRegister(OpReg))
|
|
continue;
|
|
assert (OpReg == Reg
|
|
&& "overlapping use of scavenged index register!");
|
|
// If this is the killing use, we have a candidate.
|
|
if (MI->getOperand(i).isKill())
|
|
isKillInsn = true;
|
|
else if (MI->getOperand(i).isDef())
|
|
isDefInsn = true;
|
|
}
|
|
if (isKillInsn && !isDefInsn)
|
|
return I;
|
|
}
|
|
// If we hit the end of the basic block, there was no kill of
|
|
// the virtual register, which is wrong.
|
|
assert (0 && "scavenged index register never killed!");
|
|
return ME;
|
|
}
|
|
|
|
/// scavengeFrameVirtualRegs - Replace all frame index virtual registers
|
|
/// with physical registers. Use the register scavenger to find an
|
|
/// appropriate register to use.
|
|
void PEI::scavengeFrameVirtualRegs(MachineFunction &Fn) {
|
|
// Run through the instructions and find any virtual registers.
|
|
for (MachineFunction::iterator BB = Fn.begin(),
|
|
E = Fn.end(); BB != E; ++BB) {
|
|
RS->enterBasicBlock(BB);
|
|
|
|
// FIXME: The logic flow in this function is still too convoluted.
|
|
// It needs a cleanup refactoring. Do that in preparation for tracking
|
|
// more than one scratch register value and using ranges to find
|
|
// available scratch registers.
|
|
unsigned CurrentVirtReg = 0;
|
|
unsigned CurrentScratchReg = 0;
|
|
bool havePrevValue = false;
|
|
TargetRegisterInfo::FrameIndexValue PrevValue(0,0);
|
|
TargetRegisterInfo::FrameIndexValue Value(0,0);
|
|
MachineInstr *PrevLastUseMI = NULL;
|
|
unsigned PrevLastUseOp = 0;
|
|
bool trackingCurrentValue = false;
|
|
int SPAdj = 0;
|
|
|
|
// The instruction stream may change in the loop, so check BB->end()
|
|
// directly.
|
|
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
|
|
MachineInstr *MI = I;
|
|
bool isDefInsn = false;
|
|
bool isKillInsn = false;
|
|
bool clobbersScratchReg = false;
|
|
bool DoIncr = true;
|
|
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
|
|
if (MI->getOperand(i).isReg()) {
|
|
MachineOperand &MO = MI->getOperand(i);
|
|
unsigned Reg = MO.getReg();
|
|
if (Reg == 0)
|
|
continue;
|
|
if (!TargetRegisterInfo::isVirtualRegister(Reg)) {
|
|
// If we have a previous scratch reg, check and see if anything
|
|
// here kills whatever value is in there.
|
|
if (Reg == CurrentScratchReg) {
|
|
if (MO.isUse()) {
|
|
// Two-address operands implicitly kill
|
|
if (MO.isKill() || MI->isRegTiedToDefOperand(i))
|
|
clobbersScratchReg = true;
|
|
} else {
|
|
assert (MO.isDef());
|
|
clobbersScratchReg = true;
|
|
}
|
|
}
|
|
continue;
|
|
}
|
|
// If this is a def, remember that this insn defines the value.
|
|
// This lets us properly consider insns which re-use the scratch
|
|
// register, such as r2 = sub r2, #imm, in the middle of the
|
|
// scratch range.
|
|
if (MO.isDef())
|
|
isDefInsn = true;
|
|
|
|
// Have we already allocated a scratch register for this virtual?
|
|
if (Reg != CurrentVirtReg) {
|
|
// When we first encounter a new virtual register, it
|
|
// must be a definition.
|
|
assert(MI->getOperand(i).isDef() &&
|
|
"frame index virtual missing def!");
|
|
// We can't have nested virtual register live ranges because
|
|
// there's only a guarantee of one scavenged register at a time.
|
|
assert (CurrentVirtReg == 0 &&
|
|
"overlapping frame index virtual registers!");
|
|
|
|
// If the target gave us information about what's in the register,
|
|
// we can use that to re-use scratch regs.
|
|
DenseMap<unsigned, FrameConstantEntry>::iterator Entry =
|
|
FrameConstantRegMap.find(Reg);
|
|
trackingCurrentValue = Entry != FrameConstantRegMap.end();
|
|
if (trackingCurrentValue) {
|
|
SPAdj = (*Entry).second.second;
|
|
Value = (*Entry).second.first;
|
|
} else {
|
|
SPAdj = 0;
|
|
Value.first = 0;
|
|
Value.second = 0;
|
|
}
|
|
|
|
// If the scratch register from the last allocation is still
|
|
// available, see if the value matches. If it does, just re-use it.
|
|
if (trackingCurrentValue && havePrevValue && PrevValue == Value) {
|
|
// FIXME: This assumes that the instructions in the live range
|
|
// for the virtual register are exclusively for the purpose
|
|
// of populating the value in the register. That's reasonable
|
|
// for these frame index registers, but it's still a very, very
|
|
// strong assumption. rdar://7322732. Better would be to
|
|
// explicitly check each instruction in the range for references
|
|
// to the virtual register. Only delete those insns that
|
|
// touch the virtual register.
|
|
|
|
// Find the last use of the new virtual register. Remove all
|
|
// instruction between here and there, and update the current
|
|
// instruction to reference the last use insn instead.
|
|
MachineBasicBlock::iterator LastUseMI =
|
|
findLastUseReg(I, BB->end(), Reg);
|
|
|
|
// Remove all instructions up 'til the last use, since they're
|
|
// just calculating the value we already have.
|
|
BB->erase(I, LastUseMI);
|
|
I = LastUseMI;
|
|
|
|
// Extend the live range of the scratch register
|
|
PrevLastUseMI->getOperand(PrevLastUseOp).setIsKill(false);
|
|
RS->setUsed(CurrentScratchReg);
|
|
CurrentVirtReg = Reg;
|
|
|
|
// We deleted the instruction we were scanning the operands of.
|
|
// Jump back to the instruction iterator loop. Don't increment
|
|
// past this instruction since we updated the iterator already.
|
|
DoIncr = false;
|
|
break;
|
|
}
|
|
|
|
// Scavenge a new scratch register
|
|
CurrentVirtReg = Reg;
|
|
const TargetRegisterClass *RC = Fn.getRegInfo().getRegClass(Reg);
|
|
CurrentScratchReg = RS->FindUnusedReg(RC);
|
|
if (CurrentScratchReg == 0)
|
|
// No register is "free". Scavenge a register.
|
|
CurrentScratchReg = RS->scavengeRegister(RC, I, SPAdj);
|
|
|
|
PrevValue = Value;
|
|
}
|
|
// replace this reference to the virtual register with the
|
|
// scratch register.
|
|
assert (CurrentScratchReg && "Missing scratch register!");
|
|
MI->getOperand(i).setReg(CurrentScratchReg);
|
|
|
|
if (MI->getOperand(i).isKill()) {
|
|
isKillInsn = true;
|
|
PrevLastUseOp = i;
|
|
PrevLastUseMI = MI;
|
|
}
|
|
}
|
|
}
|
|
// If this is the last use of the scratch, stop tracking it. The
|
|
// last use will be a kill operand in an instruction that does
|
|
// not also define the scratch register.
|
|
if (isKillInsn && !isDefInsn) {
|
|
CurrentVirtReg = 0;
|
|
havePrevValue = trackingCurrentValue;
|
|
}
|
|
// Similarly, notice if instruction clobbered the value in the
|
|
// register we're tracking for possible later reuse. This is noted
|
|
// above, but enforced here since the value is still live while we
|
|
// process the rest of the operands of the instruction.
|
|
if (clobbersScratchReg) {
|
|
havePrevValue = false;
|
|
CurrentScratchReg = 0;
|
|
}
|
|
if (DoIncr) {
|
|
RS->forward(I);
|
|
++I;
|
|
}
|
|
}
|
|
}
|
|
}
|