afa8862328
a heavily stripped down FreeBSD/i386 (brutally stripped down actually) to attempt to get a stable base to start from. There is a lot missing still. Worth noting: - The kernel runs at 1GB in order to cheat with the pmap code. pmap uses a variation of the PAE code in order to avoid having to worry about 4 levels of page tables yet. - It boots in 64 bit "long mode" with a tiny trampoline embedded in the i386 loader. This simplifies locore.s greatly. - There are still quite a few fragments of i386-specific code that have not been translated yet, and some that I cheated and wrote dumb C versions of (bcopy etc). - It has both int 0x80 for syscalls (but using registers for argument passing, as is native on the amd64 ABI), and the 'syscall' instruction for syscalls. int 0x80 preserves all registers, 'syscall' does not. - I have tried to minimize looking at the NetBSD code, except in a couple of places (eg: to find which register they use to replace the trashed %rcx register in the syscall instruction). As a result, there is not a lot of similarity. I did look at NetBSD a few times while debugging to get some ideas about what I might have done wrong in my first attempt.
577 lines
12 KiB
C
577 lines
12 KiB
C
/*-
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* Copyright (c) 1993 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Functions to provide access to special i386 instructions.
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* This in included in sys/systm.h, and that file should be
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* used in preference to this.
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*/
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#ifndef _MACHINE_CPUFUNC_H_
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#define _MACHINE_CPUFUNC_H_
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#include <sys/cdefs.h>
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#include <machine/psl.h>
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struct thread;
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struct region_descriptor;
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__BEGIN_DECLS
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#define readb(va) (*(volatile u_int8_t *) (va))
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#define readw(va) (*(volatile u_int16_t *) (va))
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#define readl(va) (*(volatile u_int32_t *) (va))
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#define readq(va) (*(volatile u_int64_t *) (va))
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#define writeb(va, d) (*(volatile u_int8_t *) (va) = (d))
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#define writew(va, d) (*(volatile u_int16_t *) (va) = (d))
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#define writel(va, d) (*(volatile u_int32_t *) (va) = (d))
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#define writeq(va, d) (*(volatile u_int64_t *) (va) = (d))
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#ifdef __GNUC__
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static __inline void
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breakpoint(void)
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{
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__asm __volatile("int $3");
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}
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static __inline u_int
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bsfl(u_int mask)
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{
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u_int result;
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__asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
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return (result);
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}
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static __inline u_int
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bsrl(u_int mask)
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{
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u_int result;
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__asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
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return (result);
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}
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static __inline void
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disable_intr(void)
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{
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__asm __volatile("cli" : : : "memory");
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}
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static __inline void
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do_cpuid(u_int ax, u_int *p)
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{
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__asm __volatile("cpuid"
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: "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
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: "0" (ax));
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}
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static __inline void
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enable_intr(void)
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{
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__asm __volatile("sti");
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}
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#define HAVE_INLINE_FFS
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static __inline int
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ffs(int mask)
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{
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/*
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* Note that gcc-2's builtin ffs would be used if we didn't declare
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* this inline or turn off the builtin. The builtin is faster but
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* broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
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* versions.
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*/
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return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1);
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}
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#define HAVE_INLINE_FLS
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static __inline int
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fls(int mask)
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{
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return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
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}
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static __inline void
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halt(void)
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{
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__asm __volatile("hlt");
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}
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#if __GNUC__ < 2
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#define inb(port) inbv(port)
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#define outb(port, data) outbv(port, data)
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#else /* __GNUC >= 2 */
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/*
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* The following complications are to get around gcc not having a
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* constraint letter for the range 0..255. We still put "d" in the
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* constraint because "i" isn't a valid constraint when the port
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* isn't constant. This only matters for -O0 because otherwise
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* the non-working version gets optimized away.
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*
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* Use an expression-statement instead of a conditional expression
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* because gcc-2.6.0 would promote the operands of the conditional
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* and produce poor code for "if ((inb(var) & const1) == const2)".
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*
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* The unnecessary test `(port) < 0x10000' is to generate a warning if
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* the `port' has type u_short or smaller. Such types are pessimal.
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* This actually only works for signed types. The range check is
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* careful to avoid generating warnings.
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*/
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#define inb(port) __extension__ ({ \
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u_char _data; \
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if (__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
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&& (port) < 0x10000) \
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_data = inbc(port); \
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else \
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_data = inbv(port); \
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_data; })
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#define outb(port, data) ( \
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__builtin_constant_p(port) && ((port) & 0xffff) < 0x100 \
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&& (port) < 0x10000 \
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? outbc(port, data) : outbv(port, data))
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static __inline u_char
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inbc(u_int port)
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{
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u_char data;
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__asm __volatile("inb %1,%0" : "=a" (data) : "id" ((u_short)(port)));
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return (data);
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}
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static __inline void
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outbc(u_int port, u_char data)
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{
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__asm __volatile("outb %0,%1" : : "a" (data), "id" ((u_short)(port)));
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}
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#endif /* __GNUC <= 2 */
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static __inline u_char
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inbv(u_int port)
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{
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u_char data;
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/*
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* We use %%dx and not %1 here because i/o is done at %dx and not at
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* %edx, while gcc generates inferior code (movw instead of movl)
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* if we tell it to load (u_short) port.
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*/
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__asm __volatile("inb %%dx,%0" : "=a" (data) : "d" (port));
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return (data);
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}
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static __inline u_int
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inl(u_int port)
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{
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u_int data;
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__asm __volatile("inl %%dx,%0" : "=a" (data) : "d" (port));
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return (data);
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}
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static __inline void
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insb(u_int port, void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; insb"
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: "+D" (addr), "+c" (cnt)
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: "d" (port)
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: "memory");
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}
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static __inline void
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insw(u_int port, void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; insw"
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: "+D" (addr), "+c" (cnt)
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: "d" (port)
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: "memory");
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}
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static __inline void
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insl(u_int port, void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; insl"
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: "+D" (addr), "+c" (cnt)
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: "d" (port)
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: "memory");
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}
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static __inline void
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invd(void)
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{
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__asm __volatile("invd");
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}
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static __inline u_short
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inw(u_int port)
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{
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u_short data;
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__asm __volatile("inw %%dx,%0" : "=a" (data) : "d" (port));
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return (data);
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}
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static __inline void
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outbv(u_int port, u_char data)
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{
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u_char al;
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/*
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* Use an unnecessary assignment to help gcc's register allocator.
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* This make a large difference for gcc-1.40 and a tiny difference
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* for gcc-2.6.0. For gcc-1.40, al had to be ``asm("ax")'' for
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* best results. gcc-2.6.0 can't handle this.
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*/
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al = data;
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__asm __volatile("outb %0,%%dx" : : "a" (al), "d" (port));
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}
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static __inline void
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outl(u_int port, u_int data)
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{
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/*
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* outl() and outw() aren't used much so we haven't looked at
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* possible micro-optimizations such as the unnecessary
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* assignment for them.
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*/
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__asm __volatile("outl %0,%%dx" : : "a" (data), "d" (port));
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}
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static __inline void
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outsb(u_int port, const void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; outsb"
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: "+S" (addr), "+c" (cnt)
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: "d" (port));
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}
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static __inline void
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outsw(u_int port, const void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; outsw"
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: "+S" (addr), "+c" (cnt)
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: "d" (port));
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}
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static __inline void
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outsl(u_int port, const void *addr, size_t cnt)
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{
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__asm __volatile("cld; rep; outsl"
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: "+S" (addr), "+c" (cnt)
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: "d" (port));
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}
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static __inline void
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outw(u_int port, u_short data)
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{
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__asm __volatile("outw %0,%%dx" : : "a" (data), "d" (port));
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}
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static __inline void
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ia32_pause(void)
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{
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__asm __volatile("pause");
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}
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static __inline u_long
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read_rflags(void)
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{
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u_long rf;
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__asm __volatile("pushfq; popq %0" : "=r" (rf));
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return (rf);
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}
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static __inline u_int64_t
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rdmsr(u_int msr)
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{
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u_int32_t low, high;
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__asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
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return (low | ((u_int64_t)high << 32));
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}
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static __inline u_int64_t
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rdpmc(u_int pmc)
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{
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u_int32_t low, high;
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__asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
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return (low | ((u_int64_t)high << 32));
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}
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static __inline u_int64_t
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rdtsc(void)
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{
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u_int32_t low, high;
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__asm __volatile("rdtsc" : "=a" (low), "=d" (high));
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return (low | ((u_int64_t)high << 32));
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}
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static __inline void
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wbinvd(void)
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{
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__asm __volatile("wbinvd");
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}
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static __inline void
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write_rflags(u_long rf)
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{
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__asm __volatile("pushq %0; popfq" : : "r" (rf));
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}
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static __inline void
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wrmsr(u_int msr, u_int64_t newval)
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{
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u_int32_t low, high;
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low = newval;
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high = newval >> 32;
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__asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
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}
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static __inline void
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load_cr0(u_long data)
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{
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__asm __volatile("movq %0,%%cr0" : : "r" (data));
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}
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static __inline u_long
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rcr0(void)
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{
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u_long data;
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__asm __volatile("movq %%cr0,%0" : "=r" (data));
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return (data);
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}
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static __inline u_long
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rcr2(void)
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{
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u_long data;
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__asm __volatile("movq %%cr2,%0" : "=r" (data));
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return (data);
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}
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static __inline void
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load_cr3(u_long data)
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{
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__asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
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}
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static __inline u_long
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rcr3(void)
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{
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u_long data;
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__asm __volatile("movq %%cr3,%0" : "=r" (data));
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return (data);
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}
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static __inline void
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load_cr4(u_long data)
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{
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__asm __volatile("movq %0,%%cr4" : : "r" (data));
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}
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static __inline u_long
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rcr4(void)
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{
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u_long data;
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__asm __volatile("movq %%cr4,%0" : "=r" (data));
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return (data);
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}
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/*
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* Global TLB flush (except for thise for pages marked PG_G)
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*/
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static __inline void
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invltlb(void)
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{
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load_cr3(rcr3());
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}
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/*
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* TLB flush for an individual page (even if it has PG_G).
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* Only works on 486+ CPUs (i386 does not have PG_G).
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*/
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static __inline void
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invlpg(u_long addr)
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{
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__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
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}
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/* XXX these are replaced with rdmsr/wrmsr */
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static __inline u_int
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rfs(void)
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{
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u_int sel;
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__asm __volatile("movl %%fs,%0" : "=rm" (sel));
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return (sel);
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}
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static __inline u_int
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rgs(void)
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{
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u_int sel;
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__asm __volatile("movl %%gs,%0" : "=rm" (sel));
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return (sel);
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}
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static __inline void
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load_fs(u_int sel)
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{
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__asm __volatile("movl %0,%%fs" : : "rm" (sel));
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}
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static __inline void
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load_gs(u_int sel)
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{
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__asm __volatile("movl %0,%%gs" : : "rm" (sel));
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}
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/* void lidt(struct region_descriptor *addr); */
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static __inline void
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lidt(struct region_descriptor *addr)
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{
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__asm __volatile("lidt (%0)" : : "r" (addr));
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}
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/* void lldt(u_short sel); */
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static __inline void
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lldt(u_short sel)
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{
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__asm __volatile("lldt %0" : : "r" (sel));
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}
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/* void ltr(u_short sel); */
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static __inline void
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ltr(u_short sel)
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{
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__asm __volatile("ltr %0" : : "r" (sel));
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}
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static __inline register_t
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intr_disable(void)
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{
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register_t rflags;
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rflags = read_rflags();
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disable_intr();
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return (rflags);
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}
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static __inline void
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intr_restore(register_t rflags)
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{
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write_rflags(rflags);
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}
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#else /* !__GNUC__ */
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int breakpoint(void);
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u_int bsfl(u_int mask);
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u_int bsrl(u_int mask);
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void cpu_invlpg(u_long addr);
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void cpu_invlpg_range(u_long start, u_long end);
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void disable_intr(void);
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|
void do_cpuid(u_int ax, u_int *p);
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|
void enable_intr(void);
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|
void halt(void);
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|
u_char inb(u_int port);
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u_int inl(u_int port);
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void insb(u_int port, void *addr, size_t cnt);
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|
void insl(u_int port, void *addr, size_t cnt);
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void insw(u_int port, void *addr, size_t cnt);
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void invd(void);
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void invlpg(u_int addr);
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void invlpg_range(u_int start, u_int end);
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void invltlb(void);
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u_short inw(u_int port);
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void load_cr0(u_int cr0);
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void load_cr3(u_int cr3);
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void load_cr4(u_int cr4);
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void load_fs(u_int sel);
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void load_gs(u_int sel);
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struct region_descriptor;
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void lidt(struct region_descriptor *addr);
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void lldt(u_short sel);
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void ltr(u_short sel);
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void outb(u_int port, u_char data);
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void outl(u_int port, u_int data);
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void outsb(u_int port, void *addr, size_t cnt);
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void outsl(u_int port, void *addr, size_t cnt);
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void outsw(u_int port, void *addr, size_t cnt);
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void outw(u_int port, u_short data);
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void ia32_pause(void);
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u_int rcr0(void);
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u_int rcr2(void);
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u_int rcr3(void);
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u_int rcr4(void);
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u_int rfs(void);
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u_int rgs(void);
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u_int64_t rdmsr(u_int msr);
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u_int64_t rdpmc(u_int pmc);
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u_int64_t rdtsc(void);
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|
u_int read_rflags(void);
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void wbinvd(void);
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void write_rflags(u_int rf);
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void wrmsr(u_int msr, u_int64_t newval);
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void load_dr7(u_int dr7);
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register_t intr_disable(void);
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void intr_restore(register_t rf);
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#endif /* __GNUC__ */
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void reset_dbregs(void);
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__END_DECLS
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#endif /* !_MACHINE_CPUFUNC_H_ */
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