f11c7f6305
The isci driver is for the integrated SAS controller in the Intel C600 (Patsburg) chipset. Source files in sys/dev/isci directory are FreeBSD-specific, and sys/dev/isci/scil subdirectory contains an OS-agnostic library (SCIL) published by Intel to control the SAS controller. This library is used primarily as-is in this driver, with some post-processing to better integrate into the kernel build environment. isci.4 and a README in the sys/dev/isci directory contain a few additional details. This driver is only built for amd64 and i386 targets. Sponsored by: Intel Reviewed by: scottl Approved by: scottl
596 lines
16 KiB
C
596 lines
16 KiB
C
/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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* The full GNU General Public License is included in this distribution
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* in the file called LICENSE.GPL.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _SCIC_SDS_PORT_H_
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#define _SCIC_SDS_PORT_H_
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#ifdef __cplusplus
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extern "C" {
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#endif // __cplusplus
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/**
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* @file
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*
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* @brief This file contains the structures, constants and prototypes for the
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* SCIC_SDS_PORT_T object.
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*/
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#include <dev/isci/scil/sci_controller_constants.h>
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#include <dev/isci/scil/intel_sas.h>
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#include <dev/isci/scil/sci_base_port.h>
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#include <dev/isci/scil/sci_base_phy.h>
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#include <dev/isci/scil/scu_registers.h>
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#define SCIC_SDS_DUMMY_PORT 0xFF
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/**
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* @enum SCIC_SDS_PORT_READY_SUBSTATES
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*
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* This enumeration depicts all of the states for the core port ready substate
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* machine.
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*/
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enum SCIC_SDS_PORT_READY_SUBSTATES
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{
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/**
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* The substate where the port is started and ready but has no active phys.
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*/
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SCIC_SDS_PORT_READY_SUBSTATE_WAITING,
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/**
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* The substate where the port is started and ready and there is at least one
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* phy operational.
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*/
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SCIC_SDS_PORT_READY_SUBSTATE_OPERATIONAL,
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/**
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* The substate where the port is started and there was an add/remove phy
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* event. This state is only used in Automatic Port Configuration Mode (APC)
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*/
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SCIC_SDS_PORT_READY_SUBSTATE_CONFIGURING,
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SCIC_SDS_PORT_READY_MAX_SUBSTATES
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};
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struct SCIC_SDS_CONTROLLER;
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struct SCIC_SDS_PHY;
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struct SCIC_SDS_REMOTE_DEVICE;
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struct SCIC_SDS_REQUEST;
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/**
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* @struct SCIC_SDS_PORT
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*
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* The core port object provides the the abstraction for an SCU port.
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*/
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typedef struct SCIC_SDS_PORT
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{
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/**
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* This field is the oommon base port object.
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*/
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SCI_BASE_PORT_T parent;
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/**
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* This field is the port index that is reported to the SCI USER. This allows
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* the actual hardware physical port to change without the SCI USER getting a
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* different answer for the get port index.
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*/
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U8 logical_port_index;
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/**
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* This field is the port index used to program the SCU hardware.
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*/
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U8 physical_port_index;
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/**
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* This field contains the active phy mask for the port. This mask is used in
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* conjunction with the phy state to determine which phy to select for some
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* port operations.
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*/
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U8 active_phy_mask;
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/**
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* This field contains the phy mask for the port that are already part of the port.
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*/
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U8 enabled_phy_mask;
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U16 reserved_rni;
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U16 reserved_tci;
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/**
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* This field contains the count of the io requests started on this port
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* object. It is used to control controller shutdown.
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*/
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U32 started_request_count;
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/**
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* This field contains the number of devices assigned to this port. It is
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* used to control port start requests.
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*/
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U32 assigned_device_count;
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/**
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* This field contains the reason for the port not going ready. It is
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* assigned in the state handlers and used in the state transition.
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*/
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U32 not_ready_reason;
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/**
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* This field is the table of phys assigned to the port.
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*/
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struct SCIC_SDS_PHY *phy_table[SCI_MAX_PHYS];
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/**
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* This field is a pointer back to the controller that owns this port object.
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*/
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struct SCIC_SDS_CONTROLLER *owning_controller;
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/**
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* This field contains the port start/stop timer handle.
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*/
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void *timer_handle;
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/**
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* This field points to the current set of state handlers for this port
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* object. These state handlers are assigned at each enter state of the state
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* machine.
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*/
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struct SCIC_SDS_PORT_STATE_HANDLER *state_handlers;
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/**
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* This field is the ready substate machine for the port.
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*/
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SCI_BASE_STATE_MACHINE_T ready_substate_machine;
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#ifdef SCI_LOGGING
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/**
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* This field is the ready substate machine logger. It logs each state
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* transition request in the ready substate machine.
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*/
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SCI_BASE_STATE_MACHINE_LOGGER_T ready_substate_machine_logger;
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#endif
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/// Memory mapped hardware register space
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/**
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* This field is the pointer to the port task scheduler registers for the SCU
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* hardware.
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*/
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SCU_PORT_TASK_SCHEDULER_REGISTERS_T *port_task_scheduler_registers;
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/**
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* This field is identical for all port objects and points to the port task
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* scheduler group PE configuration registers. It is used to assign PEs to a
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* port.
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*/
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SCU_PORT_PE_CONFIGURATION_REGISTER_T *port_pe_configuration_register;
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/**
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* This field is the VIIT register space for ths port object.
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*/
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SCU_VIIT_ENTRY_T *viit_registers;
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} SCIC_SDS_PORT_T;
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typedef SCI_STATUS (*SCIC_SDS_PORT_EVENT_HANDLER_T)(struct SCIC_SDS_PORT *, U32);
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typedef SCI_STATUS (*SCIC_SDS_PORT_FRAME_HANDLER_T)(struct SCIC_SDS_PORT *, U32);
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typedef void (*SCIC_SDS_PORT_LINK_HANDLER_T)(struct SCIC_SDS_PORT *, struct SCIC_SDS_PHY *);
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typedef SCI_STATUS (*SCIC_SDS_PORT_IO_REQUEST_HANDLER_T)(
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struct SCIC_SDS_PORT *,
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struct SCIC_SDS_REMOTE_DEVICE *,
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struct SCIC_SDS_REQUEST *);
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typedef struct SCIC_SDS_PORT_STATE_HANDLER
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{
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SCI_BASE_PORT_STATE_HANDLER_T parent;
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SCIC_SDS_PORT_FRAME_HANDLER_T frame_handler;
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SCIC_SDS_PORT_EVENT_HANDLER_T event_handler;
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SCIC_SDS_PORT_LINK_HANDLER_T link_up_handler;
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SCIC_SDS_PORT_LINK_HANDLER_T link_down_handler;
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SCIC_SDS_PORT_IO_REQUEST_HANDLER_T start_io_handler;
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SCIC_SDS_PORT_IO_REQUEST_HANDLER_T complete_io_handler;
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} SCIC_SDS_PORT_STATE_HANDLER_T;
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extern SCI_BASE_STATE_T scic_sds_port_state_table[];
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extern SCI_BASE_STATE_T scic_sds_port_ready_substate_table[];
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extern SCIC_SDS_PORT_STATE_HANDLER_T scic_sds_port_state_handler_table[];
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extern SCIC_SDS_PORT_STATE_HANDLER_T scic_sds_port_ready_substate_handler_table[];
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/**
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* Helper macro to get the owning controller of this port
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*/
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#define scic_sds_port_get_controller(this_port) \
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((this_port)->owning_controller)
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/**
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* Helper macro to get the base state machine for this port
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*/
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#define scic_sds_port_get_base_state_machine(this_port) \
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(&(this_port)->parent.state_machine)
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/**
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* This macro will change the state handlers to those of the specified state
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* id
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*/
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#define scic_sds_port_set_base_state_handlers(this_port, state_id) \
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scic_sds_port_set_state_handlers( \
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(this_port), &scic_sds_port_state_handler_table[(state_id)])
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/**
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* Helper macro to get the ready substate machine for this port
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*/
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#define scic_sds_port_get_ready_substate_machine(this_port) \
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(&(this_port)->ready_substate_machine)
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/**
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* Helper macro to set the port object state handlers
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*/
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#define scic_sds_port_set_state_handlers(this_port, handlers) \
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((this_port)->state_handlers = (handlers))
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/**
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* This macro returns the physical port index for this port object
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*/
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#define scic_sds_port_get_index(this_port) \
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((this_port)->physical_port_index)
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/**
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* Helper macro to increment the started request count
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*/
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#define scic_sds_port_increment_request_count(this_port) \
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((this_port)->started_request_count++)
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#ifdef SCIC_DEBUG_ENABLED
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/**
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* @brief This method decrements the started io request count. The method
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* will not decrment the started io request count below 0 and will
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* log a debug message if this is attempted.
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*
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* @param[in] this_port
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*/
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void scic_sds_port_decrement_request_count(
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SCIC_SDS_PORT_T *this_port
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);
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#else
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/**
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* Helper macro to decrement the started io request count. The macro will
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* not decrement the started io request count below 0.
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*/
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#define scic_sds_port_decrement_request_count(this_port) \
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( \
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(this_port)->started_request_count = ( \
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((this_port)->started_request_count == 0) ? \
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(this_port)->started_request_count : \
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((this_port)->started_request_count - 1) \
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) \
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)
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#endif
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/**
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* Helper macro to write the phys port assignment
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*/
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#define scic_sds_port_write_phy_assignment(port, phy) \
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SCU_PCSPExCR_WRITE( \
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(port), \
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(phy)->phy_index, \
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(port)->physical_port_index \
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)
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/**
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* Helper macro to read the phys port assignment
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*/
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#define scic_sds_port_read_phy_assignment(port, phy) \
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SCU_PCSPExCR_READ( \
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(port), \
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(phy)->phy_index \
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)
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#define scic_sds_port_active_phy(port, phy) \
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(((port)->active_phy_mask & (1 << (phy)->phy_index)) != 0)
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// ---------------------------------------------------------------------------
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U32 scic_sds_port_get_object_size(void);
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U32 scic_sds_port_get_min_timer_count(void);
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U32 scic_sds_port_get_max_timer_count(void);
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// ---------------------------------------------------------------------------
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#ifdef SCI_LOGGING
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void scic_sds_port_initialize_state_logging(
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SCIC_SDS_PORT_T *this_port
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);
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#else
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#define scic_sds_port_initialize_state_logging(x)
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#endif
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// ---------------------------------------------------------------------------
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void scic_sds_port_construct(
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SCIC_SDS_PORT_T *this_port,
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U8 port_index,
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struct SCIC_SDS_CONTROLLER *owning_controller
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);
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SCI_STATUS scic_sds_port_initialize(
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SCIC_SDS_PORT_T *this_port,
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void *port_task_scheduler_registers,
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void *port_configuration_regsiter,
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void *viit_registers
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);
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// ---------------------------------------------------------------------------
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SCI_STATUS scic_sds_port_add_phy(
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struct SCIC_SDS_PORT * this_port,
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struct SCIC_SDS_PHY * the_phy
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);
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SCI_STATUS scic_sds_port_remove_phy(
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struct SCIC_SDS_PORT * this_port,
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struct SCIC_SDS_PHY * the_phy
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);
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void scic_sds_port_setup_transports(
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SCIC_SDS_PORT_T * this_port,
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U32 device_id
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);
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void scic_sds_port_activate_phy(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy,
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BOOL do_notify_user,
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BOOL do_resume_phy
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);
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void scic_sds_port_deactivate_phy(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy,
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BOOL do_notify_user
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);
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struct SCIC_SDS_PHY * scic_sds_port_get_a_connected_phy(
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SCIC_SDS_PORT_T * this_port
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);
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void scic_sds_port_invalid_link_up(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy
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);
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void scic_sds_port_general_link_up_handler(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *the_phy,
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BOOL do_notify_user,
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BOOL do_resume_phy
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);
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BOOL scic_sds_port_link_detected(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy
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);
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void scic_sds_port_link_up(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy
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);
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void scic_sds_port_link_down(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_PHY *phy
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);
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// ---------------------------------------------------------------------------
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void scic_sds_port_timeout_handler(
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void *port
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);
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// ---------------------------------------------------------------------------
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SCI_STATUS scic_sds_port_start_io(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_REMOTE_DEVICE *the_device,
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struct SCIC_SDS_REQUEST *the_io_request
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);
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SCI_STATUS scic_sds_port_complete_io(
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SCIC_SDS_PORT_T *this_port,
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struct SCIC_SDS_REMOTE_DEVICE *the_device,
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struct SCIC_SDS_REQUEST *the_io_request
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);
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// ---------------------------------------------------------------------------
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void scic_sds_port_update_viit_entry(
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SCIC_SDS_PORT_T *this_port
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);
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// ---------------------------------------------------------------------------
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SCI_STATUS scic_sds_port_default_start_handler(
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SCI_BASE_PORT_T *port
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);
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SCI_STATUS scic_sds_port_default_stop_handler(
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SCI_BASE_PORT_T *port
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);
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SCI_STATUS scic_sds_port_default_destruct_handler(
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SCI_BASE_PORT_T *port
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);
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SCI_STATUS scic_sds_port_default_reset_handler(
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SCI_BASE_PORT_T * port,
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U32 timeout
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);
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SCI_STATUS scic_sds_port_default_add_phy_handler(
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SCI_BASE_PORT_T *port,
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SCI_BASE_PHY_T *phy
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);
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SCI_STATUS scic_sds_port_default_remove_phy_handler(
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SCI_BASE_PORT_T *port,
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SCI_BASE_PHY_T *phy
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);
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SCI_STATUS scic_sds_port_default_frame_handler(
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struct SCIC_SDS_PORT * port,
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U32 frame_index
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);
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SCI_STATUS scic_sds_port_default_event_handler(
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struct SCIC_SDS_PORT * port,
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U32 event_code
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);
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void scic_sds_port_default_link_up_handler(
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struct SCIC_SDS_PORT *this_port,
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struct SCIC_SDS_PHY *phy
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);
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void scic_sds_port_default_link_down_handler(
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struct SCIC_SDS_PORT *this_port,
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|
struct SCIC_SDS_PHY *phy
|
|
);
|
|
|
|
SCI_STATUS scic_sds_port_default_start_io_handler(
|
|
struct SCIC_SDS_PORT *port,
|
|
struct SCIC_SDS_REMOTE_DEVICE *device,
|
|
struct SCIC_SDS_REQUEST *io_request
|
|
);
|
|
|
|
SCI_STATUS scic_sds_port_default_complete_io_handler(
|
|
struct SCIC_SDS_PORT *port,
|
|
struct SCIC_SDS_REMOTE_DEVICE *device,
|
|
struct SCIC_SDS_REQUEST *io_request
|
|
);
|
|
|
|
SCI_SAS_LINK_RATE scic_sds_port_get_max_allowed_speed(
|
|
SCIC_SDS_PORT_T * this_port
|
|
);
|
|
|
|
void scic_sds_port_broadcast_change_received(
|
|
struct SCIC_SDS_PORT * this_port,
|
|
struct SCIC_SDS_PHY * this_phy
|
|
);
|
|
|
|
BOOL scic_sds_port_is_valid_phy_assignment(
|
|
SCIC_SDS_PORT_T *this_port,
|
|
U32 phy_index
|
|
);
|
|
|
|
BOOL scic_sds_port_is_phy_mask_valid(
|
|
SCIC_SDS_PORT_T * this_port,
|
|
U32 phy_mask
|
|
);
|
|
|
|
U32 scic_sds_port_get_phys(
|
|
SCIC_SDS_PORT_T * this_port
|
|
);
|
|
|
|
void scic_sds_port_get_sas_address(
|
|
SCIC_SDS_PORT_T * this_port,
|
|
SCI_SAS_ADDRESS_T * sas_address
|
|
);
|
|
|
|
void scic_sds_port_get_attached_sas_address(
|
|
SCIC_SDS_PORT_T * this_port,
|
|
SCI_SAS_ADDRESS_T * sas_address
|
|
);
|
|
|
|
void scic_sds_port_get_attached_protocols(
|
|
SCIC_SDS_PORT_T * this_port,
|
|
SCI_SAS_IDENTIFY_ADDRESS_FRAME_PROTOCOLS_T * protocols
|
|
);
|
|
|
|
SCI_STATUS scic_sds_port_set_phy(
|
|
struct SCIC_SDS_PORT *port,
|
|
struct SCIC_SDS_PHY *phy
|
|
);
|
|
|
|
SCI_STATUS scic_sds_port_clear_phy(
|
|
struct SCIC_SDS_PORT *port,
|
|
struct SCIC_SDS_PHY *phy
|
|
);
|
|
|
|
void scic_sds_port_suspend_port_task_scheduler(
|
|
SCIC_SDS_PORT_T *this_port
|
|
);
|
|
|
|
void scic_sds_port_resume_port_task_scheduler(
|
|
SCIC_SDS_PORT_T *this_port
|
|
);
|
|
|
|
void scic_sds_port_release_resource(
|
|
struct SCIC_SDS_CONTROLLER * controller,
|
|
struct SCIC_SDS_PORT * port
|
|
);
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif // __cplusplus
|
|
|
|
|
|
#endif // _SCIC_SDS_PORT_H_
|