a426b286c8
patch for r263619, and unify all the URLs to point to svnweb.
98 lines
4.0 KiB
Diff
98 lines
4.0 KiB
Diff
Pull in r200617 from upstream llvm trunk (by Venkatraman Govindaraju):
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[Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.
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Introduced here: http://svnweb.freebsd.org/changeset/base/262261
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Index: lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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===================================================================
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--- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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+++ lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
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@@ -33,6 +33,25 @@
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using namespace llvm;
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+
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+static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
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+ StringRef TT) {
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+ MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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+ unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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+ MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
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+ MAI->addInitialFrameState(Inst);
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+ return MAI;
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+}
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+
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+static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
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+ StringRef TT) {
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+ MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
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+ unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
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+ MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047);
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+ MAI->addInitialFrameState(Inst);
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+ return MAI;
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+}
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+
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static MCInstrInfo *createSparcMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitSparcMCInstrInfo(X);
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@@ -41,7 +60,7 @@ static MCInstrInfo *createSparcMCInstrInfo() {
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static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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- InitSparcMCRegisterInfo(X, SP::I7);
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+ InitSparcMCRegisterInfo(X, SP::O7);
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return X;
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}
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@@ -132,8 +151,8 @@ static MCInstPrinter *createSparcMCInstPrinter(con
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extern "C" void LLVMInitializeSparcTargetMC() {
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// Register the MC asm info.
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- RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
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- RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
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+ RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
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+ RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
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Index: lib/Target/Sparc/SparcRegisterInfo.cpp
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===================================================================
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--- lib/Target/Sparc/SparcRegisterInfo.cpp
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+++ lib/Target/Sparc/SparcRegisterInfo.cpp
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@@ -35,7 +35,7 @@ ReserveAppRegisters("sparc-reserve-app-registers",
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cl::desc("Reserve application registers (%g2-%g4)"));
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SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
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- : SparcGenRegisterInfo(SP::I7), Subtarget(st) {
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+ : SparcGenRegisterInfo(SP::O7), Subtarget(st) {
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}
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const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
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Index: test/CodeGen/SPARC/exception.ll
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===================================================================
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--- test/CodeGen/SPARC/exception.ll
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+++ test/CodeGen/SPARC/exception.ll
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@@ -56,7 +56,11 @@
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; V8PIC_NOCFI-NEXT: .word _ZTIi
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; V8PIC_NOCFI: .section .eh_frame
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; V8PIC_NOCFI-NOT: .section
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+; V8PIC_NOCFI: .byte 15 ! CIE Return Address Column
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; V8PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
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+; V8PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
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+; V8PIC_NOCFI: .byte 14 ! Reg 14
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+; V8PIC_NOCFI-NEXT: .byte 0 ! Offset 0
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; V8PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
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@@ -94,7 +98,11 @@
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; V9PIC_NOCFI-NEXT: .xword _ZTIi
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; V9PIC_NOCFI: .section .eh_frame
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; V9PIC_NOCFI-NOT: .section
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+; V9PIC_NOCFI: .byte 15 ! CIE Return Address Column
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; V9PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
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+; V9PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
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+; V9PIC_NOCFI-NEXT: .byte 14 ! Reg 14
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+; V9PIC_NOCFI: .ascii "\377\017" ! Offset 2047
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; V9PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
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define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {
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