132 lines
5.5 KiB
Diff
132 lines
5.5 KiB
Diff
Pull in r200963 from upstream llvm trunk (by Venkatraman Govindaraju):
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[Sparc] Emit correct encoding for atomic instructions. Also, add support for parsing CAS instructions to test the CAS encoding.
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Introduced here: http://svnweb.freebsd.org/changeset/base/262261
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Index: test/MC/Sparc/sparc-atomic-instructions.s
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===================================================================
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--- test/MC/Sparc/sparc-atomic-instructions.s
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+++ test/MC/Sparc/sparc-atomic-instructions.s
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@@ -0,0 +1,19 @@
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+! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
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+
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+ ! CHECK: membar 15 ! encoding: [0x81,0x43,0xe0,0x0f]
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+ membar 15
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+
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+ ! CHECK: stbar ! encoding: [0x81,0x43,0xc0,0x00]
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+ stbar
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+
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+ ! CHECK: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
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+ swap [%i0+%l6], %o2
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+
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+ ! CHECK: swap [%i0+32], %o2 ! encoding: [0xd4,0x7e,0x20,0x20]
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+ swap [%i0+32], %o2
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+
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+ ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
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+ cas [%i0], %l6, %o2
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+
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+ ! CHECK: casx [%i0], %l6, %o2 ! encoding: [0xd5,0xf6,0x10,0x16]
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+ casx [%i0], %l6, %o2
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Index: lib/Target/Sparc/SparcInstrInfo.td
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===================================================================
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--- lib/Target/Sparc/SparcInstrInfo.td
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+++ lib/Target/Sparc/SparcInstrInfo.td
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@@ -935,19 +935,19 @@ let Predicates = [HasV9], hasSideEffects = 1, rd =
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def MEMBARi : F3_2<2, 0b101000, (outs), (ins i32imm:$simm13),
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"membar $simm13", []>;
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-let Constraints = "$val = $rd" in {
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+let Constraints = "$val = $dst" in {
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def SWAPrr : F3_1<3, 0b001111,
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- (outs IntRegs:$rd), (ins IntRegs:$val, MEMrr:$addr),
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- "swap [$addr], $rd",
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- [(set i32:$rd, (atomic_swap_32 ADDRrr:$addr, i32:$val))]>;
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+ (outs IntRegs:$dst), (ins MEMrr:$addr, IntRegs:$val),
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+ "swap [$addr], $dst",
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+ [(set i32:$dst, (atomic_swap_32 ADDRrr:$addr, i32:$val))]>;
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def SWAPri : F3_2<3, 0b001111,
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- (outs IntRegs:$rd), (ins IntRegs:$val, MEMri:$addr),
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- "swap [$addr], $rd",
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- [(set i32:$rd, (atomic_swap_32 ADDRri:$addr, i32:$val))]>;
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+ (outs IntRegs:$dst), (ins MEMri:$addr, IntRegs:$val),
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+ "swap [$addr], $dst",
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+ [(set i32:$dst, (atomic_swap_32 ADDRri:$addr, i32:$val))]>;
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}
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let Predicates = [HasV9], Constraints = "$swap = $rd" in
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- def CASrr: F3_1<3, 0b111100,
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+ def CASrr: F3_1_asi<3, 0b111100, 0b10000000,
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(outs IntRegs:$rd), (ins IntRegs:$rs1, IntRegs:$rs2,
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IntRegs:$swap),
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"cas [$rs1], $rs2, $rd",
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Index: lib/Target/Sparc/SparcInstrFormats.td
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===================================================================
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--- lib/Target/Sparc/SparcInstrFormats.td
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+++ lib/Target/Sparc/SparcInstrFormats.td
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@@ -100,9 +100,8 @@ class F3<dag outs, dag ins, string asmstr, list<da
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// Specific F3 classes: SparcV8 manual, page 44
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//
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-class F3_1<bits<2> opVal, bits<6> op3val, dag outs, dag ins,
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+class F3_1_asi<bits<2> opVal, bits<6> op3val, bits<8> asi, dag outs, dag ins,
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string asmstr, list<dag> pattern> : F3<outs, ins, asmstr, pattern> {
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- bits<8> asi = 0; // asi not currently used
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bits<5> rs2;
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let op = opVal;
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@@ -113,6 +112,10 @@ class F3<dag outs, dag ins, string asmstr, list<da
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let Inst{4-0} = rs2;
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}
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+class F3_1<bits<2> opVal, bits<6> op3val, dag outs, dag ins, string asmstr,
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+ list<dag> pattern> : F3_1_asi<opVal, op3val, 0, outs, ins,
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+ asmstr, pattern>;
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+
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class F3_2<bits<2> opVal, bits<6> op3val, dag outs, dag ins,
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string asmstr, list<dag> pattern> : F3<outs, ins, asmstr, pattern> {
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bits<13> simm13;
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Index: lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
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===================================================================
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--- lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
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+++ lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
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@@ -546,7 +546,24 @@ parseOperand(SmallVectorImpl<MCParsedAsmOperand*>
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Parser.getTok().getLoc()));
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Parser.Lex(); // Eat the [
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- ResTy = parseMEMOperand(Operands);
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+ if (Mnemonic == "cas" || Mnemonic == "casx") {
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+ SMLoc S = Parser.getTok().getLoc();
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+ if (getLexer().getKind() != AsmToken::Percent)
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+ return MatchOperand_NoMatch;
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+ Parser.Lex(); // eat %
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+
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+ unsigned RegNo, RegKind;
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+ if (!matchRegisterName(Parser.getTok(), RegNo, RegKind))
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+ return MatchOperand_NoMatch;
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+
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+ Parser.Lex(); // Eat the identifier token.
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+ SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer()-1);
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+ Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E));
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+ ResTy = MatchOperand_Success;
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+ } else {
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+ ResTy = parseMEMOperand(Operands);
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+ }
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+
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if (ResTy != MatchOperand_Success)
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return ResTy;
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Index: lib/Target/Sparc/SparcInstr64Bit.td
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===================================================================
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--- lib/Target/Sparc/SparcInstr64Bit.td
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+++ lib/Target/Sparc/SparcInstr64Bit.td
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@@ -415,7 +415,7 @@ def SETHIXi : F2_1<0b100,
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// ATOMICS.
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let Predicates = [Is64Bit], Constraints = "$swap = $rd" in {
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- def CASXrr: F3_1<3, 0b111110,
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+ def CASXrr: F3_1_asi<3, 0b111110, 0b10000000,
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(outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2,
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I64Regs:$swap),
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"casx [$rs1], $rs2, $rd",
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