9e2b2d6996
Freescale SoCs use a set of IRQs at the high end of the OpenPIC IRQ list, not counted in the NIRQs of the Feature reporting register. Some SoCs include a MSI inbound window in the PCIe controller configuration registers as well, but some don't. Currently, this only handles the SoCs *with* the MSI window. There are 256 MSIs per MSI bank (32 per MSI IRQ, 8 IRQs per MSI bank). The P5020 has 3 banks, yielding up to 768 MSIs; older SoCs have only one bank.
181 lines
5.0 KiB
C
181 lines
5.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Copyright 2003 by Peter Grehan. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/bus.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/pio.h>
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#include <machine/resource.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <sys/rman.h>
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#include <machine/openpicreg.h>
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#include <machine/openpicvar.h>
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#include "pic_if.h"
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/*
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* OFW interface
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*/
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static int openpic_ofw_probe(device_t);
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static int openpic_ofw_attach(device_t);
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static void openpic_ofw_translate_code(device_t, u_int irq, int code,
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enum intr_trigger *trig, enum intr_polarity *pol);
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static device_method_t openpic_ofw_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, openpic_ofw_probe),
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DEVMETHOD(device_attach, openpic_ofw_attach),
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DEVMETHOD(device_suspend, openpic_suspend),
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DEVMETHOD(device_resume, openpic_resume),
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/* PIC interface */
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DEVMETHOD(pic_bind, openpic_bind),
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DEVMETHOD(pic_config, openpic_config),
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DEVMETHOD(pic_dispatch, openpic_dispatch),
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DEVMETHOD(pic_enable, openpic_enable),
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DEVMETHOD(pic_eoi, openpic_eoi),
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DEVMETHOD(pic_ipi, openpic_ipi),
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DEVMETHOD(pic_mask, openpic_mask),
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DEVMETHOD(pic_unmask, openpic_unmask),
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DEVMETHOD(pic_translate_code, openpic_ofw_translate_code),
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DEVMETHOD_END
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};
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static driver_t openpic_ofw_driver = {
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"openpic",
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openpic_ofw_methods,
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sizeof(struct openpic_softc),
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};
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EARLY_DRIVER_MODULE(openpic, ofwbus, openpic_ofw_driver, openpic_devclass,
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0, 0, BUS_PASS_INTERRUPT);
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EARLY_DRIVER_MODULE(openpic, simplebus, openpic_ofw_driver, openpic_devclass,
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0, 0, BUS_PASS_INTERRUPT);
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EARLY_DRIVER_MODULE(openpic, macio, openpic_ofw_driver, openpic_devclass, 0, 0,
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BUS_PASS_INTERRUPT);
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static int
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openpic_ofw_probe(device_t dev)
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{
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const char *type = ofw_bus_get_type(dev);
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if (type == NULL)
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "chrp,open-pic") &&
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strcmp(type, "open-pic") != 0)
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return (ENXIO);
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/*
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* On some U4 systems, there is a phantom MPIC in the mac-io cell.
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* The uninorth driver will pick up the real PIC, so ignore it here.
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*/
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if (OF_finddevice("/u4") != (phandle_t)-1)
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return (ENXIO);
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device_set_desc(dev, OPENPIC_DEVSTR);
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return (0);
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}
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static int
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openpic_ofw_attach(device_t dev)
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{
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struct openpic_softc *sc;
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phandle_t xref, node;
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node = ofw_bus_get_node(dev);
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sc = device_get_softc(dev);
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if (OF_getencprop(node, "phandle", &xref, sizeof(xref)) == -1 &&
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OF_getencprop(node, "ibm,phandle", &xref, sizeof(xref)) == -1 &&
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OF_getencprop(node, "linux,phandle", &xref, sizeof(xref)) == -1)
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xref = node;
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if (ofw_bus_is_compatible(dev, "fsl,mpic")) {
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sc->sc_quirks = OPENPIC_QUIRK_SINGLE_BIND;
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sc->sc_quirks |= OPENPIC_QUIRK_HIDDEN_IRQS;
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}
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return (openpic_common_attach(dev, xref));
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}
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static void
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openpic_ofw_translate_code(device_t dev, u_int irq, int code,
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enum intr_trigger *trig, enum intr_polarity *pol)
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{
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switch (code) {
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case 0:
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/* L to H edge */
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*trig = INTR_TRIGGER_EDGE;
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*pol = INTR_POLARITY_HIGH;
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break;
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case 1:
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/* Active L level */
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*trig = INTR_TRIGGER_LEVEL;
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*pol = INTR_POLARITY_LOW;
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break;
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case 2:
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/* Active H level */
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*trig = INTR_TRIGGER_LEVEL;
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*pol = INTR_POLARITY_HIGH;
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break;
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case 3:
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/* H to L edge */
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*trig = INTR_TRIGGER_EDGE;
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*pol = INTR_POLARITY_LOW;
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break;
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default:
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*trig = INTR_TRIGGER_CONFORM;
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*pol = INTR_POLARITY_CONFORM;
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}
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}
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