75193d5283
whole KVA space using one locked 4MB dTLB entry per GB of physical memory. On Cheetah-class machines only the dt16 can hold locked entries though, which would be completely consumed for the kernel TSB on machines with >= 16GB. Therefore limit the KVA space to use no more than half of the lockable dTLB slots, given that we need them also for other things. - Add sanity checks which ensure that we don't exhaust the (lockable) TLB slots.
151 lines
5.4 KiB
C
151 lines
5.4 KiB
C
/*-
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* Copyright (c) 2001 Jake Burkholder.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_TLB_H_
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#define _MACHINE_TLB_H_
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#define TLB_DIRECT_ADDRESS_BITS (43)
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#define TLB_DIRECT_PAGE_BITS (PAGE_SHIFT_4M)
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#define TLB_DIRECT_ADDRESS_MASK ((1UL << TLB_DIRECT_ADDRESS_BITS) - 1)
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#define TLB_DIRECT_PAGE_MASK ((1UL << TLB_DIRECT_PAGE_BITS) - 1)
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#define TLB_PHYS_TO_DIRECT(pa) \
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((pa) | VM_MIN_DIRECT_ADDRESS)
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#define TLB_DIRECT_TO_PHYS(va) \
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((va) & TLB_DIRECT_ADDRESS_MASK)
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#define TLB_DIRECT_TO_TTE_MASK \
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(TD_V | TD_4M | (TLB_DIRECT_ADDRESS_MASK - TLB_DIRECT_PAGE_MASK))
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#define TLB_DAR_SLOT_SHIFT (3)
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#define TLB_DAR_SLOT(slot) ((slot) << TLB_DAR_SLOT_SHIFT)
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#define TAR_VPN_SHIFT (13)
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#define TAR_CTX_MASK ((1 << TAR_VPN_SHIFT) - 1)
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#define TLB_TAR_VA(va) ((va) & ~TAR_CTX_MASK)
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#define TLB_TAR_CTX(ctx) ((ctx) & TAR_CTX_MASK)
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#define TLB_CXR_CTX_BITS (13)
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#define TLB_CXR_CTX_MASK \
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(((1UL << TLB_CXR_CTX_BITS) - 1) << TLB_CXR_CTX_SHIFT)
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#define TLB_CXR_CTX_SHIFT (0)
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#define TLB_CXR_PGSZ_BITS (3)
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#define TLB_PCXR_PGSZ_MASK \
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((((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_N_PGSZ0_SHIFT) | \
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(((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_N_PGSZ1_SHIFT) | \
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(((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_P_PGSZ0_SHIFT) | \
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(((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_PCXR_P_PGSZ1_SHIFT))
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#define TLB_PCXR_N_PGSZ0_SHIFT (61)
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#define TLB_PCXR_N_PGSZ1_SHIFT (58)
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#define TLB_PCXR_P_PGSZ0_SHIFT (16)
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#define TLB_PCXR_P_PGSZ1_SHIFT (19)
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#define TLB_SCXR_PGSZ_MASK \
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((((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_SCXR_S_PGSZ0_SHIFT) | \
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(((1UL << TLB_CXR_PGSZ_BITS) - 1) << TLB_SCXR_S_PGSZ1_SHIFT))
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#define TLB_SCXR_S_PGSZ1_SHIFT (19)
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#define TLB_SCXR_S_PGSZ0_SHIFT (16)
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#define TLB_TAE_PGSZ_BITS (3)
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#define TLB_TAE_PGSZ0_MASK \
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(((1UL << TLB_TAE_PGSZ_BITS) - 1) << TLB_TAE_PGSZ0_SHIFT)
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#define TLB_TAE_PGSZ1_MASK \
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(((1UL << TLB_TAE_PGSZ_BITS) - 1) << TLB_TAE_PGSZ1_SHIFT)
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#define TLB_TAE_PGSZ0_SHIFT (16)
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#define TLB_TAE_PGSZ1_SHIFT (19)
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#define TLB_DEMAP_ID_SHIFT (4)
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#define TLB_DEMAP_ID_PRIMARY (0)
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#define TLB_DEMAP_ID_SECONDARY (1)
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#define TLB_DEMAP_ID_NUCLEUS (2)
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#define TLB_DEMAP_TYPE_SHIFT (6)
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#define TLB_DEMAP_TYPE_PAGE (0)
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#define TLB_DEMAP_TYPE_CONTEXT (1)
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#define TLB_DEMAP_TYPE_ALL (2) /* USIII and beyond only */
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#define TLB_DEMAP_VA(va) ((va) & ~PAGE_MASK)
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#define TLB_DEMAP_ID(id) ((id) << TLB_DEMAP_ID_SHIFT)
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#define TLB_DEMAP_TYPE(type) ((type) << TLB_DEMAP_TYPE_SHIFT)
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#define TLB_DEMAP_PAGE (TLB_DEMAP_TYPE(TLB_DEMAP_TYPE_PAGE))
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#define TLB_DEMAP_CONTEXT (TLB_DEMAP_TYPE(TLB_DEMAP_TYPE_CONTEXT))
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#define TLB_DEMAP_ALL (TLB_DEMAP_TYPE(TLB_DEMAP_TYPE_ALL))
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#define TLB_DEMAP_PRIMARY (TLB_DEMAP_ID(TLB_DEMAP_ID_PRIMARY))
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#define TLB_DEMAP_SECONDARY (TLB_DEMAP_ID(TLB_DEMAP_ID_SECONDARY))
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#define TLB_DEMAP_NUCLEUS (TLB_DEMAP_ID(TLB_DEMAP_ID_NUCLEUS))
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#define TLB_CTX_KERNEL (0)
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#define TLB_CTX_USER_MIN (1)
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#define TLB_CTX_USER_MAX (8192)
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#define MMU_SFSR_ASI_SHIFT (16)
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#define MMU_SFSR_FT_SHIFT (7)
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#define MMU_SFSR_E_SHIFT (6)
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#define MMU_SFSR_CT_SHIFT (4)
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#define MMU_SFSR_PR_SHIFT (3)
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#define MMU_SFSR_W_SHIFT (2)
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#define MMU_SFSR_OW_SHIFT (1)
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#define MMU_SFSR_FV_SHIFT (0)
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#define MMU_SFSR_ASI_SIZE (8)
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#define MMU_SFSR_FT_SIZE (6)
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#define MMU_SFSR_CT_SIZE (2)
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#define MMU_SFSR_GET_ASI(sfsr) \
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(((sfsr) >> MMU_SFSR_ASI_SHIFT) & ((1UL << MMU_SFSR_ASI_SIZE) - 1))
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#define MMU_SFSR_W (1UL << MMU_SFSR_W_SHIFT)
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#define MMU_SFSR_FV (1UL << MMU_SFSR_FV_SHIFT)
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typedef void tlb_flush_nonlocked_t(void);
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typedef void tlb_flush_user_t(void);
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struct pmap;
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struct tlb_entry;
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extern int dtlb_slots;
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extern int itlb_slots;
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extern int kernel_tlb_slots;
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extern struct tlb_entry *kernel_tlbs;
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void tlb_context_demap(struct pmap *pm);
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void tlb_page_demap(struct pmap *pm, vm_offset_t va);
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void tlb_range_demap(struct pmap *pm, vm_offset_t start, vm_offset_t end);
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tlb_flush_nonlocked_t cheetah_tlb_flush_nonlocked;
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tlb_flush_user_t cheetah_tlb_flush_user;
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tlb_flush_nonlocked_t spitfire_tlb_flush_nonlocked;
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tlb_flush_user_t spitfire_tlb_flush_user;
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extern tlb_flush_nonlocked_t *tlb_flush_nonlocked;
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extern tlb_flush_user_t *tlb_flush_user;
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#endif /* !_MACHINE_TLB_H_ */
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