0b5ac7b6b9
SMP support for PowerPC G5 systems. r198724: Fix a race in casuword() exposed by csup. casuword() non-atomically read the current value of its argument before atomically replacing it, which could occasionally return the wrong value on an SMP system. This resulted in user mutex operations hanging when using threaded applications. r198723,198725,198731: Loop on blocked threads when using ULE scheduler, removing an XXX MP comment. r198427: Add some more paranoia to setting HID registers, and update the AIM clock routines to work better with SMP. r198378: Add SMP support on U3-based G5 systems. While here, correct the 64-bit tlbie function to set the CPU to 64-bit mode correctly. r198212: Don't assume that physical addresses are identity mapped. This allows the second processor on G5 systems to start.
260 lines
6.0 KiB
C
260 lines
6.0 KiB
C
/*-
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* Copyright (c) 2008 Marcel Moolenaar
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* Copyright (c) 2009 Nathan Whitehorn
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/pcpu.h>
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#include <sys/proc.h>
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#include <sys/smp.h>
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/hid.h>
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#include <machine/platformvar.h>
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#include <machine/pmap.h>
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#include <machine/smp.h>
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#include <machine/spr.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/ofw_machdep.h>
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#include "platform_if.h"
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#ifdef SMP
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extern void *ap_pcpu;
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#endif
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static int chrp_probe(platform_t);
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void chrp_mem_regions(platform_t, struct mem_region **phys, int *physsz,
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struct mem_region **avail, int *availsz);
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static u_long chrp_timebase_freq(platform_t, struct cpuref *cpuref);
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static int chrp_smp_first_cpu(platform_t, struct cpuref *cpuref);
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static int chrp_smp_next_cpu(platform_t, struct cpuref *cpuref);
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static int chrp_smp_get_bsp(platform_t, struct cpuref *cpuref);
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static int chrp_smp_start_cpu(platform_t, struct pcpu *cpu);
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static platform_method_t chrp_methods[] = {
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PLATFORMMETHOD(platform_probe, chrp_probe),
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PLATFORMMETHOD(platform_mem_regions, chrp_mem_regions),
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PLATFORMMETHOD(platform_timebase_freq, chrp_timebase_freq),
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PLATFORMMETHOD(platform_smp_first_cpu, chrp_smp_first_cpu),
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PLATFORMMETHOD(platform_smp_next_cpu, chrp_smp_next_cpu),
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PLATFORMMETHOD(platform_smp_get_bsp, chrp_smp_get_bsp),
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PLATFORMMETHOD(platform_smp_start_cpu, chrp_smp_start_cpu),
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{ 0, 0 }
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};
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static platform_def_t chrp_platform = {
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"chrp",
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chrp_methods,
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0
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};
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PLATFORM_DEF(chrp_platform);
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static int
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chrp_probe(platform_t plat)
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{
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if (OF_finddevice("/memory") != -1)
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return (BUS_PROBE_GENERIC);
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return (ENXIO);
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}
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void
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chrp_mem_regions(platform_t plat, struct mem_region **phys, int *physsz,
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struct mem_region **avail, int *availsz)
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{
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ofw_mem_regions(phys,physsz,avail,availsz);
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}
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static u_long
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chrp_timebase_freq(platform_t plat, struct cpuref *cpuref)
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{
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phandle_t phandle;
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long ticks = -1;
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phandle = cpuref->cr_hwref;
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OF_getprop(phandle, "timebase-frequency", &ticks, sizeof(ticks));
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if (ticks <= 0)
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panic("Unable to determine timebase frequency!");
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return (ticks);
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}
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static int
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chrp_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu)
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{
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int cpuid, res;
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cpuref->cr_hwref = cpu;
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res = OF_getprop(cpu, "reg", &cpuid, sizeof(cpuid));
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/*
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* psim doesn't have a reg property, so assume 0 as for the
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* uniprocessor case in the CHRP spec.
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*/
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if (res < 0) {
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cpuid = 0;
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}
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cpuref->cr_cpuid = cpuid & 0xff;
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return (0);
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}
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static int
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chrp_smp_first_cpu(platform_t plat, struct cpuref *cpuref)
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{
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char buf[8];
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phandle_t cpu, dev, root;
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int res;
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root = OF_peer(0);
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dev = OF_child(root);
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while (dev != 0) {
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res = OF_getprop(dev, "name", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "cpus") == 0)
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break;
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dev = OF_peer(dev);
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}
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if (dev == 0) {
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/*
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* psim doesn't have a name property on the /cpus node,
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* but it can be found directly
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*/
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dev = OF_finddevice("/cpus");
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if (dev == 0)
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return (ENOENT);
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}
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cpu = OF_child(dev);
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while (cpu != 0) {
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res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "cpu") == 0)
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break;
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cpu = OF_peer(cpu);
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}
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if (cpu == 0)
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return (ENOENT);
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return (chrp_smp_fill_cpuref(cpuref, cpu));
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}
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static int
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chrp_smp_next_cpu(platform_t plat, struct cpuref *cpuref)
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{
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char buf[8];
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phandle_t cpu;
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int res;
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cpu = OF_peer(cpuref->cr_hwref);
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while (cpu != 0) {
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res = OF_getprop(cpu, "device_type", buf, sizeof(buf));
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if (res > 0 && strcmp(buf, "cpu") == 0)
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break;
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cpu = OF_peer(cpu);
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}
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if (cpu == 0)
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return (ENOENT);
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return (chrp_smp_fill_cpuref(cpuref, cpu));
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}
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static int
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chrp_smp_get_bsp(platform_t plat, struct cpuref *cpuref)
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{
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ihandle_t inst;
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phandle_t bsp, chosen;
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int res;
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chosen = OF_finddevice("/chosen");
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if (chosen == 0)
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return (ENXIO);
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res = OF_getprop(chosen, "cpu", &inst, sizeof(inst));
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if (res < 0)
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return (ENXIO);
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bsp = OF_instance_to_package(inst);
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return (chrp_smp_fill_cpuref(cpuref, bsp));
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}
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static int
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chrp_smp_start_cpu(platform_t plat, struct pcpu *pc)
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{
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#ifdef SMP
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phandle_t cpu;
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volatile uint8_t *rstvec;
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static volatile uint8_t *rstvec_virtbase = NULL;
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int res, reset, timeout;
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cpu = pc->pc_hwref;
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res = OF_getprop(cpu, "soft-reset", &reset, sizeof(reset));
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if (res < 0)
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return (ENXIO);
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ap_pcpu = pc;
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if (rstvec_virtbase == NULL)
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rstvec_virtbase = pmap_mapdev(0x80000000, PAGE_SIZE);
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rstvec = rstvec_virtbase + reset;
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*rstvec = 4;
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(void)(*rstvec);
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powerpc_sync();
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DELAY(1);
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*rstvec = 0;
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(void)(*rstvec);
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powerpc_sync();
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timeout = 10000;
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while (!pc->pc_awake && timeout--)
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DELAY(100);
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return ((pc->pc_awake) ? 0 : EBUSY);
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#else
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/* No SMP support */
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return (ENXIO);
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#endif
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}
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