6414b02d0c
conditionally compile the code. Reviewed by: andrew Sponsored by: DARPA, AFRL Differential Revision: https://reviews.freebsd.org/D9836
177 lines
4.6 KiB
C
177 lines
4.6 KiB
C
/*-
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* Copyright (c) 2014-2017 Ruslan Bukin <br@bsdpad.com>
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* All rights reserved.
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*
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* This software was developed by SRI International and the University of
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* Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
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* ("CTSRD"), as part of the DARPA CRASH research programme.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/devmap.h>
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#include <vm/vm.h>
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#include <dev/ofw/openfirm.h>
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#include <machine/armreg.h>
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#include <machine/bus.h>
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#include <machine/fdt.h>
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#include <machine/machdep.h>
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#include <machine/platform.h>
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#include <machine/platformvar.h>
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#include <arm/altera/socfpga/socfpga_mp.h>
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#include <arm/altera/socfpga/socfpga_rstmgr.h>
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#include "platform_if.h"
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#if defined(SOC_ALTERA_CYCLONE5)
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static int
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socfpga_devmap_init(platform_t plat)
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{
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/* UART */
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devmap_add_entry(0xffc00000, 0x100000);
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/*
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* USB OTG
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*
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* We use static device map for USB due to some bug in the Altera
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* which throws Translation Fault (P) exception on high load.
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* It might be caused due to some power save options being turned
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* on or something else.
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*/
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devmap_add_entry(0xffb00000, 0x100000);
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/* dwmmc */
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devmap_add_entry(0xff700000, 0x100000);
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/* scu */
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devmap_add_entry(0xfff00000, 0x100000);
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/* FPGA memory window, 256MB */
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devmap_add_entry(0xd0000000, 0x10000000);
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return (0);
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}
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#endif
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#if defined(SOC_ALTERA_ARRIA10)
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static int
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socfpga_a10_devmap_init(platform_t plat)
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{
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/* UART */
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devmap_add_entry(0xffc00000, 0x100000);
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/* USB OTG */
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devmap_add_entry(0xffb00000, 0x100000);
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/* dwmmc */
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devmap_add_entry(0xff800000, 0x100000);
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/* scu */
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devmap_add_entry(0xfff00000, 0x100000);
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return (0);
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}
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#endif
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static void
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_socfpga_cpu_reset(bus_size_t reg)
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{
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uint32_t paddr;
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bus_addr_t vaddr;
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phandle_t node;
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if (rstmgr_warmreset(reg) == 0)
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goto end;
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node = OF_finddevice("/soc/rstmgr");
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if (node == -1)
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goto end;
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if ((OF_getencprop(node, "reg", &paddr, sizeof(paddr))) > 0) {
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if (bus_space_map(fdtbus_bs_tag, paddr, 0x8, 0, &vaddr) == 0) {
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bus_space_write_4(fdtbus_bs_tag, vaddr,
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reg, CTRL_SWWARMRSTREQ);
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}
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}
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end:
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while (1);
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}
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#if defined(SOC_ALTERA_CYCLONE5)
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static void
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socfpga_cpu_reset(platform_t plat)
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{
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_socfpga_cpu_reset(RSTMGR_CTRL);
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}
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#endif
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#if defined(SOC_ALTERA_ARRIA10)
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static void
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socfpga_a10_cpu_reset(platform_t plat)
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{
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_socfpga_cpu_reset(RSTMGR_A10_CTRL);
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}
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#endif
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#if defined(SOC_ALTERA_CYCLONE5)
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static platform_method_t socfpga_methods[] = {
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PLATFORMMETHOD(platform_devmap_init, socfpga_devmap_init),
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PLATFORMMETHOD(platform_cpu_reset, socfpga_cpu_reset),
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#ifdef SMP
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PLATFORMMETHOD(platform_mp_setmaxid, socfpga_mp_setmaxid),
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PLATFORMMETHOD(platform_mp_start_ap, socfpga_mp_start_ap),
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#endif
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PLATFORMMETHOD_END,
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};
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FDT_PLATFORM_DEF(socfpga, "socfpga", 0, "altr,socfpga-cyclone5", 200);
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#endif
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#if defined(SOC_ALTERA_ARRIA10)
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static platform_method_t socfpga_a10_methods[] = {
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PLATFORMMETHOD(platform_devmap_init, socfpga_a10_devmap_init),
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PLATFORMMETHOD(platform_cpu_reset, socfpga_a10_cpu_reset),
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#ifdef SMP
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PLATFORMMETHOD(platform_mp_setmaxid, socfpga_mp_setmaxid),
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PLATFORMMETHOD(platform_mp_start_ap, socfpga_a10_mp_start_ap),
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#endif
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PLATFORMMETHOD_END,
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};
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FDT_PLATFORM_DEF(socfpga_a10, "socfpga", 0, "altr,socfpga-arria10", 200);
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#endif
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