534ccd7bbf
Summary: The idea behind this is '~0ul' is well-defined, and casting to uintmax_t, on a 32-bit platform, will leave the upper 32 bits as 0. The maximum range of a resource is 0xFFF.... (all bits of the full type set). By dropping the 'ul' suffix, C type promotion rules apply, and the sign extension of ~0 on 32 bit platforms gets it to a type-independent 'unsigned max'. Reviewed By: cem Sponsored by: Alex Perez/Inertial Computing Differential Revision: https://reviews.freebsd.org/D5255
645 lines
16 KiB
C
645 lines
16 KiB
C
/*-
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* Copyright (c) 2005 John Baldwin <jhb@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* Simple driver for PCI VGA display devices. Drivers such as agp(4) and
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* drm(4) should attach as children of this device.
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*
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* XXX: The vgapci name is a hack until we somehow merge the isa vga driver
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* in or rename it.
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*/
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/systm.h>
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#if defined(__amd64__) || defined(__i386__)
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#include <vm/vm.h>
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#include <vm/pmap.h>
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#endif
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <compat/x86bios/x86bios.h> /* To re-POST the card. */
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struct vga_resource {
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struct resource *vr_res;
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int vr_refs;
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};
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struct vga_pci_softc {
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device_t vga_msi_child; /* Child driver using MSI. */
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struct vga_resource vga_bars[PCIR_MAX_BAR_0 + 1];
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struct vga_resource vga_bios;
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};
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SYSCTL_DECL(_hw_pci);
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static struct vga_resource *lookup_res(struct vga_pci_softc *sc, int rid);
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static struct resource *vga_pci_alloc_resource(device_t dev, device_t child,
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int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
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u_int flags);
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static int vga_pci_release_resource(device_t dev, device_t child, int type,
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int rid, struct resource *r);
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int vga_pci_default_unit = -1;
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SYSCTL_INT(_hw_pci, OID_AUTO, default_vgapci_unit, CTLFLAG_RDTUN,
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&vga_pci_default_unit, -1, "Default VGA-compatible display");
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int
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vga_pci_is_boot_display(device_t dev)
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{
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int unit;
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device_t pcib;
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uint16_t config;
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/* Check that the given device is a video card */
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if ((pci_get_class(dev) != PCIC_DISPLAY &&
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(pci_get_class(dev) != PCIC_OLD ||
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pci_get_subclass(dev) != PCIS_OLD_VGA)))
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return (0);
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unit = device_get_unit(dev);
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if (vga_pci_default_unit >= 0) {
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/*
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* The boot display device was determined by a previous
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* call to this function, or the user forced it using
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* the hw.pci.default_vgapci_unit tunable.
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*/
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return (vga_pci_default_unit == unit);
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}
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/*
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* The primary video card used as a boot display must have the
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* "I/O" and "Memory Address Space Decoding" bits set in its
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* Command register.
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*
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* Furthermore, if the card is attached to a bridge, instead of
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* the root PCI bus, the bridge must have the "VGA Enable" bit
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* set in its Control register.
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*/
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pcib = device_get_parent(device_get_parent(dev));
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if (device_get_devclass(device_get_parent(pcib)) ==
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devclass_find("pci")) {
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/*
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* The parent bridge is a PCI-to-PCI bridge: check the
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* value of the "VGA Enable" bit.
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*/
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config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2);
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if ((config & PCIB_BCR_VGA_ENABLE) == 0)
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return (0);
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}
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config = pci_read_config(dev, PCIR_COMMAND, 2);
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if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0)
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return (0);
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/*
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* Disable interrupts until a chipset driver is loaded for
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* this PCI device. Else unhandled display adapter interrupts
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* might freeze the CPU.
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*/
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pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2);
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/* This video card is the boot display: record its unit number. */
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vga_pci_default_unit = unit;
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device_set_flags(dev, 1);
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return (1);
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}
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void *
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vga_pci_map_bios(device_t dev, size_t *size)
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{
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int rid;
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struct resource *res;
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#if defined(__amd64__) || defined(__i386__)
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if (vga_pci_is_boot_display(dev)) {
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/*
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* On x86, the System BIOS copy the default display
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* device's Video BIOS at a fixed location in system
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* memory (0xC0000, 128 kBytes long) at boot time.
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*
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* We use this copy for the default boot device, because
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* the original ROM may not be valid after boot.
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*/
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*size = VGA_PCI_BIOS_SHADOW_SIZE;
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return (pmap_mapbios(VGA_PCI_BIOS_SHADOW_ADDR, *size));
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}
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#endif
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rid = PCIR_BIOS;
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res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0,
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~0, 1, RF_ACTIVE);
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if (res == NULL) {
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return (NULL);
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}
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*size = rman_get_size(res);
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return (rman_get_virtual(res));
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}
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void
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vga_pci_unmap_bios(device_t dev, void *bios)
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{
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struct vga_resource *vr;
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if (bios == NULL) {
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return;
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}
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#if defined(__amd64__) || defined(__i386__)
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if (vga_pci_is_boot_display(dev)) {
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/* We mapped the BIOS shadow copy located at 0xC0000. */
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pmap_unmapdev((vm_offset_t)bios, VGA_PCI_BIOS_SHADOW_SIZE);
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return;
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}
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#endif
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/*
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* Look up the PCIR_BIOS resource in our softc. It should match
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* the address we returned previously.
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*/
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vr = lookup_res(device_get_softc(dev), PCIR_BIOS);
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KASSERT(vr->vr_res != NULL, ("vga_pci_unmap_bios: bios not mapped"));
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KASSERT(rman_get_virtual(vr->vr_res) == bios,
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("vga_pci_unmap_bios: mismatch"));
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vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, PCIR_BIOS,
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vr->vr_res);
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}
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int
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vga_pci_repost(device_t dev)
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{
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#if defined(__amd64__) || (defined(__i386__) && !defined(PC98))
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x86regs_t regs;
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if (!vga_pci_is_boot_display(dev))
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return (EINVAL);
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if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL)
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return (ENOTSUP);
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x86bios_init_regs(®s);
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regs.R_AH = pci_get_bus(dev);
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regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07);
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regs.R_DL = 0x80;
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device_printf(dev, "REPOSTing\n");
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x86bios_call(®s, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3),
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X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3));
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x86bios_get_intr(0x10);
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return (0);
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#else
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return (ENOTSUP);
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#endif
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}
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static int
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vga_pci_probe(device_t dev)
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{
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switch (pci_get_class(dev)) {
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case PCIC_DISPLAY:
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break;
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case PCIC_OLD:
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if (pci_get_subclass(dev) != PCIS_OLD_VGA)
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return (ENXIO);
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break;
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default:
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return (ENXIO);
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}
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/* Probe default display. */
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vga_pci_is_boot_display(dev);
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device_set_desc(dev, "VGA-compatible display");
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return (BUS_PROBE_GENERIC);
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}
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static int
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vga_pci_attach(device_t dev)
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{
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bus_generic_probe(dev);
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/* Always create a drm child for now to make it easier on drm. */
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device_add_child(dev, "drm", -1);
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device_add_child(dev, "drmn", -1);
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bus_generic_attach(dev);
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if (vga_pci_is_boot_display(dev))
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device_printf(dev, "Boot video device\n");
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return (0);
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}
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static int
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vga_pci_suspend(device_t dev)
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{
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return (bus_generic_suspend(dev));
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}
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static int
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vga_pci_resume(device_t dev)
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{
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return (bus_generic_resume(dev));
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}
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/* Bus interface. */
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static int
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vga_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
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{
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return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
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}
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static int
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vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
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{
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return (EINVAL);
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}
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static int
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vga_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
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int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg,
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void **cookiep)
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{
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return (BUS_SETUP_INTR(device_get_parent(dev), dev, irq, flags,
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filter, intr, arg, cookiep));
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}
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static int
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vga_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
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void *cookie)
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{
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return (BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie));
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}
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static struct vga_resource *
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lookup_res(struct vga_pci_softc *sc, int rid)
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{
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int bar;
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if (rid == PCIR_BIOS)
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return (&sc->vga_bios);
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bar = PCI_RID2BAR(rid);
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if (bar >= 0 && bar <= PCIR_MAX_BAR_0)
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return (&sc->vga_bars[bar]);
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return (NULL);
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}
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static struct resource *
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vga_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
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rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
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{
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struct vga_resource *vr;
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switch (type) {
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case SYS_RES_MEMORY:
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case SYS_RES_IOPORT:
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/*
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* For BARs, we cache the resource so that we only allocate it
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* from the PCI bus once.
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*/
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vr = lookup_res(device_get_softc(dev), *rid);
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if (vr == NULL)
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return (NULL);
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if (vr->vr_res == NULL)
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vr->vr_res = bus_alloc_resource(dev, type, rid, start,
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end, count, flags);
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if (vr->vr_res != NULL)
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vr->vr_refs++;
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return (vr->vr_res);
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}
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return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
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}
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static int
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vga_pci_release_resource(device_t dev, device_t child, int type, int rid,
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struct resource *r)
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{
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struct vga_resource *vr;
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int error;
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switch (type) {
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case SYS_RES_MEMORY:
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case SYS_RES_IOPORT:
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/*
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* For BARs, we release the resource from the PCI bus
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* when the last child reference goes away.
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*/
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vr = lookup_res(device_get_softc(dev), rid);
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if (vr == NULL)
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return (EINVAL);
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if (vr->vr_res == NULL)
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return (EINVAL);
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KASSERT(vr->vr_res == r, ("vga_pci resource mismatch"));
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if (vr->vr_refs > 1) {
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vr->vr_refs--;
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return (0);
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}
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KASSERT(vr->vr_refs > 0,
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("vga_pci resource reference count underflow"));
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error = bus_release_resource(dev, type, rid, r);
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if (error == 0) {
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vr->vr_res = NULL;
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vr->vr_refs = 0;
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}
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return (error);
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}
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return (bus_release_resource(dev, type, rid, r));
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}
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/* PCI interface. */
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static uint32_t
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vga_pci_read_config(device_t dev, device_t child, int reg, int width)
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{
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return (pci_read_config(dev, reg, width));
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}
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static void
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vga_pci_write_config(device_t dev, device_t child, int reg,
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uint32_t val, int width)
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{
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pci_write_config(dev, reg, val, width);
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}
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static int
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vga_pci_enable_busmaster(device_t dev, device_t child)
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{
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return (pci_enable_busmaster(dev));
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}
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static int
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vga_pci_disable_busmaster(device_t dev, device_t child)
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{
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return (pci_disable_busmaster(dev));
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}
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static int
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vga_pci_enable_io(device_t dev, device_t child, int space)
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{
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device_printf(dev, "child %s requested pci_enable_io\n",
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device_get_nameunit(child));
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return (pci_enable_io(dev, space));
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}
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static int
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vga_pci_disable_io(device_t dev, device_t child, int space)
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{
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device_printf(dev, "child %s requested pci_disable_io\n",
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device_get_nameunit(child));
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return (pci_disable_io(dev, space));
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}
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static int
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vga_pci_get_vpd_ident(device_t dev, device_t child, const char **identptr)
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{
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return (pci_get_vpd_ident(dev, identptr));
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}
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static int
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vga_pci_get_vpd_readonly(device_t dev, device_t child, const char *kw,
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const char **vptr)
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{
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return (pci_get_vpd_readonly(dev, kw, vptr));
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}
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static int
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vga_pci_set_powerstate(device_t dev, device_t child, int state)
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{
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device_printf(dev, "child %s requested pci_set_powerstate\n",
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device_get_nameunit(child));
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return (pci_set_powerstate(dev, state));
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}
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static int
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vga_pci_get_powerstate(device_t dev, device_t child)
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{
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device_printf(dev, "child %s requested pci_get_powerstate\n",
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device_get_nameunit(child));
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return (pci_get_powerstate(dev));
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}
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static int
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vga_pci_assign_interrupt(device_t dev, device_t child)
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{
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device_printf(dev, "child %s requested pci_assign_interrupt\n",
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device_get_nameunit(child));
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return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
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}
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static int
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vga_pci_find_cap(device_t dev, device_t child, int capability,
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int *capreg)
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{
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return (pci_find_cap(dev, capability, capreg));
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}
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static int
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vga_pci_find_extcap(device_t dev, device_t child, int capability,
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int *capreg)
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{
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return (pci_find_extcap(dev, capability, capreg));
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}
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static int
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vga_pci_find_htcap(device_t dev, device_t child, int capability,
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int *capreg)
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{
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return (pci_find_htcap(dev, capability, capreg));
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}
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static int
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vga_pci_alloc_msi(device_t dev, device_t child, int *count)
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{
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struct vga_pci_softc *sc;
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int error;
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sc = device_get_softc(dev);
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if (sc->vga_msi_child != NULL)
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return (EBUSY);
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error = pci_alloc_msi(dev, count);
|
|
if (error == 0)
|
|
sc->vga_msi_child = child;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
vga_pci_alloc_msix(device_t dev, device_t child, int *count)
|
|
{
|
|
struct vga_pci_softc *sc;
|
|
int error;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (sc->vga_msi_child != NULL)
|
|
return (EBUSY);
|
|
error = pci_alloc_msix(dev, count);
|
|
if (error == 0)
|
|
sc->vga_msi_child = child;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
vga_pci_remap_msix(device_t dev, device_t child, int count,
|
|
const u_int *vectors)
|
|
{
|
|
struct vga_pci_softc *sc;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (sc->vga_msi_child != child)
|
|
return (ENXIO);
|
|
return (pci_remap_msix(dev, count, vectors));
|
|
}
|
|
|
|
static int
|
|
vga_pci_release_msi(device_t dev, device_t child)
|
|
{
|
|
struct vga_pci_softc *sc;
|
|
int error;
|
|
|
|
sc = device_get_softc(dev);
|
|
if (sc->vga_msi_child != child)
|
|
return (ENXIO);
|
|
error = pci_release_msi(dev);
|
|
if (error == 0)
|
|
sc->vga_msi_child = NULL;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
vga_pci_msi_count(device_t dev, device_t child)
|
|
{
|
|
|
|
return (pci_msi_count(dev));
|
|
}
|
|
|
|
static int
|
|
vga_pci_msix_count(device_t dev, device_t child)
|
|
{
|
|
|
|
return (pci_msix_count(dev));
|
|
}
|
|
|
|
static bus_dma_tag_t
|
|
vga_pci_get_dma_tag(device_t bus, device_t child)
|
|
{
|
|
|
|
return (bus_get_dma_tag(bus));
|
|
}
|
|
|
|
static device_method_t vga_pci_methods[] = {
|
|
/* Device interface */
|
|
DEVMETHOD(device_probe, vga_pci_probe),
|
|
DEVMETHOD(device_attach, vga_pci_attach),
|
|
DEVMETHOD(device_shutdown, bus_generic_shutdown),
|
|
DEVMETHOD(device_suspend, vga_pci_suspend),
|
|
DEVMETHOD(device_resume, vga_pci_resume),
|
|
|
|
/* Bus interface */
|
|
DEVMETHOD(bus_read_ivar, vga_pci_read_ivar),
|
|
DEVMETHOD(bus_write_ivar, vga_pci_write_ivar),
|
|
DEVMETHOD(bus_setup_intr, vga_pci_setup_intr),
|
|
DEVMETHOD(bus_teardown_intr, vga_pci_teardown_intr),
|
|
DEVMETHOD(bus_alloc_resource, vga_pci_alloc_resource),
|
|
DEVMETHOD(bus_release_resource, vga_pci_release_resource),
|
|
DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
|
|
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
|
|
DEVMETHOD(bus_get_dma_tag, vga_pci_get_dma_tag),
|
|
|
|
/* PCI interface */
|
|
DEVMETHOD(pci_read_config, vga_pci_read_config),
|
|
DEVMETHOD(pci_write_config, vga_pci_write_config),
|
|
DEVMETHOD(pci_enable_busmaster, vga_pci_enable_busmaster),
|
|
DEVMETHOD(pci_disable_busmaster, vga_pci_disable_busmaster),
|
|
DEVMETHOD(pci_enable_io, vga_pci_enable_io),
|
|
DEVMETHOD(pci_disable_io, vga_pci_disable_io),
|
|
DEVMETHOD(pci_get_vpd_ident, vga_pci_get_vpd_ident),
|
|
DEVMETHOD(pci_get_vpd_readonly, vga_pci_get_vpd_readonly),
|
|
DEVMETHOD(pci_get_powerstate, vga_pci_get_powerstate),
|
|
DEVMETHOD(pci_set_powerstate, vga_pci_set_powerstate),
|
|
DEVMETHOD(pci_assign_interrupt, vga_pci_assign_interrupt),
|
|
DEVMETHOD(pci_find_cap, vga_pci_find_cap),
|
|
DEVMETHOD(pci_find_extcap, vga_pci_find_extcap),
|
|
DEVMETHOD(pci_find_htcap, vga_pci_find_htcap),
|
|
DEVMETHOD(pci_alloc_msi, vga_pci_alloc_msi),
|
|
DEVMETHOD(pci_alloc_msix, vga_pci_alloc_msix),
|
|
DEVMETHOD(pci_remap_msix, vga_pci_remap_msix),
|
|
DEVMETHOD(pci_release_msi, vga_pci_release_msi),
|
|
DEVMETHOD(pci_msi_count, vga_pci_msi_count),
|
|
DEVMETHOD(pci_msix_count, vga_pci_msix_count),
|
|
|
|
{ 0, 0 }
|
|
};
|
|
|
|
static driver_t vga_pci_driver = {
|
|
"vgapci",
|
|
vga_pci_methods,
|
|
sizeof(struct vga_pci_softc),
|
|
};
|
|
|
|
static devclass_t vga_devclass;
|
|
|
|
DRIVER_MODULE(vgapci, pci, vga_pci_driver, vga_devclass, 0, 0);
|
|
MODULE_DEPEND(vgapci, x86bios, 1, 1, 1);
|