Adrian Chadd 87af896340 mips: use the correct va for wbinv flushing. ... arge doesn't trigger this, but ath(4) does. Tested: * AR9331 SoC (Carambola2); ath(4) hostap Submitted by: ian		2015-10-27 23:11:22 +00:00
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adm5120	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
alchemy
atheros	arge(4): flip this on for AR9344 SoCs.	2015-10-24 22:37:59 +00:00
beri	preload_search_info: make sure mod is set	2015-08-21 15:57:57 +00:00
cavium	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
conf	Commit the right board file - use the right name + hints.	2015-10-22 15:15:45 +00:00
gxemul
idt	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
include	Switch from a stub to a real implementation of pmap_page_set_attr() for mips,	2015-10-21 14:57:59 +00:00
malta	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
mips	mips: use the correct va for wbinv flushing.	2015-10-27 23:11:22 +00:00
nlm	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
rmi	Add domain support to PCI bus allocation	2015-09-16 23:34:51 +00:00
rt305x	Add support for the uart classes to set their default register shift value.	2015-04-11 17:16:23 +00:00
sentry5
sibyte