freebsd-dev/sys/riscv
Mitchell Horne bc5f705aba plic: support irq distribution
Our PLIC implementation only enables interrupts on the boot cpu.
Implement plic_bind_intr() so that they can be redistributed near the
end of boot during intr_irq_shuffle().

This also slightly modifies how enable bits are handled in an attempt to
better fit the PIC interface. plic_enable_intr()/plic_disable_intr() are
converted to manage an interrupt source's threshold value, since this
value can be used as to globally enable/disable an irq. All handing of the
per-context enable bits is moved to the new methods plic_setup_intr()
and plic_bind_intr().

Reviewed by:	br
MFC after:	3 weeks
Differential Revision:	https://reviews.freebsd.org/D21928
2019-11-15 03:18:11 +00:00
..
conf RISC-V: Remove EARLY_AP_STARTUP from GENERIC 2019-11-02 19:33:02 +00:00
include Fix atomic_*cmpset32 on riscv64 with clang. 2019-10-23 16:41:31 +00:00
riscv plic: support irq distribution 2019-11-15 03:18:11 +00:00