bd1c8dd51b
as STX_CTRL_PERF_CNT_CNT0_SHIFT actually is zero, if we were using the second counter in the upper 32 bits this would be required though as the MI timecounter code doesn't support 64-bit counters/counter registers. - Remove a redundant NULL assignment from the timecounter initialization. |
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apb.c | ||
fire.c | ||
firereg.h | ||
firevar.h | ||
ofw_pci_if.m | ||
ofw_pci.h | ||
ofw_pcib_subr.c | ||
ofw_pcib_subr.h | ||
ofw_pcib.c | ||
ofw_pcibus.c | ||
psycho.c | ||
psychoreg.h | ||
psychovar.h | ||
sbbc.c | ||
schizo.c | ||
schizoreg.h | ||
schizovar.h |