599fcb028d
This driver should support both the SSI (V.35 etc) E1/T1 unchannelized, DS3 and HSSI cards. Only tested on the SSI card. More info at: http://www.lanmedia.com Thanks to LanMedia for donating two LMC1000P cards. if_de.c driver modified by: LanMedia NetGraphification by: Stephen Kiernan <sk-ports@vegamuse.org>
277 lines
9.9 KiB
C
277 lines
9.9 KiB
C
/*-
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* Copyright (c) 1994-1997 Matt Thomas (matt@3am-software.com)
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* Copyright (c) LAN Media Corporation 1998, 1999.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. The name of the author may not be used to endorse or promote products
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* derived from this software withough specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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* $Id: if_lmcioctl.h,v 1.9 1999/02/18 10:30:18 explorer Exp $
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*/
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/*
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* IOCTLs for the sane world.
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*/
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#define LMCIOCGINFO _IOW('i', 240, struct ifreq)
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#define LMCIOCSINFO _IOWR('i', 241, struct ifreq)
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typedef struct {
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u_int32_t n;
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u_int32_t m;
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u_int32_t v;
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u_int32_t x;
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u_int32_t r;
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u_int32_t f;
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u_int32_t exact;
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} lmc_av9110_t;
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/*
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* Common structure passed to the ioctl code.
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*/
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struct lmc___ctl {
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u_int32_t cardtype;
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u_int32_t clock_source; /* HSSI, SSI */
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u_int32_t clock_rate; /* SSI */
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u_int32_t crc_length;
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u_int32_t cable_length; /* DS3 */
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u_int32_t scrambler_onoff; /* DS3 */
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u_int32_t cable_type; /* SSI */
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u_int32_t keepalive_onoff; /* protocol */
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u_int32_t ticks; /* ticks/sec */
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union {
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lmc_av9110_t ssi;
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} cardspec;
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u_int32_t circuit_type; /* T1 or E1 circuit */
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};
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#define LMC_CTL_CARDTYPE_LMC5200 0 /* HSSI */
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#define LMC_CTL_CARDTYPE_LMC5245 1 /* DS3 */
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#define LMC_CTL_CARDTYPE_LMC1000 2 /* SSI, E1, etc */
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#define LMC_CTL_CARDTYPE_LMC1200 3 /* T1 */
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#define LMC_CTL_OFF 0 /* generic OFF value */
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#define LMC_CTL_ON 1 /* generic ON value */
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#define LMC_CTL_CLOCK_SOURCE_EXT 0 /* clock off line */
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#define LMC_CTL_CLOCK_SOURCE_INT 1 /* internal clock */
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#define LMC_CTL_CRC_LENGTH_16 16
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#define LMC_CTL_CRC_LENGTH_32 32
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#define LMC_CTL_CRC_BYTESIZE_2 2
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#define LMC_CTL_CRC_BYTESIZE_4 4
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#define LMC_CTL_CABLE_LENGTH_LT_100FT 0 /* DS3 cable < 100 feet */
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#define LMC_CTL_CABLE_LENGTH_GT_100FT 1 /* DS3 cable >= 100 feet */
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#define LMC_CTL_CIRCUIT_TYPE_E1 0
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#define LMC_CTL_CIRCUIT_TYPE_T1 1
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/*
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* These are not in the least IOCTL related, but I want them common.
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*/
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/*
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* assignments for the GPIO register on the DEC chip (common)
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*/
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#define LMC_GEP_INIT 0x01 /* 0: */
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#define LMC_GEP_RESET 0x02 /* 1: */
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#define LMC_GEP_LOAD 0x10 /* 4: */
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#define LMC_GEP_DP 0x20 /* 5: */
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#define LMC_GEP_SERIAL 0x40 /* 6: serial out */
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#define LMC_GEP_SERIALCLK 0x80 /* 7: serial clock */
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/*
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* HSSI GPIO assignments
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*/
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#define LMC_GEP_HSSI_ST 0x04 /* 2: receive timing sense (deprecated) */
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#define LMC_GEP_HSSI_CLOCK 0x08 /* 3: clock source */
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/*
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* SSI GPIO assignments
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*/
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#define LMC_GEP_SSI_GENERATOR 0x04 /* 2: enable prog freq gen serial i/f */
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#define LMC_GEP_SSI_TXCLOCK 0x08 /* 3: provide clock on TXCLOCK output */
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/* Note: 2 pairs of LEDs where swapped by mistake
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* in Xilinx code for DS3 & DS1 adapters */
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#define LMC_DS3_LED0 0x0100 /* bit 08 yellow */
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#define LMC_DS3_LED1 0x0080 /* bit 07 blue */
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#define LMC_DS3_LED2 0x0400 /* bit 10 green */
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#define LMC_DS3_LED3 0x0200 /* bit 09 red */
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/*
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* Common MII16 bits
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*/
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#define LMC_MII16_LED0 0x0080
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#define LMC_MII16_LED1 0x0100
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#define LMC_MII16_LED2 0x0200
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#define LMC_MII16_LED3 0x0400 /* Error, and the red one */
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#define LMC_MII16_LED_ALL 0x0780 /* LED bit mask */
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#define LMC_MII16_FIFO_RESET 0x0800
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/*
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* definitions for HSSI
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*/
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#define LMC_MII16_HSSI_TA 0x0001
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#define LMC_MII16_HSSI_CA 0x0002
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#define LMC_MII16_HSSI_LA 0x0004
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#define LMC_MII16_HSSI_LB 0x0008
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#define LMC_MII16_HSSI_LC 0x0010
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#define LMC_MII16_HSSI_TM 0x0020
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#define LMC_MII16_HSSI_CRC 0x0040
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/*
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* assignments for the MII register 16 (DS3)
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*/
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#define LMC_MII16_DS3_ZERO 0x0001
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#define LMC_MII16_DS3_TRLBK 0x0002
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#define LMC_MII16_DS3_LNLBK 0x0004
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#define LMC_MII16_DS3_RAIS 0x0008
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#define LMC_MII16_DS3_TAIS 0x0010
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#define LMC_MII16_DS3_BIST 0x0020
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#define LMC_MII16_DS3_DLOS 0x0040
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#define LMC_MII16_DS3_CRC 0x1000
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#define LMC_MII16_DS3_SCRAM 0x2000
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/*
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* And SSI
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*/
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#define LMC_MII16_SSI_DTR 0x0001 /* DTR output RW */
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#define LMC_MII16_SSI_DSR 0x0002 /* DSR input RO */
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#define LMC_MII16_SSI_RTS 0x0004 /* RTS output RW */
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#define LMC_MII16_SSI_CTS 0x0008 /* CTS input RO */
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#define LMC_MII16_SSI_DCD 0x0010 /* DCD input RO */
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#define LMC_MII16_SSI_RI 0x0020 /* RI input RO */
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#define LMC_MII16_SSI_CRC 0x0040 /* CRC select */
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/*
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* bits 0x0080 through 0x0800 are generic, and described
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* above with LMC_MII16_LED[0123] _LED_ALL, and _FIFO_RESET
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*/
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#define LMC_MII16_SSI_LL 0x1000 /* LL output RW */
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#define LMC_MII16_SSI_RL 0x2000 /* RL output RW */
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#define LMC_MII16_SSI_TM 0x4000 /* TM input RO */
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#define LMC_MII16_SSI_LOOP 0x8000 /* loopback enable RW */
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/*
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* Some of the MII16 bits are mirrored in the MII17 register as well,
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* but let's keep thing seperate for now, and get only the cable from
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* the MII17.
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*/
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#define LMC_MII17_SSI_CABLE_MASK 0x0038 /* mask to extract the cable type */
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#define LMC_MII17_SSI_CABLE_SHIFT 3 /* shift to extract the cable type */
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/*
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* framer register 0 and 7 (7 is latched and reset on read)
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*/
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#define LMC_FRAMER_REG0_DLOS 0x80 /* digital loss of service */
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#define LMC_FRAMER_REG0_OOFS 0x40 /* out of frame sync */
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#define LMC_FRAMER_REG0_AIS 0x20 /* alarm indication signal */
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#define LMC_FRAMER_REG0_CIS 0x10 /* channel idle */
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#define LMC_FRAMER_REG0_LOC 0x08 /* loss of clock */
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#define LMC_CARDTYPE_UNKNOWN -1
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#define LMC_CARDTYPE_HSSI 1 /* probed card is a HSSI card */
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#define LMC_CARDTYPE_DS3 2 /* probed card is a DS3 card */
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#define LMC_CARDTYPE_SSI 3 /* probed card is a SSI card */
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#define LMC_CARDTYPE_T1 4 /* probed card is a T1 card */
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/*
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* framer register 0 and 7 (7 is latched and reset on read)
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*/
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#define LMC_FRAMER_REG0_DLOS 0x80 /* digital loss of service */
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#define LMC_FRAMER_REG0_OOFS 0x40 /* out of frame sync */
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#define LMC_FRAMER_REG0_AIS 0x20 /* alarm indication signal */
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#define LMC_FRAMER_REG0_CIS 0x10 /* channel idle */
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#define LMC_FRAMER_REG0_LOC 0x08 /* loss of clock */
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#define LMC_MII16_T1_UNUSED1 0x0003
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#define LMC_MII16_T1_XOE 0x0004
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#define LMC_MII16_T1_RST 0x0008 /* T1 chip reset - RW */
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#define LMC_MII16_T1_Z 0x0010 /* output impedance T1=1, E1=0 output - RW */
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#define LMC_MII16_T1_INTR 0x0020 /* interrupt from 8370 - RO */
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#define LMC_MII16_T1_ONESEC 0x0040 /* one second square wave - ro */
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#define LMC_MII16_T1_LED0 0x0100
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#define LMC_MII16_T1_LED1 0x0080
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#define LMC_MII16_T1_LED2 0x0400
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#define LMC_MII16_T1_LED3 0x0200
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#define LMC_MII16_T1_FIFO_RESET 0x0800
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#define LMC_MII16_T1_CRC 0x1000 /* CRC select - RW */
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#define LMC_MII16_T1_UNUSED2 0xe000
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#define T1FRAMER_ALARM1_STATUS 0x47
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#define T1FRAMER_ALARM2_STATUS 0x48
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#define T1FRAMER_FERR_LSB 0x50
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#define T1FRAMER_FERR_MSB 0x51 /* framing bit error counter */
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#define T1FRAMER_LCV_LSB 0x54
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#define T1FRAMER_LCV_MSB 0x55 /* line code violation counter */
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#define T1FRAMER_AERR 0x5A
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/* mask for the above AERR register */
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#define T1FRAMER_LOF_MASK (0x0f0) /* receive loss of frame */
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#define T1FRAMER_COFA_MASK (0x0c0) /* change of frame alignment */
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#define T1FRAMER_SEF_MASK (0x03) /* severely errored frame */
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/* 8370 framer register ALM1 (0x47) values
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* used to determine link status
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*/
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#define T1F_SIGFRZ 0x01 /* signaling freeze */
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#define T1F_RLOF 0x02 /* receive loss of frame alignment */
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#define T1F_RLOS 0x04 /* receive loss of signal */
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#define T1F_RALOS 0x08 /* receive analog loss of signal or RCKI loss of clock */
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#define T1F_RAIS 0x10 /* receive alarm indication signal */
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#define T1F_UNUSED 0x20
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#define T1F_RYEL 0x40 /* receive yellow alarm */
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#define T1F_RMYEL 0x80 /* receive multiframe yellow alarm */
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/* ------------------ end T1 defs ------------------- */
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#define LMC_MII_LedMask 0x0780
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#define LMC_MII_LedBitPos 7
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/*
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* NetBSD uses _KERNEL, FreeBSD uses KERNEL.
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*/
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#if defined(_KERNEL) || defined(KERNEL) || defined(__KERNEL__)
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/*
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* media independent methods to check on media status, link, light LEDs,
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* etc.
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*/
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struct lmc___media {
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void (* init)(lmc_softc_t * const);
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void (* defaults)(lmc_softc_t * const);
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void (* set_status)(lmc_softc_t * const, lmc_ctl_t *);
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void (* set_clock_source)(lmc_softc_t * const, int);
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void (* set_speed)(lmc_softc_t * const, lmc_ctl_t *);
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void (* set_cable_length)(lmc_softc_t * const, int);
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void (* set_scrambler)(lmc_softc_t * const, int);
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int (* get_link_status)(lmc_softc_t * const);
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void (* set_link_status)(lmc_softc_t * const, int);
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void (* set_crc_length)(lmc_softc_t * const, int);
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void (* set_circuit_type)(lmc_softc_t * const, int);
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};
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static unsigned lmc_mii_readreg(lmc_softc_t * const sc, unsigned
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devaddr, unsigned regno);
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static void lmc_mii_writereg(lmc_softc_t * const sc, unsigned devaddr,
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unsigned regno, unsigned data);
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#endif
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