fe182ba1d0
Some x86 class CPUs have accelerated intrinsics for SHA1 and SHA256. Provide this functionality on CPUs that support it. This implements CRYPTO_SHA1, CRYPTO_SHA1_HMAC, and CRYPTO_SHA2_256_HMAC. Correctness: The cryptotest.py suite in tests/sys/opencrypto has been enhanced to verify SHA1 and SHA256 HMAC using standard NIST test vectors. The test passes on this driver. Additionally, jhb's cryptocheck tool has been used to compare various random inputs against OpenSSL. This test also passes. Rough performance averages on AMD Ryzen 1950X (4kB buffer): aesni: SHA1: ~8300 Mb/s SHA256: ~8000 Mb/s cryptosoft: ~1800 Mb/s SHA256: ~1800 Mb/s So ~4.4-4.6x speedup depending on algorithm choice. This is consistent with the results the Linux folks saw for 4kB buffers. The driver borrows SHA update code from sys/crypto sha1 and sha256. The intrinsic step function comes from Intel under a 3-clause BSDL.[0] The intel_sha_extensions_sha<foo>_intrinsic.c files were renamed and lightly modified (added const, resolved a warning or two; included the sha_sse header to declare the functions). [0]: https://software.intel.com/en-us/articles/intel-sha-extensions-implementations Reviewed by: jhb Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D12452
120 lines
4.5 KiB
C
120 lines
4.5 KiB
C
/*-
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* Copyright (c) 2010 Konstantin Belousov <kib@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHORS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _AESNI_H_
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#define _AESNI_H_
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#include <sys/types.h>
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#include <sys/malloc.h>
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#include <sys/queue.h>
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#include <opencrypto/cryptodev.h>
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#if defined(__amd64__) || defined(__i386__)
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#include <machine/cpufunc.h>
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#include <machine/cputypes.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#endif
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#if defined(__i386__)
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#include <machine/npx.h>
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#elif defined(__amd64__)
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#include <machine/fpu.h>
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#endif
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#define AES128_ROUNDS 10
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#define AES192_ROUNDS 12
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#define AES256_ROUNDS 14
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#define AES_SCHED_LEN ((AES256_ROUNDS + 1) * AES_BLOCK_LEN)
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struct aesni_session {
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uint8_t enc_schedule[AES_SCHED_LEN] __aligned(16);
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uint8_t dec_schedule[AES_SCHED_LEN] __aligned(16);
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uint8_t xts_schedule[AES_SCHED_LEN] __aligned(16);
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/* Same as the SHA256 Blocksize. */
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uint8_t hmac_key[SHA1_HMAC_BLOCK_LEN] __aligned(16);
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int algo;
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int rounds;
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/* uint8_t *ses_ictx; */
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/* uint8_t *ses_octx; */
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/* int ses_mlen; */
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int used;
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int auth_algo;
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int mlen;
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uint32_t id;
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TAILQ_ENTRY(aesni_session) next;
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};
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/*
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* Internal functions, implemented in assembler.
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*/
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void aesni_set_enckey(const uint8_t *userkey,
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uint8_t *encrypt_schedule /*__aligned(16)*/, int number_of_rounds);
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void aesni_set_deckey(const uint8_t *encrypt_schedule /*__aligned(16)*/,
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uint8_t *decrypt_schedule /*__aligned(16)*/, int number_of_rounds);
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/*
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* Slightly more public interfaces.
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*/
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void aesni_encrypt_cbc(int rounds, const void *key_schedule /*__aligned(16)*/,
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size_t len, const uint8_t *from, uint8_t *to,
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const uint8_t iv[__min_size(AES_BLOCK_LEN)]);
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void aesni_decrypt_cbc(int rounds, const void *key_schedule /*__aligned(16)*/,
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size_t len, uint8_t *buf, const uint8_t iv[__min_size(AES_BLOCK_LEN)]);
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void aesni_encrypt_ecb(int rounds, const void *key_schedule /*__aligned(16)*/,
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size_t len, const uint8_t *from, uint8_t *to);
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void aesni_decrypt_ecb(int rounds, const void *key_schedule /*__aligned(16)*/,
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size_t len, const uint8_t *from, uint8_t *to);
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void aesni_encrypt_icm(int rounds, const void *key_schedule /*__aligned(16)*/,
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size_t len, const uint8_t *from, uint8_t *to,
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const uint8_t iv[__min_size(AES_BLOCK_LEN)]);
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void aesni_encrypt_xts(int rounds, const void *data_schedule /*__aligned(16)*/,
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const void *tweak_schedule /*__aligned(16)*/, size_t len,
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const uint8_t *from, uint8_t *to,
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const uint8_t iv[__min_size(AES_BLOCK_LEN)]);
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void aesni_decrypt_xts(int rounds, const void *data_schedule /*__aligned(16)*/,
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const void *tweak_schedule /*__aligned(16)*/, size_t len,
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const uint8_t *from, uint8_t *to,
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const uint8_t iv[__min_size(AES_BLOCK_LEN)]);
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/* GCM & GHASH functions */
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void AES_GCM_encrypt(const unsigned char *in, unsigned char *out,
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const unsigned char *addt, const unsigned char *ivec,
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unsigned char *tag, uint32_t nbytes, uint32_t abytes, int ibytes,
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const unsigned char *key, int nr);
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int AES_GCM_decrypt(const unsigned char *in, unsigned char *out,
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const unsigned char *addt, const unsigned char *ivec,
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const unsigned char *tag, uint32_t nbytes, uint32_t abytes, int ibytes,
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const unsigned char *key, int nr);
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int aesni_cipher_setup_common(struct aesni_session *ses, const uint8_t *key,
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int keylen);
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#endif /* _AESNI_H_ */
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