a426b286c8
patch for r263619, and unify all the URLs to point to svnweb.
297 lines
11 KiB
Diff
297 lines
11 KiB
Diff
Pull in r200373 from upstream llvm trunk (by Venkatraman Govindaraju):
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[Sparc] Use %r_disp32 for pc_rel entries in gcc_except_table and eh_frame.
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Otherwise, assembler (gas) fails to assemble them with error message "operation
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combines symbols in different segments". This is because MC computes
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pc_rel entries with subtract expression between labels from different sections.
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Introduced here: http://svnweb.freebsd.org/changeset/base/262261
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Index: lib/Target/Sparc/SparcTargetObjectFile.h
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===================================================================
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--- lib/Target/Sparc/SparcTargetObjectFile.h
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+++ lib/Target/Sparc/SparcTargetObjectFile.h
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@@ -0,0 +1,34 @@
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+//===-- SparcTargetObjectFile.h - Sparc Object Info -------------*- C++ -*-===//
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+//
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+// The LLVM Compiler Infrastructure
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+//
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+// This file is distributed under the University of Illinois Open Source
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+// License. See LICENSE.TXT for details.
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+//
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+//===----------------------------------------------------------------------===//
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+
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+#ifndef LLVM_TARGET_SPARC_TARGETOBJECTFILE_H
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+#define LLVM_TARGET_SPARC_TARGETOBJECTFILE_H
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+
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+#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
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+
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+namespace llvm {
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+
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+class MCContext;
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+class TargetMachine;
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+
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+class SparcELFTargetObjectFile : public TargetLoweringObjectFileELF {
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+public:
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+ SparcELFTargetObjectFile() :
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+ TargetLoweringObjectFileELF()
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+ {}
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+
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+ const MCExpr *
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+ getTTypeGlobalReference(const GlobalValue *GV, Mangler *Mang,
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+ MachineModuleInfo *MMI, unsigned Encoding,
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+ MCStreamer &Streamer) const;
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+};
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+
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+} // end namespace llvm
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+
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+#endif
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Index: lib/Target/Sparc/SparcISelLowering.cpp
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===================================================================
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--- lib/Target/Sparc/SparcISelLowering.cpp
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+++ lib/Target/Sparc/SparcISelLowering.cpp
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@@ -16,6 +16,7 @@
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#include "SparcMachineFunctionInfo.h"
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#include "SparcRegisterInfo.h"
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#include "SparcTargetMachine.h"
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+#include "SparcTargetObjectFile.h"
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#include "MCTargetDesc/SparcBaseInfo.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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@@ -1361,7 +1362,7 @@ static SPCC::CondCodes FPCondCCodeToFCC(ISD::CondC
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}
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SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
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- : TargetLowering(TM, new TargetLoweringObjectFileELF()) {
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+ : TargetLowering(TM, new SparcELFTargetObjectFile()) {
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Subtarget = &TM.getSubtarget<SparcSubtarget>();
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// Set up the register classes.
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Index: lib/Target/Sparc/SparcTargetObjectFile.cpp
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===================================================================
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--- lib/Target/Sparc/SparcTargetObjectFile.cpp
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+++ lib/Target/Sparc/SparcTargetObjectFile.cpp
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@@ -0,0 +1,48 @@
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+//===------- SparcTargetObjectFile.cpp - Sparc Object Info Impl -----------===//
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+//
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+// The LLVM Compiler Infrastructure
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+//
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+// This file is distributed under the University of Illinois Open Source
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+// License. See LICENSE.TXT for details.
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+//
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+//===----------------------------------------------------------------------===//
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+
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+#include "SparcTargetObjectFile.h"
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+#include "MCTargetDesc/SparcMCExpr.h"
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+#include "llvm/CodeGen/MachineModuleInfoImpls.h"
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+#include "llvm/Support/Dwarf.h"
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+#include "llvm/Target/Mangler.h"
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+
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+using namespace llvm;
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+
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+
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+const MCExpr *SparcELFTargetObjectFile::
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+getTTypeGlobalReference(const GlobalValue *GV, Mangler *Mang,
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+ MachineModuleInfo *MMI, unsigned Encoding,
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+ MCStreamer &Streamer) const {
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+
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+ if (Encoding & dwarf::DW_EH_PE_pcrel) {
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+ MachineModuleInfoELF &ELFMMI = MMI->getObjFileInfo<MachineModuleInfoELF>();
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+
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+ //MCSymbol *SSym = getSymbolWithGlobalValueBase(*Mang, GV, ".DW.stub");
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+ SmallString<60> NameStr;
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+ Mang->getNameWithPrefix(NameStr, GV, true);
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+ NameStr.append(".DW.stub");
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+ MCSymbol *SSym = getContext().GetOrCreateSymbol(NameStr.str());
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+
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+ // Add information about the stub reference to ELFMMI so that the stub
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+ // gets emitted by the asmprinter.
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+ MachineModuleInfoImpl::StubValueTy &StubSym = ELFMMI.getGVStubEntry(SSym);
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+ if (StubSym.getPointer() == 0) {
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+ MCSymbol *Sym = getSymbol(*Mang, GV);
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+ StubSym = MachineModuleInfoImpl::StubValueTy(Sym, !GV->hasLocalLinkage());
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+ }
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+
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+ MCContext &Ctx = getContext();
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+ return SparcMCExpr::Create(SparcMCExpr::VK_Sparc_R_DISP32,
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+ MCSymbolRefExpr::Create(SSym, Ctx), Ctx);
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+ }
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+
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+ return TargetLoweringObjectFileELF::
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+ getTTypeGlobalReference(GV, Mang, MMI, Encoding, Streamer);
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+}
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Index: lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
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===================================================================
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--- lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
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+++ lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.cpp
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@@ -12,7 +12,9 @@
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//===----------------------------------------------------------------------===//
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#include "SparcMCAsmInfo.h"
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+#include "SparcMCExpr.h"
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#include "llvm/ADT/Triple.h"
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+#include "llvm/MC/MCStreamer.h"
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using namespace llvm;
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@@ -44,4 +46,15 @@ SparcELFMCAsmInfo::SparcELFMCAsmInfo(StringRef TT)
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PrivateGlobalPrefix = ".L";
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}
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+const MCExpr*
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+SparcELFMCAsmInfo::getExprForPersonalitySymbol(const MCSymbol *Sym,
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+ unsigned Encoding,
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+ MCStreamer &Streamer) const {
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+ if (Encoding & dwarf::DW_EH_PE_pcrel) {
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+ MCContext &Ctx = Streamer.getContext();
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+ return SparcMCExpr::Create(SparcMCExpr::VK_Sparc_R_DISP32,
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+ MCSymbolRefExpr::Create(Sym, Ctx), Ctx);
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+ }
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+ return MCAsmInfo::getExprForPersonalitySymbol(Sym, Encoding, Streamer);
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+}
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Index: lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
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===================================================================
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--- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
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+++ lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
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@@ -41,6 +41,7 @@ void SparcMCExpr::PrintImpl(raw_ostream &OS) const
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case VK_Sparc_L44: OS << "%l44("; break;
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case VK_Sparc_HH: OS << "%hh("; break;
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case VK_Sparc_HM: OS << "%hm("; break;
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+ case VK_Sparc_R_DISP32: OS << "%r_disp32("; break;
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case VK_Sparc_TLS_GD_HI22: OS << "%tgd_hi22("; break;
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case VK_Sparc_TLS_GD_LO10: OS << "%tgd_lo10("; break;
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case VK_Sparc_TLS_GD_ADD: OS << "%tgd_add("; break;
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@@ -77,6 +78,7 @@ SparcMCExpr::VariantKind SparcMCExpr::parseVariant
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.Case("l44", VK_Sparc_L44)
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.Case("hh", VK_Sparc_HH)
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.Case("hm", VK_Sparc_HM)
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+ .Case("r_disp32", VK_Sparc_R_DISP32)
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.Case("tgd_hi22", VK_Sparc_TLS_GD_HI22)
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.Case("tgd_lo10", VK_Sparc_TLS_GD_LO10)
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.Case("tgd_add", VK_Sparc_TLS_GD_ADD)
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@@ -101,6 +103,8 @@ SparcMCExpr::VariantKind SparcMCExpr::parseVariant
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bool
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SparcMCExpr::EvaluateAsRelocatableImpl(MCValue &Res,
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const MCAsmLayout *Layout) const {
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+ if (!Layout)
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+ return false;
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return getSubExpr()->EvaluateAsRelocatable(Res, *Layout);
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}
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Index: lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
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===================================================================
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--- lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
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+++ lib/Target/Sparc/MCTargetDesc/SparcMCAsmInfo.h
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@@ -17,13 +17,16 @@
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#include "llvm/MC/MCAsmInfoELF.h"
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namespace llvm {
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- class StringRef;
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+class StringRef;
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- class SparcELFMCAsmInfo : public MCAsmInfoELF {
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- virtual void anchor();
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- public:
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- explicit SparcELFMCAsmInfo(StringRef TT);
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- };
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+class SparcELFMCAsmInfo : public MCAsmInfoELF {
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+ virtual void anchor();
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+public:
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+ explicit SparcELFMCAsmInfo(StringRef TT);
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+ virtual const MCExpr* getExprForPersonalitySymbol(const MCSymbol *Sym,
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+ unsigned Encoding,
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+ MCStreamer &Streamer) const;
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+};
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} // namespace llvm
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Index: lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
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===================================================================
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--- lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
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+++ lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
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@@ -31,6 +31,7 @@ class SparcMCExpr : public MCTargetExpr {
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VK_Sparc_L44,
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VK_Sparc_HH,
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VK_Sparc_HM,
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+ VK_Sparc_R_DISP32,
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VK_Sparc_TLS_GD_HI22,
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VK_Sparc_TLS_GD_LO10,
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VK_Sparc_TLS_GD_ADD,
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Index: lib/Target/Sparc/CMakeLists.txt
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===================================================================
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--- lib/Target/Sparc/CMakeLists.txt
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+++ lib/Target/Sparc/CMakeLists.txt
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@@ -27,6 +27,7 @@ add_llvm_target(SparcCodeGen
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SparcJITInfo.cpp
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SparcCodeEmitter.cpp
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SparcMCInstLower.cpp
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+ SparcTargetObjectFile.cpp
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)
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add_dependencies(LLVMSparcCodeGen SparcCommonTableGen intrinsics_gen)
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Index: test/CodeGen/SPARC/exception.ll
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===================================================================
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--- test/CodeGen/SPARC/exception.ll
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+++ test/CodeGen/SPARC/exception.ll
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@@ -1,7 +1,9 @@
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; RUN: llc < %s -march=sparc -relocation-model=static | FileCheck -check-prefix=V8ABS %s
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; RUN: llc < %s -march=sparc -relocation-model=pic | FileCheck -check-prefix=V8PIC %s
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+; RUN: llc < %s -march=sparc -relocation-model=pic -disable-cfi | FileCheck -check-prefix=V8PIC_NOCFI %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=static | FileCheck -check-prefix=V9ABS %s
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; RUN: llc < %s -march=sparcv9 -relocation-model=pic | FileCheck -check-prefix=V9PIC %s
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+; RUN: llc < %s -march=sparcv9 -relocation-model=pic -disable-cfi | FileCheck -check-prefix=V9PIC_NOCFI %s
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%struct.__fundamental_type_info_pseudo = type { %struct.__type_info_pseudo }
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@@ -40,11 +42,23 @@
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; V8PIC: .cfi_register 15, 31
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; V8PIC: .section .gcc_except_table
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; V8PIC-NOT: .section
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-; V8PIC: .word .L_ZTIi.DW.stub-
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+; V8PIC: .word %r_disp32(.L_ZTIi.DW.stub)
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; V8PIC: .data
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; V8PIC: .L_ZTIi.DW.stub:
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; V8PIC-NEXT: .word _ZTIi
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+; V8PIC_NOCFI-LABEL: main:
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+; V8PIC_NOCFI: .section .gcc_except_table
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+; V8PIC_NOCFI-NOT: .section
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+; V8PIC_NOCFI: .word %r_disp32(.L_ZTIi.DW.stub)
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+; V8PIC_NOCFI: .data
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+; V8PIC_NOCFI: .L_ZTIi.DW.stub:
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+; V8PIC_NOCFI-NEXT: .word _ZTIi
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+; V8PIC_NOCFI: .section .eh_frame
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+; V8PIC_NOCFI-NOT: .section
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+; V8PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
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+
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+
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; V9ABS-LABEL: main:
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; V9ABS: .cfi_startproc
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; V9ABS: .cfi_personality 0, __gxx_personality_v0
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@@ -65,11 +79,22 @@
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; V9PIC: .cfi_register 15, 31
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; V9PIC: .section .gcc_except_table
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; V9PIC-NOT: .section
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-; V9PIC: .word .L_ZTIi.DW.stub-
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+; V9PIC: .word %r_disp32(.L_ZTIi.DW.stub)
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; V9PIC: .data
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; V9PIC: .L_ZTIi.DW.stub:
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; V9PIC-NEXT: .xword _ZTIi
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+; V9PIC_NOCFI-LABEL: main:
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+; V9PIC_NOCFI: .section .gcc_except_table
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+; V9PIC_NOCFI-NOT: .section
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+; V9PIC_NOCFI: .word %r_disp32(.L_ZTIi.DW.stub)
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+; V9PIC_NOCFI: .data
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+; V9PIC_NOCFI: .L_ZTIi.DW.stub:
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+; V9PIC_NOCFI-NEXT: .xword _ZTIi
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+; V9PIC_NOCFI: .section .eh_frame
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+; V9PIC_NOCFI-NOT: .section
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+; V9PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
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+
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define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {
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entry:
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%0 = icmp eq i32 %argc, 2
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