339 lines
13 KiB
Diff
339 lines
13 KiB
Diff
Pull in r196939 from upstream llvm trunk (by Reid Kleckner):
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Reland "Fix miscompile of MS inline assembly with stack realignment"
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This re-lands commit r196876, which was reverted in r196879.
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The tests have been fixed to pass on platforms with a stack alignment
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larger than 4.
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Update to clang side tests will land shortly.
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Introduced here: http://svnweb.freebsd.org/changeset/base/263312
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Index: test/CodeGen/X86/inline-asm-stack-realign2.ll
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===================================================================
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--- test/CodeGen/X86/inline-asm-stack-realign2.ll
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+++ test/CodeGen/X86/inline-asm-stack-realign2.ll
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@@ -0,0 +1,15 @@
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+; RUN: not llc -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
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+
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+; We don't currently support realigning the stack and adjusting the stack
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+; pointer in inline asm. This can even happen in GNU asm.
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+
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+; CHECK: Stack realignment in presence of dynamic stack adjustments is not supported with inline assembly
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+
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+define i32 @foo() {
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+entry:
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+ %r = alloca i32, align 16
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+ store i32 -1, i32* %r, align 16
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+ call void asm sideeffect "push %esi\0A\09xor %esi, %esi\0A\09mov %esi, $0\0A\09pop %esi", "=*m,~{flags},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"(i32* %r)
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+ %0 = load i32* %r, align 16
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+ ret i32 %0
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+}
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Index: test/CodeGen/X86/inline-asm-stack-realign.ll
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===================================================================
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--- test/CodeGen/X86/inline-asm-stack-realign.ll
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+++ test/CodeGen/X86/inline-asm-stack-realign.ll
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@@ -0,0 +1,16 @@
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+; RUN: not llc -mtriple=i686-pc-win32 < %s 2>&1 | FileCheck %s
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+
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+; We don't currently support realigning the stack and adjusting the stack
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+; pointer in inline asm. This commonly happens in MS inline assembly using
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+; push and pop.
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+
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+; CHECK: Stack realignment in presence of dynamic stack adjustments is not supported with inline assembly
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+
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+define i32 @foo() {
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+entry:
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+ %r = alloca i32, align 16
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+ store i32 -1, i32* %r, align 16
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+ call void asm sideeffect inteldialect "push esi\0A\09xor esi, esi\0A\09mov dword ptr $0, esi\0A\09pop esi", "=*m,~{flags},~{esi},~{esp},~{dirflag},~{fpsr},~{flags}"(i32* %r)
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+ %0 = load i32* %r, align 16
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+ ret i32 %0
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+}
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Index: test/CodeGen/X86/ms-inline-asm.ll
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===================================================================
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--- test/CodeGen/X86/ms-inline-asm.ll
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+++ test/CodeGen/X86/ms-inline-asm.ll
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@@ -5,7 +5,6 @@ entry:
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%0 = tail call i32 asm sideeffect inteldialect "mov eax, $1\0A\09mov $0, eax", "=r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32 1) nounwind
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ret i32 %0
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; CHECK: t1
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-; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, ecx
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@@ -19,7 +18,6 @@ entry:
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call void asm sideeffect inteldialect "mov eax, $$1", "~{eax},~{dirflag},~{fpsr},~{flags}"() nounwind
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ret void
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; CHECK: t2
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-; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, 1
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@@ -34,7 +32,6 @@ entry:
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call void asm sideeffect inteldialect "mov eax, DWORD PTR [$0]", "*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* %V.addr) nounwind
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ret void
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; CHECK: t3
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-; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: mov eax, DWORD PTR {{[[esp]}}
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@@ -56,7 +53,6 @@ entry:
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%0 = load i32* %b1, align 4
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ret i32 %0
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; CHECK: t18
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-; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: lea ebx, foo
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@@ -76,7 +72,6 @@ entry:
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call void asm sideeffect inteldialect "call $0", "r,~{dirflag},~{fpsr},~{flags}"(void ()* @t19_helper) nounwind
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ret void
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; CHECK-LABEL: t19:
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-; CHECK: movl %esp, %ebp
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; CHECK: movl ${{_?}}t19_helper, %eax
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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@@ -95,7 +90,6 @@ entry:
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%0 = load i32** %res, align 4
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ret i32* %0
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; CHECK-LABEL: t30:
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-; CHECK: movl %esp, %ebp
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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; CHECK: lea edi, dword ptr [{{_?}}results]
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@@ -103,8 +97,31 @@ entry:
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; CHECK: {{## InlineAsm End|#NO_APP}}
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; CHECK: {{## InlineAsm Start|#APP}}
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; CHECK: .intel_syntax
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-; CHECK: mov dword ptr [esi], edi
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+; CHECK: mov dword ptr [esp], edi
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; CHECK: .att_syntax
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; CHECK: {{## InlineAsm End|#NO_APP}}
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-; CHECK: movl (%esi), %eax
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+; CHECK: movl (%esp), %eax
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}
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+
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+; Stack realignment plus MS inline asm that does *not* adjust the stack is no
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+; longer an error.
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+
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+define i32 @t31() {
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+entry:
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+ %val = alloca i32, align 64
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+ store i32 -1, i32* %val, align 64
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+ call void asm sideeffect inteldialect "mov dword ptr $0, esp", "=*m,~{dirflag},~{fpsr},~{flags}"(i32* %val) #1
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+ %sp = load i32* %val, align 64
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+ ret i32 %sp
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+; CHECK-LABEL: t31:
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+; CHECK: pushl %ebp
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+; CHECK: movl %esp, %ebp
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+; CHECK: andl $-64, %esp
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+; CHECK: {{## InlineAsm Start|#APP}}
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+; CHECK: .intel_syntax
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+; CHECK: mov dword ptr [esp], esp
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+; CHECK: .att_syntax
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+; CHECK: {{## InlineAsm End|#NO_APP}}
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+; CHECK: movl (%esp), %eax
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+; CHECK: ret
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+}
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Index: include/llvm/CodeGen/MachineFrameInfo.h
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===================================================================
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--- include/llvm/CodeGen/MachineFrameInfo.h
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+++ include/llvm/CodeGen/MachineFrameInfo.h
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@@ -223,6 +223,10 @@ class MachineFrameInfo {
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/// Whether the "realign-stack" option is on.
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bool RealignOption;
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+ /// True if the function includes inline assembly that adjusts the stack
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+ /// pointer.
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+ bool HasInlineAsmWithSPAdjust;
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+
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const TargetFrameLowering *getFrameLowering() const;
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public:
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explicit MachineFrameInfo(const TargetMachine &TM, bool RealignOpt)
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@@ -451,6 +455,10 @@ class MachineFrameInfo {
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bool hasCalls() const { return HasCalls; }
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void setHasCalls(bool V) { HasCalls = V; }
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+ /// Returns true if the function contains any stack-adjusting inline assembly.
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+ bool hasInlineAsmWithSPAdjust() const { return HasInlineAsmWithSPAdjust; }
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+ void setHasInlineAsmWithSPAdjust(bool B) { HasInlineAsmWithSPAdjust = B; }
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+
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/// getMaxCallFrameSize - Return the maximum size of a call frame that must be
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/// allocated for an outgoing function call. This is only available if
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/// CallFrameSetup/Destroy pseudo instructions are used by the target, and
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Index: include/llvm/CodeGen/MachineFunction.h
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===================================================================
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--- include/llvm/CodeGen/MachineFunction.h
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+++ include/llvm/CodeGen/MachineFunction.h
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@@ -131,8 +131,8 @@ class MachineFunction {
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/// about the control flow of such functions.
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bool ExposesReturnsTwice;
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- /// True if the function includes MS-style inline assembly.
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- bool HasMSInlineAsm;
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+ /// True if the function includes any inline assembly.
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+ bool HasInlineAsm;
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MachineFunction(const MachineFunction &) LLVM_DELETED_FUNCTION;
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void operator=(const MachineFunction&) LLVM_DELETED_FUNCTION;
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@@ -218,15 +218,14 @@ class MachineFunction {
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ExposesReturnsTwice = B;
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}
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- /// Returns true if the function contains any MS-style inline assembly.
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- bool hasMSInlineAsm() const {
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- return HasMSInlineAsm;
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+ /// Returns true if the function contains any inline assembly.
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+ bool hasInlineAsm() const {
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+ return HasInlineAsm;
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}
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- /// Set a flag that indicates that the function contains MS-style inline
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- /// assembly.
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- void setHasMSInlineAsm(bool B) {
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- HasMSInlineAsm = B;
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+ /// Set a flag that indicates that the function contains inline assembly.
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+ void setHasInlineAsm(bool B) {
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+ HasInlineAsm = B;
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}
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/// getInfo - Keep track of various per-function pieces of information for
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Index: lib/Target/X86/X86FrameLowering.cpp
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===================================================================
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--- lib/Target/X86/X86FrameLowering.cpp
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+++ lib/Target/X86/X86FrameLowering.cpp
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@@ -50,7 +50,7 @@ bool X86FrameLowering::hasFP(const MachineFunction
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return (MF.getTarget().Options.DisableFramePointerElim(MF) ||
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RegInfo->needsStackRealignment(MF) ||
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MFI->hasVarSizedObjects() ||
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- MFI->isFrameAddressTaken() || MF.hasMSInlineAsm() ||
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+ MFI->isFrameAddressTaken() || MFI->hasInlineAsmWithSPAdjust() ||
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MF.getInfo<X86MachineFunctionInfo>()->getForceFramePointer() ||
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MMI.callsUnwindInit() || MMI.callsEHReturn());
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}
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Index: lib/Target/X86/X86RegisterInfo.cpp
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===================================================================
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--- lib/Target/X86/X86RegisterInfo.cpp
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+++ lib/Target/X86/X86RegisterInfo.cpp
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@@ -347,6 +347,12 @@ BitVector X86RegisterInfo::getReservedRegs(const M
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"Stack realignment in presence of dynamic allocas is not supported with"
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"this calling convention.");
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+ // FIXME: Do a proper analysis of the inline asm to see if it actually
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+ // conflicts with the base register we chose.
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+ if (MF.hasInlineAsm())
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+ report_fatal_error("Stack realignment in presence of dynamic stack "
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+ "adjustments is not supported with inline assembly.");
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+
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for (MCSubRegIterator I(getBaseRegister(), this, /*IncludeSelf=*/true);
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I.isValid(); ++I)
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Reserved.set(*I);
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@@ -403,18 +409,15 @@ bool X86RegisterInfo::hasBasePointer(const Machine
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if (!EnableBasePointer)
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return false;
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- // When we need stack realignment and there are dynamic allocas, we can't
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- // reference off of the stack pointer, so we reserve a base pointer.
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- //
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- // This is also true if the function contain MS-style inline assembly. We
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- // do this because if any stack changes occur in the inline assembly, e.g.,
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- // "pusha", then any C local variable or C argument references in the
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- // inline assembly will be wrong because the SP is not properly tracked.
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- if ((needsStackRealignment(MF) && MFI->hasVarSizedObjects()) ||
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- MF.hasMSInlineAsm())
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- return true;
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-
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- return false;
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+ // When we need stack realignment, we can't address the stack from the frame
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+ // pointer. When we have dynamic allocas or stack-adjusting inline asm, we
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+ // can't address variables from the stack pointer. MS inline asm can
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+ // reference locals while also adjusting the stack pointer. When we can't
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+ // use both the SP and the FP, we need a separate base pointer register.
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+ bool CantUseFP = needsStackRealignment(MF);
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+ bool CantUseSP =
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+ MFI->hasVarSizedObjects() || MFI->hasInlineAsmWithSPAdjust();
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+ return CantUseFP && CantUseSP;
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}
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bool X86RegisterInfo::canRealignStack(const MachineFunction &MF) const {
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Index: lib/MC/MCParser/AsmParser.cpp
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===================================================================
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--- lib/MC/MCParser/AsmParser.cpp
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+++ lib/MC/MCParser/AsmParser.cpp
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@@ -4192,6 +4192,11 @@ bool AsmParser::parseMSInlineAsm(
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AsmStrRewrites.push_back(AsmRewrite(AOK_Input, Start, SymName.size()));
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}
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}
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+
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+ // Consider implicit defs to be clobbers. Think of cpuid and push.
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+ const uint16_t *ImpDefs = Desc.getImplicitDefs();
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+ for (unsigned I = 0, E = Desc.getNumImplicitDefs(); I != E; ++I)
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+ ClobberRegs.push_back(ImpDefs[I]);
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}
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// Set the number of Outputs and Inputs.
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Index: lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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===================================================================
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--- lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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+++ lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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@@ -851,12 +851,20 @@ void RegsForValue::AddInlineAsmOperands(unsigned C
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SDValue Res = DAG.getTargetConstant(Flag, MVT::i32);
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Ops.push_back(Res);
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+ unsigned SP = TLI.getStackPointerRegisterToSaveRestore();
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for (unsigned Value = 0, Reg = 0, e = ValueVTs.size(); Value != e; ++Value) {
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unsigned NumRegs = TLI.getNumRegisters(*DAG.getContext(), ValueVTs[Value]);
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MVT RegisterVT = RegVTs[Value];
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for (unsigned i = 0; i != NumRegs; ++i) {
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assert(Reg < Regs.size() && "Mismatch in # registers expected");
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- Ops.push_back(DAG.getRegister(Regs[Reg++], RegisterVT));
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+ unsigned TheReg = Regs[Reg++];
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+ Ops.push_back(DAG.getRegister(TheReg, RegisterVT));
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+
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+ // Notice if we clobbered the stack pointer. Yes, inline asm can do this.
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+ if (TheReg == SP && Code == InlineAsm::Kind_Clobber) {
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+ MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
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+ MFI->setHasInlineAsmWithSPAdjust(true);
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+ }
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}
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}
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}
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Index: lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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===================================================================
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--- lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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+++ lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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@@ -428,7 +428,9 @@ bool SelectionDAGISel::runOnMachineFunction(Machin
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SDB->init(GFI, *AA, LibInfo);
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- MF->setHasMSInlineAsm(false);
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+ MF->setHasInlineAsm(false);
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+ MF->getFrameInfo()->setHasInlineAsmWithSPAdjust(false);
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+
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SelectAllBasicBlocks(Fn);
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// If the first basic block in the function has live ins that need to be
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@@ -511,7 +513,7 @@ bool SelectionDAGISel::runOnMachineFunction(Machin
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for (MachineFunction::const_iterator I = MF->begin(), E = MF->end(); I != E;
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++I) {
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- if (MFI->hasCalls() && MF->hasMSInlineAsm())
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+ if (MFI->hasCalls() && MF->hasInlineAsm())
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break;
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const MachineBasicBlock *MBB = I;
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@@ -522,8 +524,8 @@ bool SelectionDAGISel::runOnMachineFunction(Machin
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II->isStackAligningInlineAsm()) {
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MFI->setHasCalls(true);
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}
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- if (II->isMSInlineAsm()) {
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- MF->setHasMSInlineAsm(true);
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+ if (II->isInlineAsm()) {
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+ MF->setHasInlineAsm(true);
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}
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}
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}
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