Conrad Meyer 194446f9b7 x86: Decode AMD "Extended Feature Extensions ID EBX" bits ... In particular, this determines CPU support for the CLZERO instruction. (No, I am not making this name up.) Sponsored by: Dell EMC Isilon		2017-09-20 18:30:37 +00:00
..
xen
_align.h
_inttypes.h
_limits.h
_stdint.h
_types.h
acpica_machdep.h
apicreg.h	Add a constant specifying the min size of the IOAPIC registers window.	2017-09-08 19:25:11 +00:00
apicvar.h	Add an ioapic_get_rid() function to obtain PCIe TLP requester-id for	2017-09-08 19:39:20 +00:00
apm_bios.h
bus_dma.h	Clean up MD pollution of bus_dma.h:	2017-07-01 05:35:29 +00:00
bus.h
busdma_impl.h	Clean up MD pollution of bus_dma.h:	2017-07-01 05:35:29 +00:00
cputypes.h
dump.h
elf.h	Add AT_EHDRFLAGS and AT_HWCAP on amd64.	2017-09-14 15:34:29 +00:00
endian.h
fdt.h
float.h
fpu.h
frame.h
init.h
legacyvar.h
mca.h
metadata.h
mptable.h
ofw_machdep.h
pci_cfgreg.h
psl.h
ptrace.h
pvclock.h
reg.h
segments.h
setjmp.h
sigframe.h
signal.h
specialreg.h	x86: Decode AMD "Extended Feature Extensions ID EBX" bits	2017-09-20 18:30:37 +00:00
stack.h
stdarg.h
sysarch.h
trap.h
ucontext.h
vdso.h
vmware.h
x86_smp.h	x86: make the arrays that depend on MAX_APIC_ID dynamic	2017-08-10 09:16:03 +00:00
x86_var.h	x86: Decode AMD "Extended Feature Extensions ID EBX" bits	2017-09-20 18:30:37 +00:00