e9b3f3045d
being switched out may hold a reservation. The stwcx. will clear the reservation. This is architecturally recommended. The scenario this addresses is as follows: 1. Thread 1 performs a lwarx and as such holds a reservation. 2. Thread 1 gets switched out (before doing the matching stwcx.) and thread 2 is switched in. 3. Thread 2 performs a stwcx. to the same reservation granule. This will succeed because the processor has the reservation even though thread 2 didn't do the lwarx. Note that on some processors the address given the stwcx. is not checked. On these processors the mere condition of having a reservation would cause the stwcx. to succeed, irrespective of whether the addresses are the same. The dummy stwcx. is especially important for those processors. |
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| .. | ||
| aim | ||
| booke | ||
| compile | ||
| conf | ||
| fpu | ||
| include | ||
| mpc85xx | ||
| ofw | ||
| powermac | ||
| powerpc | ||
| psim | ||