ba7319e909
DPAA2 is a hardware-level networking architecture found in some NXP SoCs which contain hardware blocks including Management Complex (MC, a command interface to manipulate DPAA2 objects), Wire Rate I/O processor (WRIOP, packets distribution, queuing, drop decisions), Queues and Buffers Manager (QBMan, Rx/Tx queues control, Rx buffer pools) and the others. The Management Complex runs NXP-supplied firmware which provides DPAA2 objects as an abstraction layer over those blocks to simplify an access to the underlying hardware. Each DPAA2 object has its own driver (to perform an initialization at least) and will be visible as a separate device in the device tree. Two new drivers (dpaa2_mc and dpaa2_rc) act like firmware buses in order to form a hierarchy of the DPAA2 devices: acpiX (or simplebusX) dpaa2_mcX dpaa2_rcX dpaa2_mcp0 ... dpaa2_mcpN dpaa2_bpX dpaa2_macX dpaa2_io0 ... dpaa2_ioM dpaa2_niX dpaa2_mc is suppossed to be a root of the hierarchy, comes in ACPI and FDT flavours and implements helper interfaces to allocate and assign bus resources, MSI and "managed" DPAA2 devices (NXP treats some of the objects as resources for the other DPAA2 objects to let them function properly). Almost all of the DPAA2 objects are assigned to the resource containers (dpaa2_rc) to implement isolation. The initial implementation focuses on the DPAA2 network interface to be operational. It is the most complex object in terms of dependencies which uses I/O objects to transmit/receive packets. Approved by: bz (mentor) Tested by: manu, bz MFC after: 3 months Differential Revision: https://reviews.freebsd.org/D36638
400 lines
10 KiB
C
400 lines
10 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright © 2021-2022 Dmitry Salychev
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* Copyright © 2022 Bjoern A. Zeeb
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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/*
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* The DPAA2 Management Complex (MC) Bus Driver (FDT-based).
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*
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* MC is a hardware resource manager which can be found in several NXP
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* SoCs (LX2160A, for example) and provides an access to the specialized
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* hardware objects used in network-oriented packet processing applications.
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/mutex.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/fdt/simplebus.h>
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#include "pcib_if.h"
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#include "pci_if.h"
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#include "ofw_bus_if.h"
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#include "dpaa2_mcp.h"
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#include "dpaa2_mc.h"
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#include "dpaa2_mc_if.h"
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struct dpaa2_mac_fdt_softc {
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uint32_t reg;
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phandle_t sfp;
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phandle_t pcs_handle;
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phandle_t phy_handle;
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char managed[64];
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char phy_conn_type[64];
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};
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#if 0
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ethernet@1 {
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compatible = "fsl,qoriq-mc-dpmac";
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reg = <0x1>;
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sfp = <0x14>;
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pcs-handle = <0x15>;
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phy-connection-type = "10gbase-r";
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managed = "in-band-status";
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};
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ethernet@3 {
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compatible = "fsl,qoriq-mc-dpmac";
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reg = <0x3>;
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phy-handle = <0x18>;
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phy-connection-type = "qsgmii";
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managed = "in-band-status";
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pcs-handle = <0x19>;
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};
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#endif
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static int
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dpaa2_mac_dev_probe(device_t dev)
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{
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phandle_t node;
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uint64_t reg;
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ssize_t s;
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node = ofw_bus_get_node(dev);
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if (!ofw_bus_node_is_compatible(node, "fsl,qoriq-mc-dpmac")) {
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device_printf(dev, "'%s' not fsl,qoriq-mc-dpmac compatible\n",
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ofw_bus_get_name(dev));
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return (ENXIO);
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}
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s = device_get_property(dev, "reg", ®, sizeof(reg),
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DEVICE_PROP_UINT32);
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if (s == -1) {
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device_printf(dev, "%s: '%s' has no 'reg' property, s %zd\n",
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__func__, ofw_bus_get_name(dev), s);
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return (ENXIO);
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}
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device_set_desc(dev, "DPAA2 MAC DEV");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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dpaa2_mac_fdt_attach(device_t dev)
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{
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struct dpaa2_mac_fdt_softc *sc;
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phandle_t node;
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ssize_t s;
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sc = device_get_softc(dev);
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node = ofw_bus_get_node(dev);
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s = device_get_property(dev, "reg", &sc->reg, sizeof(sc->reg),
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DEVICE_PROP_UINT32);
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if (s == -1) {
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device_printf(dev, "Cannot find 'reg' property: %zd\n", s);
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return (ENXIO);
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}
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s = device_get_property(dev, "managed", sc->managed,
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sizeof(sc->managed), DEVICE_PROP_ANY);
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s = device_get_property(dev, "phy-connection-type", sc->phy_conn_type,
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sizeof(sc->phy_conn_type), DEVICE_PROP_ANY);
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s = device_get_property(dev, "pcs-handle", &sc->pcs_handle,
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sizeof(sc->pcs_handle), DEVICE_PROP_HANDLE);
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/* 'sfp' and 'phy-handle' are optional but we need one or the other. */
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s = device_get_property(dev, "sfp", &sc->sfp, sizeof(sc->sfp),
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DEVICE_PROP_HANDLE);
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s = device_get_property(dev, "phy-handle", &sc->phy_handle,
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sizeof(sc->phy_handle), DEVICE_PROP_HANDLE);
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if (bootverbose)
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device_printf(dev, "node %#x '%s': reg %#x sfp %#x pcs-handle "
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"%#x phy-handle %#x managed '%s' phy-conn-type '%s'\n",
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node, ofw_bus_get_name(dev),
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sc->reg, sc->sfp, sc->pcs_handle, sc->phy_handle,
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sc->managed, sc->phy_conn_type);
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return (0);
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}
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static bool
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dpaa2_mac_fdt_match_id(device_t dev, uint32_t id)
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{
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struct dpaa2_mac_fdt_softc *sc;
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if (dev == NULL)
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return (false);
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sc = device_get_softc(dev);
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if (sc->reg == id)
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return (true);
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return (false);
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}
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static device_t
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dpaa2_mac_fdt_get_phy_dev(device_t dev)
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{
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struct dpaa2_mac_fdt_softc *sc;
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if (dev == NULL)
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return (NULL);
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sc = device_get_softc(dev);
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if (sc->phy_handle == 0 && sc->sfp == 0)
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return (NULL);
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#ifdef __not_yet__ /* No sff,sfp support yet. */
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if (sc->sfp != 0) {
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device_t xdev;
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xdev = OF_device_from_xref(OF_xref_from_node(sc->sfp));
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if (xdev != NULL)
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return (xdev);
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}
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#endif
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return (OF_device_from_xref(OF_xref_from_node(sc->phy_handle)));
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}
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static device_method_t dpaa2_mac_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, dpaa2_mac_dev_probe),
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DEVMETHOD(device_attach, dpaa2_mac_fdt_attach),
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DEVMETHOD(device_detach, bus_generic_detach),
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DEVMETHOD_END
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};
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DEFINE_CLASS_0(dpaa2_mac_fdt, dpaa2_mac_fdt_driver, dpaa2_mac_fdt_methods,
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sizeof(struct dpaa2_mac_fdt_softc));
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DRIVER_MODULE(dpaa2_mac_fdt, dpaa2_mc, dpaa2_mac_fdt_driver, 0, 0);
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MODULE_DEPEND(dpaa2_mac_fdt, memac_mdio_fdt, 1, 1, 1);
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/*
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* Device interface.
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*/
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static int
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dpaa2_mc_fdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (!ofw_bus_is_compatible(dev, "fsl,qoriq-mc"))
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return (ENXIO);
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device_set_desc(dev, "DPAA2 Management Complex");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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dpaa2_mc_fdt_probe_child(device_t bus, phandle_t child)
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{
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device_t childdev;
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/* make sure we do not aliready have a device. */
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childdev = ofw_bus_find_child_device_by_phandle(bus, child);
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if (childdev != NULL)
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return (0);
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childdev = simplebus_add_device(bus, child, 0, "dpaa2_mac_fdt", -1,
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NULL);
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if (childdev == NULL)
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return (ENXIO);
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return (device_probe_and_attach(childdev));
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}
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static int
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dpaa2_mc_fdt_attach(device_t dev)
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{
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struct dpaa2_mc_softc *sc;
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phandle_t node;
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phandle_t child;
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sc = device_get_softc(dev);
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sc->acpi_based = false;
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sc->ofw_node = ofw_bus_get_node(dev);
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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bus_generic_probe(dev);
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bus_enumerate_hinted_children(dev);
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/*
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* Attach the children represented in the device tree.
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*/
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/* fsl-mc -> dpamcs */
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node = OF_child(sc->ofw_node);
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simplebus_init(dev, node);
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/* Attach the dpmac children represented in the device tree. */
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child = ofw_bus_find_compatible(node, "fsl,qoriq-mc-dpmac");
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for (; child > 0; child = OF_peer(child)) {
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if (!ofw_bus_node_is_compatible(child, "fsl,qoriq-mc-dpmac"))
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continue;
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if (!OF_hasprop(child, "reg"))
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continue;
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if (!OF_hasprop(child, "pcs-handle"))
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continue;
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if (dpaa2_mc_fdt_probe_child(dev, child) != 0)
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continue;
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}
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return (dpaa2_mc_attach(dev));
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}
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/*
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* FDT compat layer.
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*/
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static device_t
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dpaa2_mc_fdt_find_dpaa2_mac_dev(device_t dev, uint32_t id)
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{
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int devcount, error, i, len;
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device_t *devlist, mdev;
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const char *mdevname;
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error = device_get_children(dev, &devlist, &devcount);
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if (error != 0)
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return (NULL);
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for (i = 0; i < devcount; i++) {
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mdev = devlist[i];
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mdevname = device_get_name(mdev);
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if (mdevname == NULL)
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continue;
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len = strlen(mdevname);
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if (strncmp("dpaa2_mac_fdt", mdevname, len) != 0)
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continue;
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if (!device_is_attached(mdev))
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continue;
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if (dpaa2_mac_fdt_match_id(mdev, id))
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return (mdev);
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}
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return (NULL);
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}
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static int
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dpaa2_mc_fdt_get_phy_dev(device_t dev, device_t *phy_dev, uint32_t id)
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{
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device_t mdev, pdev;
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mdev = dpaa2_mc_fdt_find_dpaa2_mac_dev(dev, id);
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if (mdev == NULL) {
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device_printf(dev, "%s: error finding dpmac device with id=%u\n",
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__func__, id);
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return (ENXIO);
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}
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pdev = dpaa2_mac_fdt_get_phy_dev(mdev);
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if (pdev == NULL) {
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device_printf(dev, "%s: error getting MDIO device for dpamc %s "
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"(id=%u)\n", __func__, device_get_nameunit(mdev), id);
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return (ENXIO);
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}
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if (phy_dev != NULL)
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*phy_dev = pdev;
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if (bootverbose)
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device_printf(dev, "dpmac_id %u mdev %p (%s) pdev %p (%s)\n",
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id, mdev, device_get_nameunit(mdev),
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pdev, device_get_nameunit(pdev));
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return (0);
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}
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static const struct ofw_bus_devinfo *
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dpaa2_mc_simplebus_get_devinfo(device_t bus, device_t child)
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{
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return (OFW_BUS_GET_DEVINFO(device_get_parent(bus), child));
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}
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static device_method_t dpaa2_mc_fdt_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, dpaa2_mc_fdt_probe),
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DEVMETHOD(device_attach, dpaa2_mc_fdt_attach),
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DEVMETHOD(device_detach, dpaa2_mc_detach),
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/* Bus interface */
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DEVMETHOD(bus_alloc_resource, dpaa2_mc_alloc_resource),
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DEVMETHOD(bus_adjust_resource, dpaa2_mc_adjust_resource),
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DEVMETHOD(bus_release_resource, dpaa2_mc_release_resource),
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DEVMETHOD(bus_activate_resource, dpaa2_mc_activate_resource),
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DEVMETHOD(bus_deactivate_resource, dpaa2_mc_deactivate_resource),
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DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
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DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
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/* Pseudo-PCIB interface */
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DEVMETHOD(pcib_alloc_msi, dpaa2_mc_alloc_msi),
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DEVMETHOD(pcib_release_msi, dpaa2_mc_release_msi),
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DEVMETHOD(pcib_map_msi, dpaa2_mc_map_msi),
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DEVMETHOD(pcib_get_id, dpaa2_mc_get_id),
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/* DPAA2 MC bus interface */
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DEVMETHOD(dpaa2_mc_manage_dev, dpaa2_mc_manage_dev),
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DEVMETHOD(dpaa2_mc_get_free_dev,dpaa2_mc_get_free_dev),
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DEVMETHOD(dpaa2_mc_get_dev, dpaa2_mc_get_dev),
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DEVMETHOD(dpaa2_mc_get_shared_dev, dpaa2_mc_get_shared_dev),
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DEVMETHOD(dpaa2_mc_reserve_dev, dpaa2_mc_reserve_dev),
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DEVMETHOD(dpaa2_mc_release_dev, dpaa2_mc_release_dev),
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DEVMETHOD(dpaa2_mc_get_phy_dev, dpaa2_mc_fdt_get_phy_dev),
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/* OFW/simplebus */
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DEVMETHOD(ofw_bus_get_devinfo, dpaa2_mc_simplebus_get_devinfo),
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DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat),
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DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model),
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DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name),
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DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node),
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DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(dpaa2_mc, dpaa2_mc_fdt_driver, dpaa2_mc_fdt_methods,
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sizeof(struct dpaa2_mc_softc), dpaa2_mc_driver);
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DRIVER_MODULE(dpaa2_mc, simplebus, dpaa2_mc_fdt_driver, 0, 0);
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