6d3b2a3cad
- Move prototypes for sparc64-specific helper functions from bus.h to bus_private.h - Move the method pointers from struct bus_dma_tag into a separate structure; this saves some memory, and allows to use a single method table for each busdma backend, so that the bus drivers need no longer be changed if the methods tables need to be modified. - Remove the hierarchical tag method lookup. It was never really useful, since the layering is fixed, and the current implementations do not need to call into parent implementations anyway. Each tag inherits its method table pointer and cookie from the parent (or the root tag) now, and the method wrapper macros directly use the method table of the tag. - Add a method table to the non-IOMMU backend, remove unnecessary prototypes, remove the extra parent tag argument. - Rename sparc64_dmamem_alloc_map() and sparc64_dmamem_free_map() to sparc64_dma_alloc_map() and sparc64_dma_free_map(), move them to a better place and use them for all map allocations and deallocations. - Add a method table to the iommu backend, and staticize functions, remove the extra parent tag argument. - Change the psycho and sbus drivers to just set cookie and method table in the root tag. - Miscellaneous small fixes.
87 lines
3.4 KiB
C
87 lines
3.4 KiB
C
/*
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* Copyright (c) 1999 Matthew R. Green
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: NetBSD: iommuvar.h,v 1.9 2001/07/20 00:07:13 eeh Exp
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_IOMMUVAR_H_
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#define _MACHINE_IOMMUVAR_H_
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#define IO_PAGE_SIZE PAGE_SIZE_8K
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#define IO_PAGE_MASK PAGE_MASK_8K
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#define IO_PAGE_SHIFT PAGE_SHIFT_8K
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#define round_io_page(x) round_page(x)
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#define trunc_io_page(x) trunc_page(x)
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/*
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* per-IOMMU state
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*/
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struct iommu_state {
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int is_tsbsize; /* 0 = 8K, ... */
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u_int64_t is_dvmabase;
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int64_t is_cr; /* IOMMU control register value */
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vm_paddr_t is_flushpa[2];
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volatile int64_t *is_flushva[2];
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/*
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* When a flush is completed, 64 bytes will be stored at the given
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* location, the first double word being 1, to indicate completion.
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* The lower 6 address bits are ignored, so the addresses need to be
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* suitably aligned; over-allocate a large enough margin to be able
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* to adjust it.
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* Two such buffers are needed.
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* Needs to be volatile or egcs optimizes away loads.
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*/
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volatile char is_flush[STRBUF_FLUSHSYNC_NBYTES * 3 - 1];
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/* copies of our parents state, to allow us to be self contained */
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bus_space_tag_t is_bustag; /* our bus tag */
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bus_space_handle_t is_bushandle;
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bus_addr_t is_iommu; /* IOMMU registers */
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bus_addr_t is_sb[2]; /* streaming buffer */
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bus_addr_t is_dtag; /* tag diagnostics access */
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bus_addr_t is_ddram; /* data ram diag. access */
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bus_addr_t is_dqueue; /* LRU queue diag. access */
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bus_addr_t is_dva; /* VA diag. register */
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bus_addr_t is_dtcmp; /* tag compare diag. access */
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STAILQ_ENTRY(iommu_state) is_link;
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};
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/* interfaces for PCI/SBUS code */
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void iommu_init(char *, struct iommu_state *, int, u_int32_t, int);
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void iommu_reset(struct iommu_state *);
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void iommu_enter(struct iommu_state *, vm_offset_t, vm_paddr_t, int);
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void iommu_remove(struct iommu_state *, vm_offset_t, size_t);
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void iommu_decode_fault(struct iommu_state *, vm_offset_t);
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extern struct bus_dma_methods iommu_dma_methods;
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#endif /* !_MACHINE_IOMMUVAR_H_ */
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