378 lines
15 KiB
C
378 lines
15 KiB
C
/*-
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* Copyright (c) 2000, 2001 Michael Smith
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* Copyright (c) 2000 BSDi
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/********************************************************************************
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********************************************************************************
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Driver Parameter Definitions
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********************************************************************************
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********************************************************************************/
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/*
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* The firmware interface allows for a 16-bit command identifier. A lookup
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* table this size (256k) would be too expensive, so we cap ourselves at a
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* reasonable limit.
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*/
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#define MLY_MAX_COMMANDS 256 /* max commands per controller */
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/*
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* The firmware interface allows for a 16-bit s/g list length. We limit
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* ourselves to a reasonable maximum and ensure alignment.
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*/
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#define MLY_MAX_SGENTRIES 64 /* max S/G entries, limit 65535 */
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/*
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* The interval at which we poke the controller for status updates (in seconds).
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*/
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#define MLY_PERIODIC_INTERVAL 1
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/********************************************************************************
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********************************************************************************
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Cross-version Compatibility
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********************************************************************************
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********************************************************************************/
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# include <sys/taskqueue.h>
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#ifndef INTR_ENTROPY
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# define INTR_ENTROPY 0
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#endif
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/********************************************************************************
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********************************************************************************
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Driver Variable Definitions
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********************************************************************************
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********************************************************************************/
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/*
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* Debugging levels:
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* 0 - quiet, only emit warnings
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* 1 - noisy, emit major function points and things done
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* 2 - extremely noisy, emit trace items in loops, etc.
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*/
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#ifdef MLY_DEBUG
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# define debug(level, fmt, args...) do { if (level <= MLY_DEBUG) printf("%s: " fmt "\n", __func__ , ##args); } while(0)
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# define debug_called(level) do { if (level <= MLY_DEBUG) printf("%s: called\n", __func__); } while(0)
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# define debug_struct(s) printf(" SIZE %s: %d\n", #s, sizeof(struct s))
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# define debug_union(s) printf(" SIZE %s: %d\n", #s, sizeof(union s))
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# define debug_field(s, f) printf(" OFFSET %s.%s: %d\n", #s, #f, ((int)&(((struct s *)0)->f)))
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extern void mly_printstate0(void);
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extern struct mly_softc *mly_softc0;
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#else
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# define debug(level, fmt, args...)
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# define debug_called(level)
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# define debug_struct(s)
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#endif
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#define mly_printf(sc, fmt, args...) device_printf(sc->mly_dev, fmt , ##args)
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/*
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* Per-device structure, used to save persistent state on devices.
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*
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* Note that this isn't really Bus/Target/Lun since we don't support
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* lun != 0 at this time.
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*/
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struct mly_btl {
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int mb_flags;
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#define MLY_BTL_PHYSICAL (1<<0) /* physical device */
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#define MLY_BTL_LOGICAL (1<<1) /* logical device */
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#define MLY_BTL_PROTECTED (1<<2) /* device is protected - I/O not allowed */
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#define MLY_BTL_RESCAN (1<<3) /* device needs to be rescanned */
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char mb_name[16]; /* peripheral attached to this device */
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int mb_state; /* see 8.1 */
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int mb_type; /* see 8.2 */
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/* physical devices only */
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int mb_speed; /* interface transfer rate */
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int mb_width; /* interface width */
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};
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/*
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* Per-command control structure.
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*/
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struct mly_command {
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TAILQ_ENTRY(mly_command) mc_link; /* list linkage */
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struct mly_softc *mc_sc; /* controller that owns us */
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u_int16_t mc_slot; /* command slot we occupy */
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int mc_flags;
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#define MLY_CMD_BUSY (1<<0) /* command is being run, or ready to run, or not completed */
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#define MLY_CMD_COMPLETE (1<<1) /* command has been completed */
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#define MLY_CMD_MAPPED (1<<3) /* command has had its data mapped */
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#define MLY_CMD_DATAIN (1<<4) /* data moves controller->system */
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#define MLY_CMD_DATAOUT (1<<5) /* data moves system->controller */
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u_int16_t mc_status; /* command completion status */
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u_int8_t mc_sense; /* sense data length */
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int32_t mc_resid; /* I/O residual count */
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union mly_command_packet *mc_packet; /* our controller command */
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u_int64_t mc_packetphys; /* physical address of the mapped packet */
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void *mc_data; /* data buffer */
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size_t mc_length; /* data length */
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bus_dmamap_t mc_datamap; /* DMA map for data */
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void (* mc_complete)(struct mly_command *mc); /* completion handler */
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void *mc_private; /* caller-private data */
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int mc_timestamp;
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};
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/*
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* Command slot regulation.
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*
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* We can't use slot 0 due to the memory mailbox implementation.
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*/
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#define MLY_SLOT_START 1
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#define MLY_SLOT_MAX (MLY_SLOT_START + MLY_MAX_COMMANDS)
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/*
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* Per-controller structure.
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*/
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struct mly_softc {
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/* bus connections */
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device_t mly_dev;
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struct cdev *mly_dev_t;
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struct resource *mly_regs_resource; /* register interface window */
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int mly_regs_rid; /* resource ID */
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bus_space_handle_t mly_bhandle; /* bus space handle */
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bus_space_tag_t mly_btag; /* bus space tag */
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bus_dma_tag_t mly_parent_dmat; /* parent DMA tag */
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bus_dma_tag_t mly_buffer_dmat; /* data buffer/command DMA tag */
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struct resource *mly_irq; /* interrupt */
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int mly_irq_rid;
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void *mly_intr; /* interrupt handle */
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/* scatter/gather lists and their controller-visible mappings */
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struct mly_sg_entry *mly_sg_table; /* s/g lists */
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u_int32_t mly_sg_busaddr; /* s/g table base address in bus space */
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bus_dma_tag_t mly_sg_dmat; /* s/g buffer DMA tag */
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bus_dmamap_t mly_sg_dmamap; /* map for s/g buffers */
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/* controller hardware interface */
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int mly_hwif;
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#define MLY_HWIF_I960RX 0
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#define MLY_HWIF_STRONGARM 1
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u_int8_t mly_doorbell_true; /* xor map to make hardware doorbell 'true' bits into 1s */
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u_int8_t mly_command_mailbox; /* register offsets */
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u_int8_t mly_status_mailbox;
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u_int8_t mly_idbr;
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u_int8_t mly_odbr;
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u_int8_t mly_error_status;
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u_int8_t mly_interrupt_status;
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u_int8_t mly_interrupt_mask;
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struct mly_mmbox *mly_mmbox; /* kernel-space address of memory mailbox */
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u_int64_t mly_mmbox_busaddr; /* bus-space address of memory mailbox */
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bus_dma_tag_t mly_mmbox_dmat; /* memory mailbox DMA tag */
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bus_dmamap_t mly_mmbox_dmamap; /* memory mailbox DMA map */
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u_int32_t mly_mmbox_command_index; /* next index to use */
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u_int32_t mly_mmbox_status_index; /* index we next expect status at */
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/* controller features, limits and status */
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int mly_state;
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#define MLY_STATE_OPEN (1<<1)
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#define MLY_STATE_INTERRUPTS_ON (1<<2)
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#define MLY_STATE_MMBOX_ACTIVE (1<<3)
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#define MLY_STATE_CAM_FROZEN (1<<4)
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struct mly_ioctl_getcontrollerinfo *mly_controllerinfo;
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struct mly_param_controller *mly_controllerparam;
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struct mly_btl mly_btl[MLY_MAX_CHANNELS][MLY_MAX_TARGETS];
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/* command management */
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struct mly_command mly_command[MLY_MAX_COMMANDS]; /* commands */
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union mly_command_packet *mly_packet; /* command packets */
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bus_dma_tag_t mly_packet_dmat; /* packet DMA tag */
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bus_dmamap_t mly_packetmap; /* packet DMA map */
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u_int64_t mly_packetphys; /* packet array base address */
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TAILQ_HEAD(,mly_command) mly_free; /* commands available for reuse */
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TAILQ_HEAD(,mly_command) mly_busy;
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TAILQ_HEAD(,mly_command) mly_complete; /* commands which have been returned by the controller */
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struct mly_qstat mly_qstat[MLYQ_COUNT]; /* queue statistics */
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/* health monitoring */
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u_int32_t mly_event_change; /* event status change indicator */
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u_int32_t mly_event_counter; /* next event for which we anticpiate status */
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u_int32_t mly_event_waiting; /* next event the controller will post status for */
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struct callout_handle mly_periodic; /* periodic event handling */
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/* CAM connection */
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struct cam_devq *mly_cam_devq; /* CAM device queue */
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struct cam_sim *mly_cam_sim[MLY_MAX_CHANNELS]; /* CAM SIMs */
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struct cam_path *mly_cam_path; /* rescan path */
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int mly_cam_channels; /* total channel count */
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/* command-completion task */
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struct task mly_task_complete; /* deferred-completion task */
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int mly_qfrzn_cnt; /* Track simq freezes */
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};
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/*
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* Register access helpers.
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*/
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#define MLY_SET_REG(sc, reg, val) bus_space_write_1(sc->mly_btag, sc->mly_bhandle, reg, val)
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#define MLY_GET_REG(sc, reg) bus_space_read_1 (sc->mly_btag, sc->mly_bhandle, reg)
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#define MLY_GET_REG2(sc, reg) bus_space_read_2 (sc->mly_btag, sc->mly_bhandle, reg)
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#define MLY_GET_REG4(sc, reg) bus_space_read_4 (sc->mly_btag, sc->mly_bhandle, reg)
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#define MLY_SET_MBOX(sc, mbox, ptr) \
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do { \
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bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox, *((u_int32_t *)ptr)); \
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bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 4, *((u_int32_t *)ptr + 1)); \
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bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 8, *((u_int32_t *)ptr + 2)); \
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bus_space_write_4(sc->mly_btag, sc->mly_bhandle, mbox + 12, *((u_int32_t *)ptr + 3)); \
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} while(0);
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#define MLY_GET_MBOX(sc, mbox, ptr) \
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do { \
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*((u_int32_t *)ptr) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox); \
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*((u_int32_t *)ptr + 1) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 4); \
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*((u_int32_t *)ptr + 2) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 8); \
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*((u_int32_t *)ptr + 3) = bus_space_read_4(sc->mly_btag, sc->mly_bhandle, mbox + 12); \
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} while(0);
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#define MLY_IDBR_TRUE(sc, mask) \
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((((MLY_GET_REG((sc), (sc)->mly_idbr)) ^ (sc)->mly_doorbell_true) & (mask)) == (mask))
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#define MLY_ODBR_TRUE(sc, mask) \
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((MLY_GET_REG((sc), (sc)->mly_odbr) & (mask)) == (mask))
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#define MLY_ERROR_VALID(sc) \
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((((MLY_GET_REG((sc), (sc)->mly_error_status)) ^ (sc)->mly_doorbell_true) & (MLY_MSG_EMPTY)) == 0)
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#define MLY_MASK_INTERRUPTS(sc) \
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do { \
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MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_DISABLE); \
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sc->mly_state &= ~MLY_STATE_INTERRUPTS_ON; \
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} while(0);
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#define MLY_UNMASK_INTERRUPTS(sc) \
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do { \
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MLY_SET_REG((sc), (sc)->mly_interrupt_mask, MLY_INTERRUPT_MASK_ENABLE); \
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sc->mly_state |= MLY_STATE_INTERRUPTS_ON; \
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} while(0);
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/*
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* Bus/target/logical ID-related macros.
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*/
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#define MLY_LOGDEV_ID(sc, bus, target) (((bus) - (sc)->mly_controllerinfo->physical_channels_present) * \
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MLY_MAX_TARGETS + (target))
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#define MLY_LOGDEV_BUS(sc, logdev) (((logdev) / MLY_MAX_TARGETS) + \
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(sc)->mly_controllerinfo->physical_channels_present)
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#define MLY_LOGDEV_TARGET(sc, logdev) ((logdev) % MLY_MAX_TARGETS)
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#define MLY_BUS_IS_VIRTUAL(sc, bus) ((bus) >= (sc)->mly_controllerinfo->physical_channels_present)
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#define MLY_BUS_IS_VALID(sc, bus) (((bus) < (sc)->mly_cam_channels) && ((sc)->mly_cam_sim[(bus)] != NULL))
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/********************************************************************************
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* Queue primitives
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*/
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#define MLYQ_ADD(sc, qname) \
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do { \
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struct mly_qstat *qs = &(sc)->mly_qstat[qname]; \
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\
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qs->q_length++; \
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if (qs->q_length > qs->q_max) \
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qs->q_max = qs->q_length; \
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} while(0)
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#define MLYQ_REMOVE(sc, qname) (sc)->mly_qstat[qname].q_length--
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#define MLYQ_INIT(sc, qname) \
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do { \
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sc->mly_qstat[qname].q_length = 0; \
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sc->mly_qstat[qname].q_max = 0; \
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} while(0)
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#define MLYQ_COMMAND_QUEUE(name, index) \
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static __inline void \
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mly_initq_ ## name (struct mly_softc *sc) \
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{ \
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TAILQ_INIT(&sc->mly_ ## name); \
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MLYQ_INIT(sc, index); \
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} \
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static __inline void \
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mly_enqueue_ ## name (struct mly_command *mc) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_INSERT_TAIL(&mc->mc_sc->mly_ ## name, mc, mc_link); \
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MLYQ_ADD(mc->mc_sc, index); \
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splx(s); \
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} \
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static __inline void \
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mly_requeue_ ## name (struct mly_command *mc) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_INSERT_HEAD(&mc->mc_sc->mly_ ## name, mc, mc_link); \
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MLYQ_ADD(mc->mc_sc, index); \
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splx(s); \
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} \
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static __inline struct mly_command * \
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mly_dequeue_ ## name (struct mly_softc *sc) \
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{ \
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struct mly_command *mc; \
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int s; \
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\
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s = splcam(); \
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if ((mc = TAILQ_FIRST(&sc->mly_ ## name)) != NULL) { \
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TAILQ_REMOVE(&sc->mly_ ## name, mc, mc_link); \
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MLYQ_REMOVE(sc, index); \
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} \
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splx(s); \
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return(mc); \
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} \
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static __inline void \
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mly_remove_ ## name (struct mly_command *mc) \
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{ \
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int s; \
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\
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s = splcam(); \
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TAILQ_REMOVE(&mc->mc_sc->mly_ ## name, mc, mc_link); \
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MLYQ_REMOVE(mc->mc_sc, index); \
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splx(s); \
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} \
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struct hack
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MLYQ_COMMAND_QUEUE(free, MLYQ_FREE);
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MLYQ_COMMAND_QUEUE(busy, MLYQ_BUSY);
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MLYQ_COMMAND_QUEUE(complete, MLYQ_COMPLETE);
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/********************************************************************************
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* space-fill a character string
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*/
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static __inline void
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padstr(char *targ, char *src, int len)
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{
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while (len-- > 0) {
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if (*src != 0) {
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*targ++ = *src++;
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} else {
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*targ++ = ' ';
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}
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}
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}
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