774 lines
20 KiB
C
774 lines
20 KiB
C
/*
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* Copyright (c) 1999, 2000 Dave Boyce. All rights reserved.
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*
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* Copyright (c) 2000, 2001 Hellmuth Michaelis. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*---------------------------------------------------------------------------
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*
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* i4b_iwic - isdn4bsd Winbond W6692 driver
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* ----------------------------------------
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*
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* $FreeBSD$
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*
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* last edit-date: [Tue Jan 16 13:21:24 2001]
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*
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*---------------------------------------------------------------------------*/
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#include "iwic.h"
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#include "opt_i4b.h"
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#include "pci.h"
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#if (NIWIC > 0) && (NPCI > 0)
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/mbuf.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <machine/i4b_debug.h>
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#include <machine/i4b_ioctl.h>
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#include <machine/i4b_trace.h>
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#include <i4b/layer1/i4b_l1.h>
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#include <i4b/layer1/iwic/i4b_iwic.h>
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#include <i4b/layer1/iwic/i4b_w6692.h>
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#include <i4b/include/i4b_global.h>
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#include <i4b/include/i4b_mbuf.h>
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static void iwic_bchan_init(struct iwic_softc *sc, int chan_no, int activate);
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/*---------------------------------------------------------------------------*
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* B-channel interrupt handler
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*---------------------------------------------------------------------------*/
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void
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iwic_bchan_xirq(struct iwic_softc *sc, int chan_no)
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{
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int irq_stat;
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struct iwic_bchan *chan;
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int cmd = 0;
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int activity = 0;
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chan = &sc->sc_bchan[chan_no];
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irq_stat = IWIC_READ(sc, chan->offset + B_EXIR);
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NDBGL1(L1_H_IRQ, "irq_stat = 0x%x", irq_stat);
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if((irq_stat & (B_EXIR_RMR | B_EXIR_RME | B_EXIR_RDOV | B_EXIR_XFR | B_EXIR_XDUN)) == 0)
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{
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NDBGL1(L1_H_XFRERR, "spurious IRQ!");
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return;
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}
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if (irq_stat & B_EXIR_RDOV)
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{
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NDBGL1(L1_H_XFRERR, "iwic%d: EXIR B-channel Receive Data Overflow", sc->sc_unit);
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}
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if (irq_stat & B_EXIR_XDUN)
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{
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NDBGL1(L1_H_XFRERR, "iwic%d: EXIR B-channel Transmit Data Underrun", sc->sc_unit);
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cmd |= (B_CMDR_XRST); /*XXX must retransmit frame ! */
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}
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/* RX message end interrupt */
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if(irq_stat & B_EXIR_RME)
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{
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int error;
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NDBGL1(L1_H_IRQ, "B_EXIR_RME");
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error = (IWIC_READ(sc,chan->offset+B_STAR) &
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(B_STAR_RDOV | B_STAR_CRCE | B_STAR_RMB));
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if(error)
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{
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if(error & B_STAR_RDOV)
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NDBGL1(L1_H_XFRERR, "iwic%d: B-channel Receive Data Overflow", sc->sc_unit);
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if(error & B_STAR_CRCE)
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NDBGL1(L1_H_XFRERR, "iwic%d: B-channel CRC Error", sc->sc_unit);
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if(error & B_STAR_RMB)
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NDBGL1(L1_H_XFRERR, "iwic%d: B-channel Receive Message Aborted", sc->sc_unit);
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}
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/* all error conditions checked, now decide and take action */
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if(error == 0)
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{
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register int fifo_data_len;
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fifo_data_len = ((IWIC_READ(sc,chan->offset+B_RBCL)) &
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((IWIC_BCHAN_FIFO_LEN)-1));
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if(fifo_data_len == 0)
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fifo_data_len = IWIC_BCHAN_FIFO_LEN;
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if(chan->in_mbuf == NULL)
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{
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if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
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panic("L1 iwic_bchan_irq: RME, cannot allocate mbuf!\n");
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chan->in_cbptr = chan->in_mbuf->m_data;
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chan->in_len = 0;
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}
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if((chan->in_len + fifo_data_len) <= BCH_MAX_DATALEN)
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{
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/* read data from fifo */
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NDBGL1(L1_H_IRQ, "B_EXIR_RME, rd fifo, len = %d", fifo_data_len);
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IWIC_RDBFIFO(sc, chan, chan->in_cbptr, fifo_data_len);
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cmd |= (B_CMDR_RACK | B_CMDR_RACT);
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IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
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cmd = 0;
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chan->in_len += fifo_data_len;
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chan->rxcount += fifo_data_len;
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/* setup mbuf data length */
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chan->in_mbuf->m_len = chan->in_len;
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chan->in_mbuf->m_pkthdr.len = chan->in_len;
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if(sc->sc_trace & TRACE_B_RX)
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{
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i4b_trace_hdr_t hdr;
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hdr.unit = L0IWICUNIT(sc->sc_unit);
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hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
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hdr.dir = FROM_NT;
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hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
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MICROTIME(hdr.time);
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i4b_l1_trace_ind(&hdr, chan->in_mbuf->m_len, chan->in_mbuf->m_data);
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}
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(*chan->iwic_drvr_linktab->bch_rx_data_ready)(chan->iwic_drvr_linktab->unit);
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activity = ACT_RX;
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/* mark buffer ptr as unused */
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chan->in_mbuf = NULL;
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chan->in_cbptr = NULL;
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chan->in_len = 0;
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}
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else
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{
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NDBGL1(L1_H_XFRERR, "RAWHDLC rx buffer overflow in RME, in_len=%d, fifolen=%d", chan->in_len, fifo_data_len);
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chan->in_cbptr = chan->in_mbuf->m_data;
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chan->in_len = 0;
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cmd |= (B_CMDR_RRST | B_CMDR_RACK);
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}
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}
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else
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{
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if (chan->in_mbuf != NULL)
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{
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i4b_Bfreembuf(chan->in_mbuf);
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chan->in_mbuf = NULL;
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chan->in_cbptr = NULL;
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chan->in_len = 0;
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}
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cmd |= (B_CMDR_RRST | B_CMDR_RACK);
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}
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}
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/* RX fifo full interrupt */
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if(irq_stat & B_EXIR_RMR)
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{
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NDBGL1(L1_H_IRQ, "B_EXIR_RMR");
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if(chan->in_mbuf == NULL)
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{
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if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
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panic("L1 iwic_bchan_irq: RMR, cannot allocate mbuf!\n");
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chan->in_cbptr = chan->in_mbuf->m_data;
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chan->in_len = 0;
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}
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chan->rxcount += IWIC_BCHAN_FIFO_LEN;
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if((chan->in_len + IWIC_BCHAN_FIFO_LEN) <= BCH_MAX_DATALEN)
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{
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/* read data from fifo */
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NDBGL1(L1_H_IRQ, "B_EXIR_RMR, rd fifo, len = max (64)");
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IWIC_RDBFIFO(sc, chan, chan->in_cbptr, IWIC_BCHAN_FIFO_LEN);
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chan->in_cbptr += IWIC_BCHAN_FIFO_LEN;
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chan->in_len += IWIC_BCHAN_FIFO_LEN;
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}
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else
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{
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if(chan->bprot == BPROT_NONE)
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{
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/* setup mbuf data length */
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chan->in_mbuf->m_len = chan->in_len;
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chan->in_mbuf->m_pkthdr.len = chan->in_len;
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if(sc->sc_trace & TRACE_B_RX)
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{
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i4b_trace_hdr_t hdr;
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hdr.unit = L0IWICUNIT(sc->sc_unit);
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hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
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hdr.dir = FROM_NT;
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hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
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MICROTIME(hdr.time);
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i4b_l1_trace_ind(&hdr, chan->in_mbuf->m_len, chan->in_mbuf->m_data);
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}
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/* silence detection */
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if(!(i4b_l1_bchan_tel_silence(chan->in_mbuf->m_data, chan->in_mbuf->m_len)))
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activity = ACT_RX;
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#if defined (__FreeBSD__) && __FreeBSD__ > 4
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(void) IF_HANDOFF(&chan->rx_queue, chan->in_mbuf, NULL);
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#else
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if(!(IF_QFULL(&chan->rx_queue)))
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{
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IF_ENQUEUE(&chan->rx_queue, chan->in_mbuf);
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}
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else
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{
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i4b_Bfreembuf(chan->in_mbuf);
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}
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#endif
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/* signal upper driver that data is available */
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(*chan->iwic_drvr_linktab->bch_rx_data_ready)(chan->iwic_drvr_linktab->unit);
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/* alloc new buffer */
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if((chan->in_mbuf = i4b_Bgetmbuf(BCH_MAX_DATALEN)) == NULL)
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panic("L1 iwic_bchan_irq: RMR, cannot allocate new mbuf!\n");
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/* setup new data ptr */
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chan->in_cbptr = chan->in_mbuf->m_data;
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/* read data from fifo */
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NDBGL1(L1_H_IRQ, "B_EXIR_RMR, rd fifo1, len = max (64)");
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IWIC_RDBFIFO(sc, chan, chan->in_cbptr, IWIC_BCHAN_FIFO_LEN);
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chan->in_cbptr += IWIC_BCHAN_FIFO_LEN;
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chan->in_len = IWIC_BCHAN_FIFO_LEN;
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chan->rxcount += IWIC_BCHAN_FIFO_LEN;
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}
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else
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{
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NDBGL1(L1_H_XFRERR, "RAWHDLC rx buffer overflow in RPF, in_len=%d", chan->in_len);
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chan->in_cbptr = chan->in_mbuf->m_data;
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chan->in_len = 0;
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cmd |= (B_CMDR_RRST | B_CMDR_RACK);
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}
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}
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/* command to release fifo space */
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cmd |= B_CMDR_RACK;
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}
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/* TX interrupt */
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if (irq_stat & B_EXIR_XFR)
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{
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/* transmit fifo empty, new data can be written to fifo */
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int activity = -1;
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int len;
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int nextlen;
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NDBGL1(L1_H_IRQ, "B_EXIR_XFR");
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if(chan->out_mbuf_cur == NULL) /* last frame is transmitted */
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{
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IF_DEQUEUE(&chan->tx_queue, chan->out_mbuf_head);
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if(chan->out_mbuf_head == NULL)
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{
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chan->state &= ~ST_TX_ACTIVE;
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(*chan->iwic_drvr_linktab->bch_tx_queue_empty)(chan->iwic_drvr_linktab->unit);
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}
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else
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{
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chan->state |= ST_TX_ACTIVE;
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chan->out_mbuf_cur = chan->out_mbuf_head;
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chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
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chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
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if(sc->sc_trace & TRACE_B_TX)
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{
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i4b_trace_hdr_t hdr;
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hdr.unit = L0IWICUNIT(sc->sc_unit);
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hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
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hdr.dir = FROM_TE;
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hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
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MICROTIME(hdr.time);
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i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
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}
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if(chan->bprot == BPROT_NONE)
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{
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if(!(i4b_l1_bchan_tel_silence(chan->out_mbuf_cur->m_data, chan->out_mbuf_cur->m_len)))
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activity = ACT_TX;
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}
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else
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{
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activity = ACT_TX;
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}
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}
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}
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len = 0;
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while(chan->out_mbuf_cur && len != IWIC_BCHAN_FIFO_LEN)
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{
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nextlen = min(chan->out_mbuf_cur_len, IWIC_BCHAN_FIFO_LEN - len);
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NDBGL1(L1_H_IRQ, "B_EXIR_XFR, wr fifo, len = %d", nextlen);
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IWIC_WRBFIFO(sc, chan, chan->out_mbuf_cur_ptr, nextlen);
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cmd |= B_CMDR_XMS;
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len += nextlen;
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chan->txcount += nextlen;
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chan->out_mbuf_cur_ptr += nextlen;
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chan->out_mbuf_cur_len -= nextlen;
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if(chan->out_mbuf_cur_len == 0)
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{
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if((chan->out_mbuf_cur = chan->out_mbuf_cur->m_next) != NULL)
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{
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chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
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chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
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if(sc->sc_trace & TRACE_B_TX)
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{
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i4b_trace_hdr_t hdr;
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hdr.unit = L0IWICUNIT(sc->sc_unit);
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hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
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hdr.dir = FROM_TE;
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hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
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MICROTIME(hdr.time);
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i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
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}
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}
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else
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{
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if (chan->bprot != BPROT_NONE)
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cmd |= B_CMDR_XME;
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i4b_Bfreembuf(chan->out_mbuf_head);
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chan->out_mbuf_head = NULL;
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}
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}
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}
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}
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if(cmd)
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{
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cmd |= B_CMDR_RACT;
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IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
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}
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}
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/*---------------------------------------------------------------------------*
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* initialize one B channels rx/tx data structures
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*---------------------------------------------------------------------------*/
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void
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iwic_bchannel_setup(int unit, int chan_no, int bprot, int activate)
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{
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struct iwic_softc *sc = &iwic_sc[unit];
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struct iwic_bchan *chan = &sc->sc_bchan[chan_no];
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int s = SPLI4B();
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NDBGL1(L1_BCHAN, "unit %d, chan %d, bprot %d, activate %d", unit, chan_no, bprot, activate);
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/* general part */
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chan->bprot = bprot; /* B channel protocol */
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chan->state = ST_IDLE; /* B channel state */
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if(activate == 0)
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{
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/* deactivation */
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iwic_bchan_init(sc, chan_no, activate);
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}
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/* receiver part */
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chan->rx_queue.ifq_maxlen = IFQ_MAXLEN;
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#if defined (__FreeBSD__) && __FreeBSD__ > 4
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if(!mtx_initialized(&chan->rx_queue.ifq_mtx))
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mtx_init(&chan->rx_queue.ifq_mtx, "i4b_iwic_rx", MTX_DEF);
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#endif
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i4b_Bcleanifq(&chan->rx_queue); /* clean rx queue */
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chan->rxcount = 0; /* reset rx counter */
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i4b_Bfreembuf(chan->in_mbuf); /* clean rx mbuf */
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chan->in_mbuf = NULL; /* reset mbuf ptr */
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chan->in_cbptr = NULL; /* reset mbuf curr ptr */
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chan->in_len = 0; /* reset mbuf data len */
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/* transmitter part */
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chan->tx_queue.ifq_maxlen = IFQ_MAXLEN;
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#if defined (__FreeBSD__) && __FreeBSD__ > 4
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if(!mtx_initialized(&chan->tx_queue.ifq_mtx))
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mtx_init(&chan->tx_queue.ifq_mtx, "i4b_iwic_tx", MTX_DEF);
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#endif
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i4b_Bcleanifq(&chan->tx_queue); /* clean tx queue */
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chan->txcount = 0; /* reset tx counter */
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i4b_Bfreembuf(chan->out_mbuf_head); /* clean tx mbuf */
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chan->out_mbuf_head = NULL; /* reset head mbuf ptr */
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chan->out_mbuf_cur = NULL; /* reset current mbuf ptr */
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chan->out_mbuf_cur_ptr = NULL; /* reset current mbuf data ptr */
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chan->out_mbuf_cur_len = 0; /* reset current mbuf data cnt */
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if(activate != 0)
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|
{
|
|
/* activation */
|
|
iwic_bchan_init(sc, chan_no, activate);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
* initalize / deinitialize B-channel hardware
|
|
*---------------------------------------------------------------------------*/
|
|
static void
|
|
iwic_bchan_init(struct iwic_softc *sc, int chan_no, int activate)
|
|
{
|
|
struct iwic_bchan *bchan = &sc->sc_bchan[chan_no];
|
|
|
|
NDBGL1(L1_BCHAN, "chan %d, activate %d", chan_no, activate);
|
|
|
|
if(activate)
|
|
{
|
|
if(bchan->bprot == BPROT_NONE)
|
|
{
|
|
/* Extended transparent mode */
|
|
IWIC_WRITE(sc, bchan->offset + B_MODE, B_MODE_MMS);
|
|
}
|
|
else
|
|
{
|
|
/* Transparent mode */
|
|
IWIC_WRITE(sc, bchan->offset + B_MODE, 0);
|
|
/* disable address comparation */
|
|
IWIC_WRITE (sc, bchan->offset+B_ADM1, 0xff);
|
|
IWIC_WRITE (sc, bchan->offset+B_ADM2, 0xff);
|
|
}
|
|
|
|
/* reset & start receiver */
|
|
IWIC_WRITE(sc, bchan->offset + B_CMDR, B_CMDR_RRST|B_CMDR_RACT);
|
|
|
|
/* clear irq mask */
|
|
IWIC_WRITE(sc, bchan->offset + B_EXIM, 0);
|
|
}
|
|
else
|
|
{
|
|
/* mask all irqs */
|
|
IWIC_WRITE(sc, bchan->offset + B_EXIM, 0xff);
|
|
|
|
/* reset mode */
|
|
IWIC_WRITE(sc, bchan->offset + B_MODE, 0);
|
|
|
|
/* Bring interface down */
|
|
IWIC_WRITE(sc, bchan->offset + B_CMDR, B_CMDR_RRST | B_CMDR_XRST);
|
|
|
|
/* Flush pending interrupts */
|
|
IWIC_READ(sc, bchan->offset + B_EXIR);
|
|
}
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
* start transmission on a b channel
|
|
*---------------------------------------------------------------------------*/
|
|
static void
|
|
iwic_bchannel_start(int unit, int chan_no)
|
|
{
|
|
struct iwic_softc *sc = &iwic_sc[unit];
|
|
register struct iwic_bchan *chan = &sc->sc_bchan[chan_no];
|
|
register int next_len;
|
|
register int len;
|
|
|
|
int s;
|
|
int activity = -1;
|
|
int cmd = 0;
|
|
|
|
s = SPLI4B(); /* enter critical section */
|
|
|
|
NDBGL1(L1_BCHAN, "unit %d, channel %d", unit, chan_no);
|
|
|
|
if(chan->state & ST_TX_ACTIVE) /* already running ? */
|
|
{
|
|
splx(s);
|
|
return; /* yes, leave */
|
|
}
|
|
|
|
/* get next mbuf from queue */
|
|
|
|
IF_DEQUEUE(&chan->tx_queue, chan->out_mbuf_head);
|
|
|
|
if(chan->out_mbuf_head == NULL) /* queue empty ? */
|
|
{
|
|
splx(s); /* leave critical section */
|
|
return; /* yes, exit */
|
|
}
|
|
|
|
/* init current mbuf values */
|
|
|
|
chan->out_mbuf_cur = chan->out_mbuf_head;
|
|
chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
|
|
chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
|
|
|
|
/* activity indicator for timeout handling */
|
|
|
|
if(chan->bprot == BPROT_NONE)
|
|
{
|
|
if(!(i4b_l1_bchan_tel_silence(chan->out_mbuf_cur->m_data, chan->out_mbuf_cur->m_len)))
|
|
activity = ACT_TX;
|
|
}
|
|
else
|
|
{
|
|
activity = ACT_TX;
|
|
}
|
|
|
|
chan->state |= ST_TX_ACTIVE; /* we start transmitting */
|
|
|
|
if(sc->sc_trace & TRACE_B_TX) /* if trace, send mbuf to trace dev */
|
|
{
|
|
i4b_trace_hdr_t hdr;
|
|
hdr.unit = L0IWICUNIT(unit);
|
|
hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
|
|
hdr.dir = FROM_TE;
|
|
hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
|
|
MICROTIME(hdr.time);
|
|
i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
|
|
}
|
|
|
|
len = 0; /* # of chars put into tx fifo this time */
|
|
|
|
/*
|
|
* fill the tx fifo with data from the current mbuf. if
|
|
* current mbuf holds less data than fifo length, try to
|
|
* get the next mbuf from (a possible) mbuf chain. if there is
|
|
* not enough data in a single mbuf or in a chain, then this
|
|
* is the last mbuf and we tell the chip that it has to send
|
|
* CRC and closing flag
|
|
*/
|
|
|
|
while((len < IWIC_BCHAN_FIFO_LEN) && chan->out_mbuf_cur)
|
|
{
|
|
/*
|
|
* put as much data into the fifo as is
|
|
* available from the current mbuf
|
|
*/
|
|
|
|
if((len + chan->out_mbuf_cur_len) >= IWIC_BCHAN_FIFO_LEN)
|
|
next_len = IWIC_BCHAN_FIFO_LEN - len;
|
|
else
|
|
next_len = chan->out_mbuf_cur_len;
|
|
|
|
/* write what we have from current mbuf to fifo */
|
|
|
|
IWIC_WRBFIFO(sc, chan, chan->out_mbuf_cur_ptr, next_len);
|
|
|
|
len += next_len; /* update # of bytes written */
|
|
chan->txcount += next_len; /* statistics */
|
|
chan->out_mbuf_cur_ptr += next_len; /* data ptr */
|
|
chan->out_mbuf_cur_len -= next_len; /* data len */
|
|
|
|
/*
|
|
* in case the current mbuf (of a possible chain) data
|
|
* has been put into the fifo, check if there is a next
|
|
* mbuf in the chain. If there is one, get ptr to it
|
|
* and update the data ptr and the length
|
|
*/
|
|
|
|
if((chan->out_mbuf_cur_len <= 0) &&
|
|
((chan->out_mbuf_cur = chan->out_mbuf_cur->m_next) != NULL))
|
|
{
|
|
chan->out_mbuf_cur_ptr = chan->out_mbuf_cur->m_data;
|
|
chan->out_mbuf_cur_len = chan->out_mbuf_cur->m_len;
|
|
|
|
if(sc->sc_trace & TRACE_B_TX)
|
|
{
|
|
i4b_trace_hdr_t hdr;
|
|
hdr.unit = L0IWICUNIT(unit);
|
|
hdr.type = (chan_no == IWIC_BCH_A ? TRC_CH_B1 : TRC_CH_B2);
|
|
hdr.dir = FROM_TE;
|
|
hdr.count = ++sc->sc_bchan[chan_no].sc_trace_bcount;
|
|
MICROTIME(hdr.time);
|
|
i4b_l1_trace_ind(&hdr, chan->out_mbuf_cur->m_len, chan->out_mbuf_cur->m_data);
|
|
}
|
|
}
|
|
}
|
|
|
|
/*
|
|
* if there is either still data in the current mbuf and/or
|
|
* there is a successor on the chain available issue just
|
|
* a XTF (transmit) command to the chip. if there is no more
|
|
* data available from the current mbuf (-chain), issue
|
|
* an XTF and an XME (message end) command which will then
|
|
* send the CRC and the closing HDLC flag sequence
|
|
*/
|
|
|
|
if(chan->out_mbuf_cur && (chan->out_mbuf_cur_len > 0))
|
|
{
|
|
/*
|
|
* more data available, send current fifo out.
|
|
* next xfer to tx fifo is done in the
|
|
* interrupt routine.
|
|
*/
|
|
|
|
cmd |= B_CMDR_XMS;
|
|
}
|
|
else
|
|
{
|
|
/* end of mbuf chain */
|
|
|
|
if(chan->bprot == BPROT_NONE)
|
|
cmd |= B_CMDR_XMS;
|
|
else
|
|
cmd |= (B_CMDR_XMS | B_CMDR_XME);
|
|
|
|
i4b_Bfreembuf(chan->out_mbuf_head); /* free mbuf chain */
|
|
|
|
chan->out_mbuf_head = NULL;
|
|
chan->out_mbuf_cur = NULL;
|
|
chan->out_mbuf_cur_ptr = NULL;
|
|
chan->out_mbuf_cur_len = 0;
|
|
}
|
|
|
|
/* call timeout handling routine */
|
|
|
|
if(activity == ACT_RX || activity == ACT_TX)
|
|
(*chan->iwic_drvr_linktab->bch_activity)(chan->iwic_drvr_linktab->unit, activity);
|
|
|
|
if(cmd)
|
|
{
|
|
cmd |= B_CMDR_RACT;
|
|
IWIC_WRITE(sc, chan->offset + B_CMDR, cmd);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
* return B-channel statistics
|
|
*---------------------------------------------------------------------------*/
|
|
static void
|
|
iwic_bchannel_stat(int unit, int chan_no, bchan_statistics_t *bsp)
|
|
{
|
|
struct iwic_softc *sc = iwic_find_sc(unit);
|
|
struct iwic_bchan *bchan = &sc->sc_bchan[chan_no];
|
|
|
|
int s = SPLI4B();
|
|
|
|
bsp->outbytes = bchan->txcount;
|
|
bsp->inbytes = bchan->rxcount;
|
|
|
|
bchan->txcount = 0;
|
|
bchan->rxcount = 0;
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*---------------------------------------------------------------------------*
|
|
* initialize our local linktab
|
|
*---------------------------------------------------------------------------*/
|
|
void
|
|
iwic_init_linktab(struct iwic_softc *sc)
|
|
{
|
|
struct iwic_bchan *chan;
|
|
isdn_link_t *lt;
|
|
|
|
/* make sure the hardware driver is known to layer 4 */
|
|
ctrl_types[CTRL_PASSIVE].set_linktab = i4b_l1_set_linktab;
|
|
ctrl_types[CTRL_PASSIVE].get_linktab = i4b_l1_ret_linktab;
|
|
|
|
/* channel A */
|
|
|
|
chan = &sc->sc_bchan[IWIC_BCH_A];
|
|
lt = &chan->iwic_isdn_linktab;
|
|
|
|
lt->unit = sc->sc_unit;
|
|
lt->channel = IWIC_BCH_A;
|
|
lt->bch_config = iwic_bchannel_setup;
|
|
lt->bch_tx_start = iwic_bchannel_start;
|
|
lt->bch_stat = iwic_bchannel_stat;
|
|
lt->tx_queue = &chan->tx_queue;
|
|
|
|
/* used by non-HDLC data transfers, i.e. telephony drivers */
|
|
lt->rx_queue = &chan->rx_queue;
|
|
|
|
/* used by HDLC data transfers, i.e. ipr and isp drivers */
|
|
lt->rx_mbuf = &chan->in_mbuf;
|
|
|
|
/* channel B */
|
|
|
|
chan = &sc->sc_bchan[IWIC_BCH_B];
|
|
lt = &chan->iwic_isdn_linktab;
|
|
|
|
lt->unit = sc->sc_unit;
|
|
lt->channel = IWIC_BCH_B;
|
|
lt->bch_config = iwic_bchannel_setup;
|
|
lt->bch_tx_start = iwic_bchannel_start;
|
|
lt->bch_stat = iwic_bchannel_stat;
|
|
lt->tx_queue = &chan->tx_queue;
|
|
|
|
/* used by non-HDLC data transfers, i.e. telephony drivers */
|
|
lt->rx_queue = &chan->rx_queue;
|
|
|
|
/* used by HDLC data transfers, i.e. ipr and isp drivers */
|
|
lt->rx_mbuf = &chan->in_mbuf;
|
|
}
|
|
|
|
#endif /* NIWIC > 0 */
|