84525e55c1
So that MAX_APIC_ID can be bumped without wasting memory. Note that the usage of MAX_APIC_ID in the SRAT parsing forces the parser to allocate memory directly from the phys_avail physical memory array, which is not the best approach probably, but I haven't found any other way to allocate memory so early in boot. This memory is not returned to the system afterwards, but at least it's sized according to the maximum APIC ID found in the MADT table. Sponsored by: Citrix Systems R&D MFC after: 1 month Reviewed by: kib Differential revision: https://reviews.freebsd.org/D11912
107 lines
3.1 KiB
C
107 lines
3.1 KiB
C
/*-
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* ----------------------------------------------------------------------------
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* "THE BEER-WARE LICENSE" (Revision 42):
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* <phk@FreeBSD.org> wrote this file. As long as you retain this notice you
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* can do whatever you want with this stuff. If we meet some day, and you think
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $FreeBSD$
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*
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*/
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#ifndef _X86_X86_SMP_H_
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#define _X86_X86_SMP_H_
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#include <sys/bus.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <x86/apicvar.h>
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#include <machine/pcb.h>
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struct pmap;
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/* global data in mp_x86.c */
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extern int mp_naps;
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extern int boot_cpu_id;
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extern struct pcb stoppcbs[];
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extern int cpu_apic_ids[];
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extern int bootAP;
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extern void *dpcpu;
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extern char *bootSTK;
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extern void *bootstacks[];
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extern volatile u_int cpu_ipi_pending[];
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extern volatile int aps_ready;
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extern struct mtx ap_boot_mtx;
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extern int cpu_logical;
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extern int cpu_cores;
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extern volatile uint32_t smp_tlb_generation;
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extern struct pmap *smp_tlb_pmap;
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extern u_int xhits_gbl[];
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extern u_int xhits_pg[];
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extern u_int xhits_rng[];
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extern u_int ipi_global;
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extern u_int ipi_page;
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extern u_int ipi_range;
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extern u_int ipi_range_size;
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extern int nmi_kdb_lock;
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extern int nmi_is_broadcast;
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struct cpu_info {
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int cpu_present:1;
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int cpu_bsp:1;
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int cpu_disabled:1;
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int cpu_hyperthread:1;
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};
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extern struct cpu_info *cpu_info;
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#ifdef COUNT_IPIS
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extern u_long *ipi_invltlb_counts[MAXCPU];
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extern u_long *ipi_invlrng_counts[MAXCPU];
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extern u_long *ipi_invlpg_counts[MAXCPU];
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extern u_long *ipi_invlcache_counts[MAXCPU];
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extern u_long *ipi_rendezvous_counts[MAXCPU];
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#endif
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/* IPI handlers */
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inthand_t
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IDTVEC(invltlb), /* TLB shootdowns - global */
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IDTVEC(invlpg), /* TLB shootdowns - 1 page */
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IDTVEC(invlrng), /* TLB shootdowns - page range */
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IDTVEC(invlcache), /* Write back and invalidate cache */
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IDTVEC(ipi_intr_bitmap_handler), /* Bitmap based IPIs */
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IDTVEC(cpustop), /* CPU stops & waits to be restarted */
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IDTVEC(cpususpend), /* CPU suspends & waits to be resumed */
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IDTVEC(rendezvous); /* handle CPU rendezvous */
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/* functions in x86_mp.c */
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void assign_cpu_ids(void);
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void cpu_add(u_int apic_id, char boot_cpu);
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void cpustop_handler(void);
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void cpususpend_handler(void);
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void init_secondary_tail(void);
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void invltlb_handler(void);
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void invlpg_handler(void);
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void invlrng_handler(void);
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void invlcache_handler(void);
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void init_secondary(void);
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void ipi_startup(int apic_id, int vector);
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void ipi_all_but_self(u_int ipi);
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void ipi_bitmap_handler(struct trapframe frame);
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void ipi_cpu(int cpu, u_int ipi);
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int ipi_nmi_handler(void);
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void ipi_selected(cpuset_t cpus, u_int ipi);
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u_int mp_bootaddress(u_int);
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void set_interrupt_apic_ids(void);
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void smp_cache_flush(void);
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void smp_masked_invlpg(cpuset_t mask, vm_offset_t addr);
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void smp_masked_invlpg_range(cpuset_t mask, vm_offset_t startva,
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vm_offset_t endva);
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void smp_masked_invltlb(cpuset_t mask, struct pmap *pmap);
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void mem_range_AP_init(void);
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void topo_probe(void);
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void ipi_send_cpu(int cpu, u_int ipi);
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#endif
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