c2f9d95de5
'three-stage' bootstrap. There are a number of caveats with the code in its current state: - The i386 bootstrap only supports booting from a floppy. - The kernel and kld do not yet know how to deal with the extended information and module summary passed in. - PnP-based autodetection and demand loading of modules is not implemented. - i386 ELF kernel loading is not ready yet. - The i386 bootstrap is loaded via an ugly blockmap. On the alpha, both net- and disk-booting (SRM console machines only) is supported. No blockmaps are used by this code. Obtained from: Parts from the NetBSD/i386 standalone bootstrap.
119 lines
2.8 KiB
ArmAsm
119 lines
2.8 KiB
ArmAsm
/*
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* $Id$
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* From: $NetBSD: prom_disp.S,v 1.2 1997/04/06 08:41:00 cgd Exp $
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*/
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#ifndef _LOCORE
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#define ASSEMBLER
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#include <machine/asm.h>
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#include <machine/prom.h>
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#include <machine/rpb.h>
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#endif
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.globl prom_dispatch_v
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.comm prom_dispatch_v,16
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.text
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.align 4
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/*
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* Dispatcher routine. Implements prom's calling machinery, saves our
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* callee-saved registers as required by C.
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*/
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#define D_RA (7*8)
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#define D_S0 (8*8)
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#define D_S1 (9*8)
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#define D_S2 (10*8)
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#define D_S3 (11*8)
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#define D_S4 (12*8)
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#define D_S5 (13*8)
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#define D_S6 (14*8)
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#define DISPATCH_FRAME_SIZE (15*8)
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#define DISPATCH_REGS IM_RA|IM_S0|IM_S1|IM_S2|IM_S3|IM_S4|IM_S5|IM_S6
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NESTED(prom_dispatch, 5, DISPATCH_FRAME_SIZE, ra, DISPATCH_REGS, 0)
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LDGP(pv)
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lda sp, -DISPATCH_FRAME_SIZE(sp)
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stq ra, D_RA(sp)
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stq s0, D_S0(sp)
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stq s1, D_S1(sp)
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stq s2, D_S2(sp)
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stq s3, D_S3(sp)
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stq s4, D_S4(sp)
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stq s5, D_S5(sp)
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stq s6, D_S6(sp)
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/* Lord have mercy because.. I would not. */
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/* #define STUPID_PROM_IS_32_BITS */
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#ifdef STUPID_PROM_IS_32_BITS
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ldah s0, 0x2000(zero) /* hack for hack */
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lda s0, (0x2000-8)(s0)
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stq sp, 0(s0)
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or s0, zero, sp
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#endif /* STUPID_PROM_IS_32_BITS */
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lda pv, prom_dispatch_v
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ldq v0, 0(pv) /* routine */
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ldq pv, 8(pv) /* routine_arg */
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jsr ra, (v0)
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#ifdef STUPID_PROM_IS_32_BITS
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ldah s0, 0x2000(zero) /* hack for hack */
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lda s0, (0x2000-8)(s0)
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ldq sp, 0(s0)
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#endif /* STUPID_PROM_IS_32_BITS */
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ldq ra, D_RA(sp)
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ldq s0, D_S0(sp)
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ldq s1, D_S1(sp)
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ldq s2, D_S2(sp)
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ldq s3, D_S3(sp)
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ldq s4, D_S4(sp)
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ldq s5, D_S5(sp)
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ldq s6, D_S6(sp)
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lda sp, DISPATCH_FRAME_SIZE(sp)
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RET
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END(prom_dispatch)
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#undef D_RA
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#undef D_S0
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#undef D_S1
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#undef D_S2
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#undef D_S3
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#undef D_S4
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#undef D_S5
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#undef D_S6
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#undef DISPATCH_FRAME_SIZE
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#undef DISPATCH_REGS
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