8d2a55ca67
Reviewed by: kib Submitted by: Anton Rang <rang at acm.org> Sponsored by: Dell EMC Isilon Differential Revision: https://reviews.freebsd.org/D20162
940 lines
26 KiB
C
940 lines
26 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright (c) 2013 The FreeBSD Foundation
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* All rights reserved.
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*
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* This software was developed by Konstantin Belousov <kib@FreeBSD.org>
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* under sponsorship from the FreeBSD Foundation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/domainset.h>
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#include <sys/malloc.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/interrupt.h>
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#include <sys/kernel.h>
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#include <sys/ktr.h>
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#include <sys/lock.h>
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#include <sys/proc.h>
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#include <sys/memdesc.h>
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#include <sys/mutex.h>
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#include <sys/sysctl.h>
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#include <sys/rman.h>
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#include <sys/taskqueue.h>
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#include <sys/tree.h>
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#include <sys/uio.h>
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#include <sys/vmem.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/vm_kern.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <vm/vm_map.h>
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#include <machine/atomic.h>
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#include <machine/bus.h>
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#include <machine/md_var.h>
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#include <machine/specialreg.h>
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#include <x86/include/busdma_impl.h>
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#include <x86/iommu/intel_reg.h>
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#include <x86/iommu/busdma_dmar.h>
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#include <x86/iommu/intel_dmar.h>
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/*
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* busdma_dmar.c, the implementation of the busdma(9) interface using
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* DMAR units from Intel VT-d.
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*/
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static bool
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dmar_bus_dma_is_dev_disabled(int domain, int bus, int slot, int func)
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{
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char str[128], *env;
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int default_bounce;
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bool ret;
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static const char bounce_str[] = "bounce";
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static const char dmar_str[] = "dmar";
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default_bounce = 0;
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env = kern_getenv("hw.busdma.default");
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if (env != NULL) {
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if (strcmp(env, bounce_str) == 0)
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default_bounce = 1;
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else if (strcmp(env, dmar_str) == 0)
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default_bounce = 0;
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freeenv(env);
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}
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snprintf(str, sizeof(str), "hw.busdma.pci%d.%d.%d.%d",
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domain, bus, slot, func);
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env = kern_getenv(str);
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if (env == NULL)
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return (default_bounce != 0);
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if (strcmp(env, bounce_str) == 0)
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ret = true;
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else if (strcmp(env, dmar_str) == 0)
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ret = false;
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else
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ret = default_bounce != 0;
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freeenv(env);
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return (ret);
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}
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/*
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* Given original device, find the requester ID that will be seen by
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* the DMAR unit and used for page table lookup. PCI bridges may take
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* ownership of transactions from downstream devices, so it may not be
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* the same as the BSF of the target device. In those cases, all
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* devices downstream of the bridge must share a single mapping
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* domain, and must collectively be assigned to use either DMAR or
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* bounce mapping.
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*/
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device_t
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dmar_get_requester(device_t dev, uint16_t *rid)
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{
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devclass_t pci_class;
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device_t l, pci, pcib, pcip, pcibp, requester;
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int cap_offset;
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uint16_t pcie_flags;
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bool bridge_is_pcie;
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pci_class = devclass_find("pci");
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l = requester = dev;
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*rid = pci_get_rid(dev);
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/*
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* Walk the bridge hierarchy from the target device to the
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* host port to find the translating bridge nearest the DMAR
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* unit.
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*/
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for (;;) {
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pci = device_get_parent(l);
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KASSERT(pci != NULL, ("dmar_get_requester(%s): NULL parent "
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"for %s", device_get_name(dev), device_get_name(l)));
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KASSERT(device_get_devclass(pci) == pci_class,
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("dmar_get_requester(%s): non-pci parent %s for %s",
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device_get_name(dev), device_get_name(pci),
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device_get_name(l)));
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pcib = device_get_parent(pci);
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KASSERT(pcib != NULL, ("dmar_get_requester(%s): NULL bridge "
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"for %s", device_get_name(dev), device_get_name(pci)));
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/*
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* The parent of our "bridge" isn't another PCI bus,
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* so pcib isn't a PCI->PCI bridge but rather a host
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* port, and the requester ID won't be translated
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* further.
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*/
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pcip = device_get_parent(pcib);
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if (device_get_devclass(pcip) != pci_class)
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break;
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pcibp = device_get_parent(pcip);
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if (pci_find_cap(l, PCIY_EXPRESS, &cap_offset) == 0) {
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/*
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* Do not stop the loop even if the target
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* device is PCIe, because it is possible (but
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* unlikely) to have a PCI->PCIe bridge
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* somewhere in the hierarchy.
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*/
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l = pcib;
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} else {
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/*
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* Device is not PCIe, it cannot be seen as a
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* requester by DMAR unit. Check whether the
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* bridge is PCIe.
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*/
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bridge_is_pcie = pci_find_cap(pcib, PCIY_EXPRESS,
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&cap_offset) == 0;
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requester = pcib;
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/*
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* Check for a buggy PCIe/PCI bridge that
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* doesn't report the express capability. If
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* the bridge above it is express but isn't a
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* PCI bridge, then we know pcib is actually a
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* PCIe/PCI bridge.
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*/
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if (!bridge_is_pcie && pci_find_cap(pcibp,
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PCIY_EXPRESS, &cap_offset) == 0) {
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pcie_flags = pci_read_config(pcibp,
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cap_offset + PCIER_FLAGS, 2);
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if ((pcie_flags & PCIEM_FLAGS_TYPE) !=
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PCIEM_TYPE_PCI_BRIDGE)
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bridge_is_pcie = true;
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}
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if (bridge_is_pcie) {
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/*
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* The current device is not PCIe, but
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* the bridge above it is. This is a
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* PCIe->PCI bridge. Assume that the
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* requester ID will be the secondary
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* bus number with slot and function
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* set to zero.
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*
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* XXX: Doesn't handle the case where
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* the bridge is PCIe->PCI-X, and the
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* bridge will only take ownership of
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* requests in some cases. We should
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* provide context entries with the
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* same page tables for taken and
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* non-taken transactions.
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*/
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*rid = PCI_RID(pci_get_bus(l), 0, 0);
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l = pcibp;
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} else {
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/*
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* Neither the device nor the bridge
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* above it are PCIe. This is a
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* conventional PCI->PCI bridge, which
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* will use the bridge's BSF as the
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* requester ID.
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*/
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*rid = pci_get_rid(pcib);
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l = pcib;
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}
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}
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}
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return (requester);
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}
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struct dmar_ctx *
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dmar_instantiate_ctx(struct dmar_unit *dmar, device_t dev, bool rmrr)
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{
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device_t requester;
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struct dmar_ctx *ctx;
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bool disabled;
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uint16_t rid;
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requester = dmar_get_requester(dev, &rid);
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/*
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* If the user requested the IOMMU disabled for the device, we
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* cannot disable the DMAR, due to possibility of other
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* devices on the same DMAR still requiring translation.
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* Instead provide the identity mapping for the device
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* context.
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*/
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disabled = dmar_bus_dma_is_dev_disabled(pci_get_domain(requester),
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pci_get_bus(requester), pci_get_slot(requester),
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pci_get_function(requester));
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ctx = dmar_get_ctx_for_dev(dmar, requester, rid, disabled, rmrr);
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if (ctx == NULL)
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return (NULL);
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if (disabled) {
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/*
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* Keep the first reference on context, release the
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* later refs.
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*/
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DMAR_LOCK(dmar);
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if ((ctx->flags & DMAR_CTX_DISABLED) == 0) {
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ctx->flags |= DMAR_CTX_DISABLED;
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DMAR_UNLOCK(dmar);
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} else {
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dmar_free_ctx_locked(dmar, ctx);
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}
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ctx = NULL;
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}
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return (ctx);
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}
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bus_dma_tag_t
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dmar_get_dma_tag(device_t dev, device_t child)
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{
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struct dmar_unit *dmar;
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struct dmar_ctx *ctx;
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bus_dma_tag_t res;
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dmar = dmar_find(child, bootverbose);
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/* Not in scope of any DMAR ? */
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if (dmar == NULL)
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return (NULL);
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if (!dmar->dma_enabled)
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return (NULL);
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dmar_quirks_pre_use(dmar);
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dmar_instantiate_rmrr_ctxs(dmar);
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ctx = dmar_instantiate_ctx(dmar, child, false);
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res = ctx == NULL ? NULL : (bus_dma_tag_t)&ctx->ctx_tag;
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return (res);
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}
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static MALLOC_DEFINE(M_DMAR_DMAMAP, "dmar_dmamap", "Intel DMAR DMA Map");
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static void dmar_bus_schedule_dmamap(struct dmar_unit *unit,
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struct bus_dmamap_dmar *map);
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static int
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dmar_bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
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bus_addr_t boundary, bus_addr_t lowaddr, bus_addr_t highaddr,
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bus_dma_filter_t *filter, void *filterarg, bus_size_t maxsize,
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int nsegments, bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
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void *lockfuncarg, bus_dma_tag_t *dmat)
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{
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struct bus_dma_tag_dmar *newtag, *oldtag;
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int error;
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*dmat = NULL;
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error = common_bus_dma_tag_create(parent != NULL ?
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&((struct bus_dma_tag_dmar *)parent)->common : NULL, alignment,
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boundary, lowaddr, highaddr, filter, filterarg, maxsize,
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nsegments, maxsegsz, flags, lockfunc, lockfuncarg,
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sizeof(struct bus_dma_tag_dmar), (void **)&newtag);
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if (error != 0)
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goto out;
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oldtag = (struct bus_dma_tag_dmar *)parent;
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newtag->common.impl = &bus_dma_dmar_impl;
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newtag->ctx = oldtag->ctx;
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newtag->owner = oldtag->owner;
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*dmat = (bus_dma_tag_t)newtag;
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out:
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CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
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__func__, newtag, (newtag != NULL ? newtag->common.flags : 0),
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error);
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return (error);
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}
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static int
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dmar_bus_dma_tag_set_domain(bus_dma_tag_t dmat)
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{
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return (0);
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}
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static int
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dmar_bus_dma_tag_destroy(bus_dma_tag_t dmat1)
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{
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struct bus_dma_tag_dmar *dmat, *dmat_copy, *parent;
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int error;
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error = 0;
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dmat_copy = dmat = (struct bus_dma_tag_dmar *)dmat1;
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if (dmat != NULL) {
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if (dmat->map_count != 0) {
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error = EBUSY;
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goto out;
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}
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while (dmat != NULL) {
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parent = (struct bus_dma_tag_dmar *)dmat->common.parent;
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if (atomic_fetchadd_int(&dmat->common.ref_count, -1) ==
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1) {
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if (dmat == &dmat->ctx->ctx_tag)
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dmar_free_ctx(dmat->ctx);
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free_domain(dmat->segments, M_DMAR_DMAMAP);
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free(dmat, M_DEVBUF);
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dmat = parent;
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} else
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dmat = NULL;
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}
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}
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out:
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CTR3(KTR_BUSDMA, "%s tag %p error %d", __func__, dmat_copy, error);
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return (error);
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}
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static int
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dmar_bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
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{
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struct bus_dma_tag_dmar *tag;
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struct bus_dmamap_dmar *map;
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tag = (struct bus_dma_tag_dmar *)dmat;
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map = malloc_domainset(sizeof(*map), M_DMAR_DMAMAP,
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DOMAINSET_PREF(tag->common.domain), M_NOWAIT | M_ZERO);
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if (map == NULL) {
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*mapp = NULL;
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return (ENOMEM);
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}
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if (tag->segments == NULL) {
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tag->segments = malloc_domainset(sizeof(bus_dma_segment_t) *
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tag->common.nsegments, M_DMAR_DMAMAP,
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DOMAINSET_PREF(tag->common.domain), M_NOWAIT);
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if (tag->segments == NULL) {
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free_domain(map, M_DMAR_DMAMAP);
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*mapp = NULL;
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return (ENOMEM);
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}
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}
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TAILQ_INIT(&map->map_entries);
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map->tag = tag;
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map->locked = true;
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map->cansleep = false;
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tag->map_count++;
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*mapp = (bus_dmamap_t)map;
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return (0);
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}
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static int
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dmar_bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map1)
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{
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struct bus_dma_tag_dmar *tag;
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struct bus_dmamap_dmar *map;
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struct dmar_domain *domain;
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tag = (struct bus_dma_tag_dmar *)dmat;
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map = (struct bus_dmamap_dmar *)map1;
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if (map != NULL) {
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domain = tag->ctx->domain;
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DMAR_DOMAIN_LOCK(domain);
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if (!TAILQ_EMPTY(&map->map_entries)) {
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DMAR_DOMAIN_UNLOCK(domain);
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return (EBUSY);
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}
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DMAR_DOMAIN_UNLOCK(domain);
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free_domain(map, M_DMAR_DMAMAP);
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}
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tag->map_count--;
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return (0);
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}
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static int
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dmar_bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
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bus_dmamap_t *mapp)
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{
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struct bus_dma_tag_dmar *tag;
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struct bus_dmamap_dmar *map;
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int error, mflags;
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vm_memattr_t attr;
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error = dmar_bus_dmamap_create(dmat, flags, mapp);
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if (error != 0)
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return (error);
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mflags = (flags & BUS_DMA_NOWAIT) != 0 ? M_NOWAIT : M_WAITOK;
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mflags |= (flags & BUS_DMA_ZERO) != 0 ? M_ZERO : 0;
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attr = (flags & BUS_DMA_NOCACHE) != 0 ? VM_MEMATTR_UNCACHEABLE :
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VM_MEMATTR_DEFAULT;
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tag = (struct bus_dma_tag_dmar *)dmat;
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map = (struct bus_dmamap_dmar *)*mapp;
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if (tag->common.maxsize < PAGE_SIZE &&
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tag->common.alignment <= tag->common.maxsize &&
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attr == VM_MEMATTR_DEFAULT) {
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*vaddr = malloc_domainset(tag->common.maxsize, M_DEVBUF,
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DOMAINSET_PREF(tag->common.domain), mflags);
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map->flags |= BUS_DMAMAP_DMAR_MALLOC;
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} else {
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*vaddr = (void *)kmem_alloc_attr_domainset(
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DOMAINSET_PREF(tag->common.domain), tag->common.maxsize,
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mflags, 0ul, BUS_SPACE_MAXADDR, attr);
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map->flags |= BUS_DMAMAP_DMAR_KMEM_ALLOC;
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}
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if (*vaddr == NULL) {
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dmar_bus_dmamap_destroy(dmat, *mapp);
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*mapp = NULL;
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return (ENOMEM);
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}
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return (0);
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}
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static void
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dmar_bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map1)
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{
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struct bus_dma_tag_dmar *tag;
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struct bus_dmamap_dmar *map;
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tag = (struct bus_dma_tag_dmar *)dmat;
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map = (struct bus_dmamap_dmar *)map1;
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if ((map->flags & BUS_DMAMAP_DMAR_MALLOC) != 0) {
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free_domain(vaddr, M_DEVBUF);
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map->flags &= ~BUS_DMAMAP_DMAR_MALLOC;
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} else {
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KASSERT((map->flags & BUS_DMAMAP_DMAR_KMEM_ALLOC) != 0,
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("dmar_bus_dmamem_free for non alloced map %p", map));
|
|
kmem_free((vm_offset_t)vaddr, tag->common.maxsize);
|
|
map->flags &= ~BUS_DMAMAP_DMAR_KMEM_ALLOC;
|
|
}
|
|
|
|
dmar_bus_dmamap_destroy(dmat, map1);
|
|
}
|
|
|
|
static int
|
|
dmar_bus_dmamap_load_something1(struct bus_dma_tag_dmar *tag,
|
|
struct bus_dmamap_dmar *map, vm_page_t *ma, int offset, bus_size_t buflen,
|
|
int flags, bus_dma_segment_t *segs, int *segp,
|
|
struct dmar_map_entries_tailq *unroll_list)
|
|
{
|
|
struct dmar_ctx *ctx;
|
|
struct dmar_domain *domain;
|
|
struct dmar_map_entry *entry;
|
|
dmar_gaddr_t size;
|
|
bus_size_t buflen1;
|
|
int error, idx, gas_flags, seg;
|
|
|
|
KASSERT(offset < DMAR_PAGE_SIZE, ("offset %d", offset));
|
|
if (segs == NULL)
|
|
segs = tag->segments;
|
|
ctx = tag->ctx;
|
|
domain = ctx->domain;
|
|
seg = *segp;
|
|
error = 0;
|
|
idx = 0;
|
|
while (buflen > 0) {
|
|
seg++;
|
|
if (seg >= tag->common.nsegments) {
|
|
error = EFBIG;
|
|
break;
|
|
}
|
|
buflen1 = buflen > tag->common.maxsegsz ?
|
|
tag->common.maxsegsz : buflen;
|
|
size = round_page(offset + buflen1);
|
|
|
|
/*
|
|
* (Too) optimistically allow split if there are more
|
|
* then one segments left.
|
|
*/
|
|
gas_flags = map->cansleep ? DMAR_GM_CANWAIT : 0;
|
|
if (seg + 1 < tag->common.nsegments)
|
|
gas_flags |= DMAR_GM_CANSPLIT;
|
|
|
|
error = dmar_gas_map(domain, &tag->common, size, offset,
|
|
DMAR_MAP_ENTRY_READ |
|
|
((flags & BUS_DMA_NOWRITE) == 0 ? DMAR_MAP_ENTRY_WRITE : 0),
|
|
gas_flags, ma + idx, &entry);
|
|
if (error != 0)
|
|
break;
|
|
if ((gas_flags & DMAR_GM_CANSPLIT) != 0) {
|
|
KASSERT(size >= entry->end - entry->start,
|
|
("split increased entry size %jx %jx %jx",
|
|
(uintmax_t)size, (uintmax_t)entry->start,
|
|
(uintmax_t)entry->end));
|
|
size = entry->end - entry->start;
|
|
if (buflen1 > size)
|
|
buflen1 = size;
|
|
} else {
|
|
KASSERT(entry->end - entry->start == size,
|
|
("no split allowed %jx %jx %jx",
|
|
(uintmax_t)size, (uintmax_t)entry->start,
|
|
(uintmax_t)entry->end));
|
|
}
|
|
if (offset + buflen1 > size)
|
|
buflen1 = size - offset;
|
|
if (buflen1 > tag->common.maxsegsz)
|
|
buflen1 = tag->common.maxsegsz;
|
|
|
|
KASSERT(((entry->start + offset) & (tag->common.alignment - 1))
|
|
== 0,
|
|
("alignment failed: ctx %p start 0x%jx offset %x "
|
|
"align 0x%jx", ctx, (uintmax_t)entry->start, offset,
|
|
(uintmax_t)tag->common.alignment));
|
|
KASSERT(entry->end <= tag->common.lowaddr ||
|
|
entry->start >= tag->common.highaddr,
|
|
("entry placement failed: ctx %p start 0x%jx end 0x%jx "
|
|
"lowaddr 0x%jx highaddr 0x%jx", ctx,
|
|
(uintmax_t)entry->start, (uintmax_t)entry->end,
|
|
(uintmax_t)tag->common.lowaddr,
|
|
(uintmax_t)tag->common.highaddr));
|
|
KASSERT(dmar_test_boundary(entry->start + offset, buflen1,
|
|
tag->common.boundary),
|
|
("boundary failed: ctx %p start 0x%jx end 0x%jx "
|
|
"boundary 0x%jx", ctx, (uintmax_t)entry->start,
|
|
(uintmax_t)entry->end, (uintmax_t)tag->common.boundary));
|
|
KASSERT(buflen1 <= tag->common.maxsegsz,
|
|
("segment too large: ctx %p start 0x%jx end 0x%jx "
|
|
"buflen1 0x%jx maxsegsz 0x%jx", ctx,
|
|
(uintmax_t)entry->start, (uintmax_t)entry->end,
|
|
(uintmax_t)buflen1, (uintmax_t)tag->common.maxsegsz));
|
|
|
|
DMAR_DOMAIN_LOCK(domain);
|
|
TAILQ_INSERT_TAIL(&map->map_entries, entry, dmamap_link);
|
|
entry->flags |= DMAR_MAP_ENTRY_MAP;
|
|
DMAR_DOMAIN_UNLOCK(domain);
|
|
TAILQ_INSERT_TAIL(unroll_list, entry, unroll_link);
|
|
|
|
segs[seg].ds_addr = entry->start + offset;
|
|
segs[seg].ds_len = buflen1;
|
|
|
|
idx += OFF_TO_IDX(trunc_page(offset + buflen1));
|
|
offset += buflen1;
|
|
offset &= DMAR_PAGE_MASK;
|
|
buflen -= buflen1;
|
|
}
|
|
if (error == 0)
|
|
*segp = seg;
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
dmar_bus_dmamap_load_something(struct bus_dma_tag_dmar *tag,
|
|
struct bus_dmamap_dmar *map, vm_page_t *ma, int offset, bus_size_t buflen,
|
|
int flags, bus_dma_segment_t *segs, int *segp)
|
|
{
|
|
struct dmar_ctx *ctx;
|
|
struct dmar_domain *domain;
|
|
struct dmar_map_entry *entry, *entry1;
|
|
struct dmar_map_entries_tailq unroll_list;
|
|
int error;
|
|
|
|
ctx = tag->ctx;
|
|
domain = ctx->domain;
|
|
atomic_add_long(&ctx->loads, 1);
|
|
|
|
TAILQ_INIT(&unroll_list);
|
|
error = dmar_bus_dmamap_load_something1(tag, map, ma, offset,
|
|
buflen, flags, segs, segp, &unroll_list);
|
|
if (error != 0) {
|
|
/*
|
|
* The busdma interface does not allow us to report
|
|
* partial buffer load, so unfortunately we have to
|
|
* revert all work done.
|
|
*/
|
|
DMAR_DOMAIN_LOCK(domain);
|
|
TAILQ_FOREACH_SAFE(entry, &unroll_list, unroll_link,
|
|
entry1) {
|
|
/*
|
|
* No entries other than what we have created
|
|
* during the failed run might have been
|
|
* inserted there in between, since we own ctx
|
|
* pglock.
|
|
*/
|
|
TAILQ_REMOVE(&map->map_entries, entry, dmamap_link);
|
|
TAILQ_REMOVE(&unroll_list, entry, unroll_link);
|
|
TAILQ_INSERT_TAIL(&domain->unload_entries, entry,
|
|
dmamap_link);
|
|
}
|
|
DMAR_DOMAIN_UNLOCK(domain);
|
|
taskqueue_enqueue(domain->dmar->delayed_taskqueue,
|
|
&domain->unload_task);
|
|
}
|
|
|
|
if (error == ENOMEM && (flags & BUS_DMA_NOWAIT) == 0 &&
|
|
!map->cansleep)
|
|
error = EINPROGRESS;
|
|
if (error == EINPROGRESS)
|
|
dmar_bus_schedule_dmamap(domain->dmar, map);
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
dmar_bus_dmamap_load_ma(bus_dma_tag_t dmat, bus_dmamap_t map1,
|
|
struct vm_page **ma, bus_size_t tlen, int ma_offs, int flags,
|
|
bus_dma_segment_t *segs, int *segp)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
|
|
tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
return (dmar_bus_dmamap_load_something(tag, map, ma, ma_offs, tlen,
|
|
flags, segs, segp));
|
|
}
|
|
|
|
static int
|
|
dmar_bus_dmamap_load_phys(bus_dma_tag_t dmat, bus_dmamap_t map1,
|
|
vm_paddr_t buf, bus_size_t buflen, int flags, bus_dma_segment_t *segs,
|
|
int *segp)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
vm_page_t *ma, fma;
|
|
vm_paddr_t pstart, pend, paddr;
|
|
int error, i, ma_cnt, mflags, offset;
|
|
|
|
tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
pstart = trunc_page(buf);
|
|
pend = round_page(buf + buflen);
|
|
offset = buf & PAGE_MASK;
|
|
ma_cnt = OFF_TO_IDX(pend - pstart);
|
|
mflags = map->cansleep ? M_WAITOK : M_NOWAIT;
|
|
ma = malloc(sizeof(vm_page_t) * ma_cnt, M_DEVBUF, mflags);
|
|
if (ma == NULL)
|
|
return (ENOMEM);
|
|
fma = NULL;
|
|
for (i = 0; i < ma_cnt; i++) {
|
|
paddr = pstart + i * PAGE_SIZE;
|
|
ma[i] = PHYS_TO_VM_PAGE(paddr);
|
|
if (ma[i] == NULL || VM_PAGE_TO_PHYS(ma[i]) != paddr) {
|
|
/*
|
|
* If PHYS_TO_VM_PAGE() returned NULL or the
|
|
* vm_page was not initialized we'll use a
|
|
* fake page.
|
|
*/
|
|
if (fma == NULL) {
|
|
fma = malloc(sizeof(struct vm_page) * ma_cnt,
|
|
M_DEVBUF, M_ZERO | mflags);
|
|
if (fma == NULL) {
|
|
free(ma, M_DEVBUF);
|
|
return (ENOMEM);
|
|
}
|
|
}
|
|
vm_page_initfake(&fma[i], pstart + i * PAGE_SIZE,
|
|
VM_MEMATTR_DEFAULT);
|
|
ma[i] = &fma[i];
|
|
}
|
|
}
|
|
error = dmar_bus_dmamap_load_something(tag, map, ma, offset, buflen,
|
|
flags, segs, segp);
|
|
free(fma, M_DEVBUF);
|
|
free(ma, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
|
|
static int
|
|
dmar_bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dmamap_t map1, void *buf,
|
|
bus_size_t buflen, pmap_t pmap, int flags, bus_dma_segment_t *segs,
|
|
int *segp)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
vm_page_t *ma, fma;
|
|
vm_paddr_t pstart, pend, paddr;
|
|
int error, i, ma_cnt, mflags, offset;
|
|
|
|
tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
pstart = trunc_page((vm_offset_t)buf);
|
|
pend = round_page((vm_offset_t)buf + buflen);
|
|
offset = (vm_offset_t)buf & PAGE_MASK;
|
|
ma_cnt = OFF_TO_IDX(pend - pstart);
|
|
mflags = map->cansleep ? M_WAITOK : M_NOWAIT;
|
|
ma = malloc(sizeof(vm_page_t) * ma_cnt, M_DEVBUF, mflags);
|
|
if (ma == NULL)
|
|
return (ENOMEM);
|
|
fma = NULL;
|
|
for (i = 0; i < ma_cnt; i++, pstart += PAGE_SIZE) {
|
|
if (pmap == kernel_pmap)
|
|
paddr = pmap_kextract(pstart);
|
|
else
|
|
paddr = pmap_extract(pmap, pstart);
|
|
ma[i] = PHYS_TO_VM_PAGE(paddr);
|
|
if (ma[i] == NULL || VM_PAGE_TO_PHYS(ma[i]) != paddr) {
|
|
/*
|
|
* If PHYS_TO_VM_PAGE() returned NULL or the
|
|
* vm_page was not initialized we'll use a
|
|
* fake page.
|
|
*/
|
|
if (fma == NULL) {
|
|
fma = malloc(sizeof(struct vm_page) * ma_cnt,
|
|
M_DEVBUF, M_ZERO | mflags);
|
|
if (fma == NULL) {
|
|
free(ma, M_DEVBUF);
|
|
return (ENOMEM);
|
|
}
|
|
}
|
|
vm_page_initfake(&fma[i], paddr, VM_MEMATTR_DEFAULT);
|
|
ma[i] = &fma[i];
|
|
}
|
|
}
|
|
error = dmar_bus_dmamap_load_something(tag, map, ma, offset, buflen,
|
|
flags, segs, segp);
|
|
free(ma, M_DEVBUF);
|
|
free(fma, M_DEVBUF);
|
|
return (error);
|
|
}
|
|
|
|
static void
|
|
dmar_bus_dmamap_waitok(bus_dma_tag_t dmat, bus_dmamap_t map1,
|
|
struct memdesc *mem, bus_dmamap_callback_t *callback, void *callback_arg)
|
|
{
|
|
struct bus_dmamap_dmar *map;
|
|
|
|
if (map1 == NULL)
|
|
return;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
map->mem = *mem;
|
|
map->tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map->callback = callback;
|
|
map->callback_arg = callback_arg;
|
|
}
|
|
|
|
static bus_dma_segment_t *
|
|
dmar_bus_dmamap_complete(bus_dma_tag_t dmat, bus_dmamap_t map1,
|
|
bus_dma_segment_t *segs, int nsegs, int error)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
|
|
tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
|
|
if (!map->locked) {
|
|
KASSERT(map->cansleep,
|
|
("map not locked and not sleepable context %p", map));
|
|
|
|
/*
|
|
* We are called from the delayed context. Relock the
|
|
* driver.
|
|
*/
|
|
(tag->common.lockfunc)(tag->common.lockfuncarg, BUS_DMA_LOCK);
|
|
map->locked = true;
|
|
}
|
|
|
|
if (segs == NULL)
|
|
segs = tag->segments;
|
|
return (segs);
|
|
}
|
|
|
|
/*
|
|
* The limitations of busdma KPI forces the dmar to perform the actual
|
|
* unload, consisting of the unmapping of the map entries page tables,
|
|
* from the delayed context on i386, since page table page mapping
|
|
* might require a sleep to be successfull. The unfortunate
|
|
* consequence is that the DMA requests can be served some time after
|
|
* the bus_dmamap_unload() call returned.
|
|
*
|
|
* On amd64, we assume that sf allocation cannot fail.
|
|
*/
|
|
static void
|
|
dmar_bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map1)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
struct dmar_ctx *ctx;
|
|
struct dmar_domain *domain;
|
|
#if defined(__amd64__)
|
|
struct dmar_map_entries_tailq entries;
|
|
#endif
|
|
|
|
tag = (struct bus_dma_tag_dmar *)dmat;
|
|
map = (struct bus_dmamap_dmar *)map1;
|
|
ctx = tag->ctx;
|
|
domain = ctx->domain;
|
|
atomic_add_long(&ctx->unloads, 1);
|
|
|
|
#if defined(__i386__)
|
|
DMAR_DOMAIN_LOCK(domain);
|
|
TAILQ_CONCAT(&domain->unload_entries, &map->map_entries, dmamap_link);
|
|
DMAR_DOMAIN_UNLOCK(domain);
|
|
taskqueue_enqueue(domain->dmar->delayed_taskqueue,
|
|
&domain->unload_task);
|
|
#else /* defined(__amd64__) */
|
|
TAILQ_INIT(&entries);
|
|
DMAR_DOMAIN_LOCK(domain);
|
|
TAILQ_CONCAT(&entries, &map->map_entries, dmamap_link);
|
|
DMAR_DOMAIN_UNLOCK(domain);
|
|
THREAD_NO_SLEEPING();
|
|
dmar_domain_unload(domain, &entries, false);
|
|
THREAD_SLEEPING_OK();
|
|
KASSERT(TAILQ_EMPTY(&entries), ("lazy dmar_ctx_unload %p", ctx));
|
|
#endif
|
|
}
|
|
|
|
static void
|
|
dmar_bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map,
|
|
bus_dmasync_op_t op)
|
|
{
|
|
}
|
|
|
|
struct bus_dma_impl bus_dma_dmar_impl = {
|
|
.tag_create = dmar_bus_dma_tag_create,
|
|
.tag_destroy = dmar_bus_dma_tag_destroy,
|
|
.tag_set_domain = dmar_bus_dma_tag_set_domain,
|
|
.map_create = dmar_bus_dmamap_create,
|
|
.map_destroy = dmar_bus_dmamap_destroy,
|
|
.mem_alloc = dmar_bus_dmamem_alloc,
|
|
.mem_free = dmar_bus_dmamem_free,
|
|
.load_phys = dmar_bus_dmamap_load_phys,
|
|
.load_buffer = dmar_bus_dmamap_load_buffer,
|
|
.load_ma = dmar_bus_dmamap_load_ma,
|
|
.map_waitok = dmar_bus_dmamap_waitok,
|
|
.map_complete = dmar_bus_dmamap_complete,
|
|
.map_unload = dmar_bus_dmamap_unload,
|
|
.map_sync = dmar_bus_dmamap_sync,
|
|
};
|
|
|
|
static void
|
|
dmar_bus_task_dmamap(void *arg, int pending)
|
|
{
|
|
struct bus_dma_tag_dmar *tag;
|
|
struct bus_dmamap_dmar *map;
|
|
struct dmar_unit *unit;
|
|
|
|
unit = arg;
|
|
DMAR_LOCK(unit);
|
|
while ((map = TAILQ_FIRST(&unit->delayed_maps)) != NULL) {
|
|
TAILQ_REMOVE(&unit->delayed_maps, map, delay_link);
|
|
DMAR_UNLOCK(unit);
|
|
tag = map->tag;
|
|
map->cansleep = true;
|
|
map->locked = false;
|
|
bus_dmamap_load_mem((bus_dma_tag_t)tag, (bus_dmamap_t)map,
|
|
&map->mem, map->callback, map->callback_arg,
|
|
BUS_DMA_WAITOK);
|
|
map->cansleep = false;
|
|
if (map->locked) {
|
|
(tag->common.lockfunc)(tag->common.lockfuncarg,
|
|
BUS_DMA_UNLOCK);
|
|
} else
|
|
map->locked = true;
|
|
map->cansleep = false;
|
|
DMAR_LOCK(unit);
|
|
}
|
|
DMAR_UNLOCK(unit);
|
|
}
|
|
|
|
static void
|
|
dmar_bus_schedule_dmamap(struct dmar_unit *unit, struct bus_dmamap_dmar *map)
|
|
{
|
|
|
|
map->locked = false;
|
|
DMAR_LOCK(unit);
|
|
TAILQ_INSERT_TAIL(&unit->delayed_maps, map, delay_link);
|
|
DMAR_UNLOCK(unit);
|
|
taskqueue_enqueue(unit->delayed_taskqueue, &unit->dmamap_load_task);
|
|
}
|
|
|
|
int
|
|
dmar_init_busdma(struct dmar_unit *unit)
|
|
{
|
|
|
|
unit->dma_enabled = 1;
|
|
TUNABLE_INT_FETCH("hw.dmar.dma", &unit->dma_enabled);
|
|
TAILQ_INIT(&unit->delayed_maps);
|
|
TASK_INIT(&unit->dmamap_load_task, 0, dmar_bus_task_dmamap, unit);
|
|
unit->delayed_taskqueue = taskqueue_create("dmar", M_WAITOK,
|
|
taskqueue_thread_enqueue, &unit->delayed_taskqueue);
|
|
taskqueue_start_threads(&unit->delayed_taskqueue, 1, PI_DISK,
|
|
"dmar%d busdma taskq", unit->unit);
|
|
return (0);
|
|
}
|
|
|
|
void
|
|
dmar_fini_busdma(struct dmar_unit *unit)
|
|
{
|
|
|
|
if (unit->delayed_taskqueue == NULL)
|
|
return;
|
|
|
|
taskqueue_drain(unit->delayed_taskqueue, &unit->dmamap_load_task);
|
|
taskqueue_free(unit->delayed_taskqueue);
|
|
unit->delayed_taskqueue = NULL;
|
|
}
|