3df266dff9
The core clock (armclk) on RockChip SoC is special. It can derive it's clock from many PLLs but RockChip recommand to do it from "apll" on old SoC and "npll" on new SoC. The reason for choosing npll is that it's have less jitter and is more close to the arm core on the SoC. r333314 added the core clock as a composite clock but due to it's specials property we need to deal with it differently. A new rk_clk_armclk type is added for this and it supports only the "npll" as we don't run on old RockChip SoC that only have the "apll". It will always reparent to "npll" and set the frequency according to a rate table that is known to be good. For now we set the "npll" to the desired frequency and just set the core clk divider to 1 as its parent it just used for the core clk.
67 lines
2.0 KiB
C
67 lines
2.0 KiB
C
/*-
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* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
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*
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* Copyright 2018 Emmanuel Vadot <manu@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _RK_CLK_ARMCLK_H_
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#define _RK_CLK_ARMCLK_H_
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#include <dev/extres/clk/clk.h>
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struct rk_clk_armclk_rates {
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uint64_t freq;
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uint32_t div;
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};
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struct rk_clk_armclk_def {
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struct clknode_init_def clkdef;
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uint32_t muxdiv_offset;
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uint32_t mux_shift;
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uint32_t mux_width;
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uint32_t div_shift;
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uint32_t div_width;
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uint32_t flags;
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uint32_t main_parent;
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uint32_t alt_parent;
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struct rk_clk_armclk_rates *rates;
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int nrates;
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};
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#define RK_CLK_ARMCLK_MASK 0xFFFF0000
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int rk_clk_armclk_register(struct clkdom *clkdom,
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struct rk_clk_armclk_def *clkdef);
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#endif /* _RK_CLK_ARMCLK_H_ */
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