c572da7f10
The MDIO bus frequency is configured as a divisor off of the MDIO bus reference clock. For the AR9344 and later, the MDIO bus frequency can be faster than normal (ie, up to 100MHz) and thus a static divisor may not be very applicable. So, for those boards that may require an actual frequency to be selected regardless of what crazy stuff the vendor throws in uboot, one can now set the MDIO bus frequency. It uses the MDIO frequency and the target frequency to choose a divisor that doesn't exceed the target frequency. By default it will choose: * DIV_28 on everything; except * DIV_58 on the AR9344 to be conservative. Whilst I'm here, add some comments about the defaults being not quite right. For the other internal switch devices (like the AR933x, AR724x) the divisor can be higher - it's internal and the reference MDIO clock is much lower than 100MHz. The divisor tables and loop code is inspired from Linux/OpenWRT. It's very simple; I didn't feel that reimplementing it would yield a substantially different solution. Tested: * AR9331 (mips24k) * AR9344 (mips74k) Obtained from: Linux/OpenWRT |
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