666 lines
19 KiB
C
666 lines
19 KiB
C
/*-
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* Copyright (c) 1990 William Jolitz.
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* from: @(#)npx.c 7.2 (Berkeley) 5/12/91
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* $Id: npx.c,v 1.53 1997/10/28 11:43:54 bde Exp $
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*/
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#include "npx.h"
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#if NNPX > 0
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#include "opt_math_emulate.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/sysctl.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#ifdef NPX_DEBUG
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#include <sys/syslog.h>
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#endif
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#include <sys/signalvar.h>
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#ifndef SMP
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#include <machine/asmacros.h>
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#endif
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#include <machine/cputypes.h>
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#include <machine/frame.h>
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#include <machine/ipl.h>
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#ifndef SMP
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#include <machine/md_var.h>
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#endif
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#include <machine/pcb.h>
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#include <machine/psl.h>
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#ifndef SMP
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#include <machine/clock.h>
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#endif
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#include <machine/specialreg.h>
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#include <machine/segments.h>
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#ifndef SMP
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#include <i386/isa/icu.h>
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#include <i386/isa/intr_machdep.h>
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#include <i386/isa/isa.h>
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#endif
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#include <i386/isa/isa_device.h>
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/*
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* 387 and 287 Numeric Coprocessor Extension (NPX) Driver.
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*/
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/* Configuration flags. */
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#define NPX_DISABLE_I586_OPTIMIZED_BCOPY (1 << 0)
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#define NPX_DISABLE_I586_OPTIMIZED_BZERO (1 << 1)
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#define NPX_DISABLE_I586_OPTIMIZED_COPYIO (1 << 2)
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/* XXX - should be in header file. */
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extern void (*bcopy_vector) __P((const void *from, void *to, size_t len));
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extern void (*ovbcopy_vector) __P((const void *from, void *to, size_t len));
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extern int (*copyin_vector) __P((const void *udaddr, void *kaddr, size_t len));
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extern int (*copyout_vector) __P((const void *kaddr, void *udaddr, size_t len));
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void i586_bcopy __P((const void *from, void *to, size_t len));
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void i586_bzero __P((void *buf, size_t len));
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int i586_copyin __P((const void *udaddr, void *kaddr, size_t len));
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int i586_copyout __P((const void *kaddr, void *udaddr, size_t len));
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#ifdef __GNUC__
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#define fldcw(addr) __asm("fldcw %0" : : "m" (*(addr)))
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#define fnclex() __asm("fnclex")
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#define fninit() __asm("fninit")
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#define fnop() __asm("fnop")
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#define fnsave(addr) __asm("fnsave %0" : "=m" (*(addr)))
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#define fnstcw(addr) __asm("fnstcw %0" : "=m" (*(addr)))
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#define fnstsw(addr) __asm("fnstsw %0" : "=m" (*(addr)))
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#define fp_divide_by_0() __asm("fldz; fld1; fdiv %st,%st(1); fnop")
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#define frstor(addr) __asm("frstor %0" : : "m" (*(addr)))
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#define start_emulating() __asm("smsw %%ax; orb %0,%%al; lmsw %%ax" \
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: : "n" (CR0_TS) : "ax")
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#define stop_emulating() __asm("clts")
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#else /* not __GNUC__ */
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void fldcw __P((caddr_t addr));
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void fnclex __P((void));
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void fninit __P((void));
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void fnop __P((void));
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void fnsave __P((caddr_t addr));
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void fnstcw __P((caddr_t addr));
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void fnstsw __P((caddr_t addr));
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void fp_divide_by_0 __P((void));
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void frstor __P((caddr_t addr));
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void start_emulating __P((void));
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void stop_emulating __P((void));
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#endif /* __GNUC__ */
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typedef u_char bool_t;
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static int npxattach __P((struct isa_device *dvp));
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static int npxprobe __P((struct isa_device *dvp));
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static int npxprobe1 __P((struct isa_device *dvp));
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struct isa_driver npxdriver = {
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npxprobe, npxattach, "npx",
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};
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int hw_float; /* XXX currently just alias for npx_exists */
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SYSCTL_INT(_hw,HW_FLOATINGPT, floatingpoint,
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CTLFLAG_RD, &hw_float, 0,
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"Floatingpoint instructions executed in hardware");
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static u_int npx0_imask = SWI_CLOCK_MASK;
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#ifndef SMP /* XXX per-cpu on smp */
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struct proc *npxproc;
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#endif
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static bool_t npx_ex16;
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static bool_t npx_exists;
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static struct gate_descriptor npx_idt_probeintr;
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static int npx_intrno;
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static volatile u_int npx_intrs_while_probing;
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static bool_t npx_irq13;
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static volatile u_int npx_traps_while_probing;
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#ifndef SMP
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/*
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* Special interrupt handlers. Someday intr0-intr15 will be used to count
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* interrupts. We'll still need a special exception 16 handler. The busy
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* latch stuff in probeintr() can be moved to npxprobe().
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*/
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inthand_t probeintr;
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asm
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("
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.text
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.p2align 2,0x90
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" __XSTRING(CNAME(probeintr)) ":
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ss
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incl " __XSTRING(CNAME(npx_intrs_while_probing)) "
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pushl %eax
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movb $0x20,%al # EOI (asm in strings loses cpp features)
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outb %al,$0xa0 # IO_ICU2
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outb %al,$0x20 # IO_ICU1
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movb $0,%al
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outb %al,$0xf0 # clear BUSY# latch
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popl %eax
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iret
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");
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inthand_t probetrap;
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asm
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("
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.text
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.p2align 2,0x90
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" __XSTRING(CNAME(probetrap)) ":
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ss
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incl " __XSTRING(CNAME(npx_traps_while_probing)) "
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fnclex
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iret
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");
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#endif /* SMP */
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/*
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* Probe routine. Initialize cr0 to give correct behaviour for [f]wait
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* whether the device exists or not (XXX should be elsewhere). Set flags
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* to tell npxattach() what to do. Modify device struct if npx doesn't
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* need to use interrupts. Return 1 if device exists.
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*/
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static int
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npxprobe(dvp)
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struct isa_device *dvp;
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{
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#ifdef SMP
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return npxprobe1(dvp);
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#else /* SMP */
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int result;
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u_long save_eflags;
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u_char save_icu1_mask;
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u_char save_icu2_mask;
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struct gate_descriptor save_idt_npxintr;
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struct gate_descriptor save_idt_npxtrap;
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/*
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* This routine is now just a wrapper for npxprobe1(), to install
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* special npx interrupt and trap handlers, to enable npx interrupts
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* and to disable other interrupts. Someday isa_configure() will
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* install suitable handlers and run with interrupts enabled so we
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* won't need to do so much here.
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*/
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npx_intrno = NRSVIDT + ffs(dvp->id_irq) - 1;
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save_eflags = read_eflags();
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disable_intr();
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save_icu1_mask = inb(IO_ICU1 + 1);
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save_icu2_mask = inb(IO_ICU2 + 1);
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save_idt_npxintr = idt[npx_intrno];
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save_idt_npxtrap = idt[16];
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outb(IO_ICU1 + 1, ~(IRQ_SLAVE | dvp->id_irq));
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outb(IO_ICU2 + 1, ~(dvp->id_irq >> 8));
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setidt(16, probetrap, SDT_SYS386TGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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setidt(npx_intrno, probeintr, SDT_SYS386IGT, SEL_KPL, GSEL(GCODE_SEL, SEL_KPL));
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npx_idt_probeintr = idt[npx_intrno];
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enable_intr();
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result = npxprobe1(dvp);
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disable_intr();
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outb(IO_ICU1 + 1, save_icu1_mask);
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outb(IO_ICU2 + 1, save_icu2_mask);
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idt[npx_intrno] = save_idt_npxintr;
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idt[16] = save_idt_npxtrap;
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write_eflags(save_eflags);
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return (result);
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#endif /* SMP */
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}
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static int
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npxprobe1(dvp)
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struct isa_device *dvp;
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{
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u_short control;
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u_short status;
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/*
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* Partially reset the coprocessor, if any. Some BIOS's don't reset
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* it after a warm boot.
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*/
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outb(0xf1, 0); /* full reset on some systems, NOP on others */
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outb(0xf0, 0); /* clear BUSY# latch */
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/*
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* Prepare to trap all ESC (i.e., NPX) instructions and all WAIT
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* instructions. We must set the CR0_MP bit and use the CR0_TS
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* bit to control the trap, because setting the CR0_EM bit does
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* not cause WAIT instructions to trap. It's important to trap
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* WAIT instructions - otherwise the "wait" variants of no-wait
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* control instructions would degenerate to the "no-wait" variants
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* after FP context switches but work correctly otherwise. It's
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* particularly important to trap WAITs when there is no NPX -
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* otherwise the "wait" variants would always degenerate.
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*
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* Try setting CR0_NE to get correct error reporting on 486DX's.
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* Setting it should fail or do nothing on lesser processors.
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*/
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load_cr0(rcr0() | CR0_MP | CR0_NE);
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/*
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* But don't trap while we're probing.
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*/
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stop_emulating();
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/*
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* Finish resetting the coprocessor, if any. If there is an error
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* pending, then we may get a bogus IRQ13, but probeintr() will handle
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* it OK. Bogus halts have never been observed, but we enabled
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* IRQ13 and cleared the BUSY# latch early to handle them anyway.
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*/
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fninit();
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#ifdef SMP
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/*
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* Exception 16 MUST work for SMP.
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*/
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npx_irq13 = 0;
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npx_ex16 = hw_float = npx_exists = 1;
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dvp->id_irq = 0; /* zap the interrupt */
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/*
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* special return value to flag that we do not
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* actually use any I/O registers
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*/
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return (-1);
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#else /* SMP */
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/*
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* Don't use fwait here because it might hang.
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* Don't use fnop here because it usually hangs if there is no FPU.
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*/
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DELAY(1000); /* wait for any IRQ13 */
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#ifdef DIAGNOSTIC
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if (npx_intrs_while_probing != 0)
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printf("fninit caused %u bogus npx interrupt(s)\n",
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npx_intrs_while_probing);
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if (npx_traps_while_probing != 0)
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printf("fninit caused %u bogus npx trap(s)\n",
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npx_traps_while_probing);
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#endif
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/*
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* Check for a status of mostly zero.
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*/
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status = 0x5a5a;
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fnstsw(&status);
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if ((status & 0xb8ff) == 0) {
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/*
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* Good, now check for a proper control word.
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*/
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control = 0x5a5a;
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fnstcw(&control);
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if ((control & 0x1f3f) == 0x033f) {
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hw_float = npx_exists = 1;
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/*
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* We have an npx, now divide by 0 to see if exception
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* 16 works.
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*/
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control &= ~(1 << 2); /* enable divide by 0 trap */
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fldcw(&control);
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npx_traps_while_probing = npx_intrs_while_probing = 0;
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fp_divide_by_0();
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if (npx_traps_while_probing != 0) {
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/*
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* Good, exception 16 works.
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*/
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npx_ex16 = 1;
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dvp->id_irq = 0; /* zap the interrupt */
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/*
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* special return value to flag that we do not
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* actually use any I/O registers
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*/
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return (-1);
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}
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if (npx_intrs_while_probing != 0) {
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/*
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* Bad, we are stuck with IRQ13.
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*/
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npx_irq13 = 1;
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/*
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* npxattach would be too late to set npx0_imask.
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*/
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npx0_imask |= dvp->id_irq;
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return (IO_NPXSIZE);
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}
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/*
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* Worse, even IRQ13 is broken. Use emulator.
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*/
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}
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}
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/*
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* Probe failed, but we want to get to npxattach to initialize the
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* emulator and say that it has been installed. XXX handle devices
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* that aren't really devices better.
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*/
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dvp->id_irq = 0;
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/*
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* special return value to flag that we do not
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* actually use any I/O registers
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*/
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return (-1);
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#endif /* SMP */
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}
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/*
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* Attach routine - announce which it is, and wire into system
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*/
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int
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npxattach(dvp)
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struct isa_device *dvp;
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{
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/* The caller has printed "irq 13" for the npx_irq13 case. */
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if (!npx_irq13) {
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printf("npx%d: ", dvp->id_unit);
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if (npx_ex16)
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printf("INT 16 interface\n");
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#if defined(MATH_EMULATE) || defined(GPL_MATH_EMULATE)
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else if (npx_exists) {
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printf("error reporting broken; using 387 emulator\n");
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hw_float = npx_exists = 0;
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} else
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printf("387 emulator\n");
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#else
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else
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printf("no 387 emulator in kernel!\n");
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#endif
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}
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npxinit(__INITIAL_NPXCW__);
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#if defined(I586_CPU)
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if (cpu_class == CPUCLASS_586 && npx_ex16) {
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if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BCOPY)) {
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bcopy_vector = i586_bcopy;
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ovbcopy_vector = i586_bcopy;
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}
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if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_BZERO))
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bzero = i586_bzero;
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if (!(dvp->id_flags & NPX_DISABLE_I586_OPTIMIZED_COPYIO)) {
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copyin_vector = i586_copyin;
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copyout_vector = i586_copyout;
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}
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}
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#endif
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return (1); /* XXX unused */
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}
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/*
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* Initialize floating point unit.
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*/
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void
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npxinit(control)
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u_short control;
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{
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struct save87 dummy;
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if (!npx_exists)
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return;
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/*
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* fninit has the same h/w bugs as fnsave. Use the detoxified
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* fnsave to throw away any junk in the fpu. npxsave() initializes
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* the fpu and sets npxproc = NULL as important side effects.
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*/
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npxsave(&dummy);
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stop_emulating();
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fldcw(&control);
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if (curpcb != NULL)
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fnsave(&curpcb->pcb_savefpu);
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start_emulating();
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}
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/*
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* Free coprocessor (if we have it).
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*/
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void
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npxexit(p)
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struct proc *p;
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{
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if (p == npxproc)
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npxsave(&curpcb->pcb_savefpu);
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#ifdef NPX_DEBUG
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if (npx_exists) {
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u_int masked_exceptions;
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masked_exceptions = curpcb->pcb_savefpu.sv_env.en_cw
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& curpcb->pcb_savefpu.sv_env.en_sw & 0x7f;
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/*
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* Log exceptions that would have trapped with the old
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* control word (overflow, divide by 0, and invalid operand).
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*/
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if (masked_exceptions & 0x0d)
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log(LOG_ERR,
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"pid %d (%s) exited with masked floating point exceptions 0x%02x\n",
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p->p_pid, p->p_comm, masked_exceptions);
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}
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#endif
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}
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/*
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* Preserve the FP status word, clear FP exceptions, then generate a SIGFPE.
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*
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* Clearing exceptions is necessary mainly to avoid IRQ13 bugs. We now
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* depend on longjmp() restoring a usable state. Restoring the state
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* or examining it might fail if we didn't clear exceptions.
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*
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* XXX there is no standard way to tell SIGFPE handlers about the error
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* state. The old interface:
|
|
*
|
|
* void handler(int sig, int code, struct sigcontext *scp);
|
|
*
|
|
* is broken because it is non-ANSI and because the FP state is not in
|
|
* struct sigcontext.
|
|
*
|
|
* XXX the FP state is not preserved across signal handlers. So signal
|
|
* handlers cannot afford to do FP unless they preserve the state or
|
|
* longjmp() out. Both preserving the state and longjmp()ing may be
|
|
* destroyed by IRQ13 bugs. Clearing FP exceptions is not an acceptable
|
|
* solution for signals other than SIGFPE.
|
|
*/
|
|
void
|
|
npxintr(unit)
|
|
int unit;
|
|
{
|
|
int code;
|
|
struct intrframe *frame;
|
|
|
|
if (npxproc == NULL || !npx_exists) {
|
|
printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
|
|
npxproc, curproc, npx_exists);
|
|
panic("npxintr from nowhere");
|
|
}
|
|
if (npxproc != curproc) {
|
|
printf("npxintr: npxproc = %p, curproc = %p, npx_exists = %d\n",
|
|
npxproc, curproc, npx_exists);
|
|
panic("npxintr from non-current process");
|
|
}
|
|
|
|
outb(0xf0, 0);
|
|
fnstsw(&curpcb->pcb_savefpu.sv_ex_sw);
|
|
fnclex();
|
|
fnop();
|
|
|
|
/*
|
|
* Pass exception to process.
|
|
*/
|
|
frame = (struct intrframe *)&unit; /* XXX */
|
|
if ((ISPL(frame->if_cs) == SEL_UPL) || (frame->if_eflags & PSL_VM)) {
|
|
/*
|
|
* Interrupt is essentially a trap, so we can afford to call
|
|
* the SIGFPE handler (if any) as soon as the interrupt
|
|
* returns.
|
|
*
|
|
* XXX little or nothing is gained from this, and plenty is
|
|
* lost - the interrupt frame has to contain the trap frame
|
|
* (this is otherwise only necessary for the rescheduling trap
|
|
* in doreti, and the frame for that could easily be set up
|
|
* just before it is used).
|
|
*/
|
|
curproc->p_md.md_regs = (struct trapframe *)&frame->if_es;
|
|
#ifdef notyet
|
|
/*
|
|
* Encode the appropriate code for detailed information on
|
|
* this exception.
|
|
*/
|
|
code = XXX_ENCODE(curpcb->pcb_savefpu.sv_ex_sw);
|
|
#else
|
|
code = 0; /* XXX */
|
|
#endif
|
|
trapsignal(curproc, SIGFPE, code);
|
|
} else {
|
|
/*
|
|
* Nested interrupt. These losers occur when:
|
|
* o an IRQ13 is bogusly generated at a bogus time, e.g.:
|
|
* o immediately after an fnsave or frstor of an
|
|
* error state.
|
|
* o a couple of 386 instructions after
|
|
* "fstpl _memvar" causes a stack overflow.
|
|
* These are especially nasty when combined with a
|
|
* trace trap.
|
|
* o an IRQ13 occurs at the same time as another higher-
|
|
* priority interrupt.
|
|
*
|
|
* Treat them like a true async interrupt.
|
|
*/
|
|
psignal(curproc, SIGFPE);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Implement device not available (DNA) exception
|
|
*
|
|
* It would be better to switch FP context here (if curproc != npxproc)
|
|
* and not necessarily for every context switch, but it is too hard to
|
|
* access foreign pcb's.
|
|
*/
|
|
int
|
|
npxdna()
|
|
{
|
|
if (!npx_exists)
|
|
return (0);
|
|
if (npxproc != NULL) {
|
|
printf("npxdna: npxproc = %p, curproc = %p\n",
|
|
npxproc, curproc);
|
|
panic("npxdna");
|
|
}
|
|
stop_emulating();
|
|
/*
|
|
* Record new context early in case frstor causes an IRQ13.
|
|
*/
|
|
npxproc = curproc;
|
|
curpcb->pcb_savefpu.sv_ex_sw = 0;
|
|
/*
|
|
* The following frstor may cause an IRQ13 when the state being
|
|
* restored has a pending error. The error will appear to have been
|
|
* triggered by the current (npx) user instruction even when that
|
|
* instruction is a no-wait instruction that should not trigger an
|
|
* error (e.g., fnclex). On at least one 486 system all of the
|
|
* no-wait instructions are broken the same as frstor, so our
|
|
* treatment does not amplify the breakage. On at least one
|
|
* 386/Cyrix 387 system, fnclex works correctly while frstor and
|
|
* fnsave are broken, so our treatment breaks fnclex if it is the
|
|
* first FPU instruction after a context switch.
|
|
*/
|
|
frstor(&curpcb->pcb_savefpu);
|
|
|
|
return (1);
|
|
}
|
|
|
|
/*
|
|
* Wrapper for fnsave instruction to handle h/w bugs. If there is an error
|
|
* pending, then fnsave generates a bogus IRQ13 on some systems. Force
|
|
* any IRQ13 to be handled immediately, and then ignore it. This routine is
|
|
* often called at splhigh so it must not use many system services. In
|
|
* particular, it's much easier to install a special handler than to
|
|
* guarantee that it's safe to use npxintr() and its supporting code.
|
|
*/
|
|
void
|
|
npxsave(addr)
|
|
struct save87 *addr;
|
|
{
|
|
#ifdef SMP
|
|
|
|
stop_emulating();
|
|
fnsave(addr);
|
|
/* fnop(); */
|
|
start_emulating();
|
|
npxproc = NULL;
|
|
|
|
#else /* SMP */
|
|
|
|
u_char icu1_mask;
|
|
u_char icu2_mask;
|
|
u_char old_icu1_mask;
|
|
u_char old_icu2_mask;
|
|
struct gate_descriptor save_idt_npxintr;
|
|
|
|
disable_intr();
|
|
old_icu1_mask = inb(IO_ICU1 + 1);
|
|
old_icu2_mask = inb(IO_ICU2 + 1);
|
|
save_idt_npxintr = idt[npx_intrno];
|
|
outb(IO_ICU1 + 1, old_icu1_mask & ~(IRQ_SLAVE | npx0_imask));
|
|
outb(IO_ICU2 + 1, old_icu2_mask & ~(npx0_imask >> 8));
|
|
idt[npx_intrno] = npx_idt_probeintr;
|
|
enable_intr();
|
|
stop_emulating();
|
|
fnsave(addr);
|
|
fnop();
|
|
start_emulating();
|
|
npxproc = NULL;
|
|
disable_intr();
|
|
icu1_mask = inb(IO_ICU1 + 1); /* masks may have changed */
|
|
icu2_mask = inb(IO_ICU2 + 1);
|
|
outb(IO_ICU1 + 1,
|
|
(icu1_mask & ~npx0_imask) | (old_icu1_mask & npx0_imask));
|
|
outb(IO_ICU2 + 1,
|
|
(icu2_mask & ~(npx0_imask >> 8))
|
|
| (old_icu2_mask & (npx0_imask >> 8)));
|
|
idt[npx_intrno] = save_idt_npxintr;
|
|
enable_intr(); /* back to usual state */
|
|
|
|
#endif /* SMP */
|
|
}
|
|
|
|
#endif /* NNPX > 0 */
|