c794871343
adds a lock to ensure only a single device is accessing the hardware. A reference count is added to only enable when we start to use the clock, and to disable after we have finished needing the clock. This was extracted from a larger review to add OHCI support to the Allwinner SoCs. Submitted by: Emmanuel Vadot <manu@bidouilliste.com> Reviewed by: jmcneill X-Differential Revision: https://reviews.freebsd.org/D5481
335 lines
9.1 KiB
C
335 lines
9.1 KiB
C
/*-
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* Copyright (c) 2012 Ganbold Tsagaankhuu <ganbold@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Allwinner A10 attachment driver for the USB Enhanced Host Controller.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_bus.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/rman.h>
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#include <sys/condvar.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <machine/bus.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/usb/usb.h>
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#include <dev/usb/usbdi.h>
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#include <dev/usb/usb_core.h>
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#include <dev/usb/usb_busdma.h>
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#include <dev/usb/usb_process.h>
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#include <dev/usb/usb_util.h>
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#include <dev/usb/usb_controller.h>
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#include <dev/usb/usb_bus.h>
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#include <dev/usb/controller/ehci.h>
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#include <dev/usb/controller/ehcireg.h>
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#include <arm/allwinner/allwinner_machdep.h>
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#include <arm/allwinner/a10_clk.h>
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#include <arm/allwinner/a31/a31_clk.h>
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#define EHCI_HC_DEVSTR "Allwinner Integrated USB 2.0 controller"
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#define SW_USB_PMU_IRQ_ENABLE 0x800
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#define SW_SDRAM_REG_HPCR_USB1 (0x250 + ((1 << 2) * 4))
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#define SW_SDRAM_REG_HPCR_USB2 (0x250 + ((1 << 2) * 5))
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#define SW_SDRAM_BP_HPCR_ACCESS (1 << 0)
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#define SW_ULPI_BYPASS (1 << 0)
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#define SW_AHB_INCRX_ALIGN (1 << 8)
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#define SW_AHB_INCR4 (1 << 9)
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#define SW_AHB_INCR8 (1 << 10)
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#define USB_CONF(d) \
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(void *)ofw_bus_search_compatible((d), compat_data)->ocd_data
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#define A10_READ_4(sc, reg) \
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bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg)
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#define A10_WRITE_4(sc, reg, data) \
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bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, reg, data)
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static device_attach_t a10_ehci_attach;
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static device_detach_t a10_ehci_detach;
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bs_r_1_proto(reversed);
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bs_w_1_proto(reversed);
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struct aw_ehci_conf {
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int (*clk_activate)(void);
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int (*clk_deactivate)(void);
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bool sdram_init;
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};
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static const struct aw_ehci_conf a10_ehci_conf = {
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#if defined(SOC_ALLWINNER_A10) || defined(SOC_ALLWINNER_A20)
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.clk_activate = a10_clk_ehci_activate,
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.clk_deactivate = a10_clk_ehci_deactivate,
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#endif
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.sdram_init = true,
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};
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static const struct aw_ehci_conf a31_ehci_conf = {
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#if defined(SOC_ALLWINNER_A31) || defined(SOC_ALLWINNER_A31S)
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.clk_activate = a31_clk_ehci_activate,
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.clk_deactivate = a31_clk_ehci_deactivate,
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#endif
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};
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static struct ofw_compat_data compat_data[] = {
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{ "allwinner,sun4i-a10-ehci", (uintptr_t)&a10_ehci_conf },
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{ "allwinner,sun6i-a31-ehci", (uintptr_t)&a31_ehci_conf },
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{ "allwinner,sun7i-a20-ehci", (uintptr_t)&a10_ehci_conf },
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{ NULL, (uintptr_t)NULL }
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};
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static int
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a10_ehci_probe(device_t self)
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{
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if (!ofw_bus_status_okay(self))
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return (ENXIO);
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if (ofw_bus_search_compatible(self, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(self, EHCI_HC_DEVSTR);
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return (BUS_PROBE_DEFAULT);
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}
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static int
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a10_ehci_attach(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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const struct aw_ehci_conf *conf;
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bus_space_handle_t bsh;
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int err;
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int rid;
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uint32_t reg_value = 0;
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conf = USB_CONF(self);
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if (conf->clk_activate == NULL) {
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device_printf(self, "clock not supported\n");
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return (ENXIO);
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}
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/* initialise some bus fields */
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sc->sc_bus.parent = self;
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sc->sc_bus.devices = sc->sc_devices;
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sc->sc_bus.devices_max = EHCI_MAX_DEVICES;
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sc->sc_bus.dma_bits = 32;
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/* get all DMA memory */
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if (usb_bus_mem_alloc_all(&sc->sc_bus,
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USB_GET_DMA_TAG(self), &ehci_iterate_hw_softc)) {
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return (ENOMEM);
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}
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sc->sc_bus.usbrev = USB_REV_2_0;
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rid = 0;
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sc->sc_io_res = bus_alloc_resource_any(self, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->sc_io_res) {
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device_printf(self, "Could not map memory\n");
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goto error;
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}
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sc->sc_io_tag = rman_get_bustag(sc->sc_io_res);
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sc->sc_io_hdl = rman_get_bushandle(sc->sc_io_res);
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bsh = rman_get_bushandle(sc->sc_io_res);
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sc->sc_io_size = rman_get_size(sc->sc_io_res);
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if (bus_space_subregion(sc->sc_io_tag, bsh, 0x00,
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sc->sc_io_size, &sc->sc_io_hdl) != 0)
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panic("%s: unable to subregion USB host registers",
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device_get_name(self));
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rid = 0;
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sc->sc_irq_res = bus_alloc_resource_any(self, SYS_RES_IRQ, &rid,
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RF_SHAREABLE | RF_ACTIVE);
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if (sc->sc_irq_res == NULL) {
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device_printf(self, "Could not allocate irq\n");
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goto error;
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}
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sc->sc_bus.bdev = device_add_child(self, "usbus", -1);
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if (!sc->sc_bus.bdev) {
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device_printf(self, "Could not add USB device\n");
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goto error;
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}
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device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus);
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device_set_desc(sc->sc_bus.bdev, EHCI_HC_DEVSTR);
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sprintf(sc->sc_vendor, "Allwinner");
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err = bus_setup_intr(self, sc->sc_irq_res, INTR_TYPE_BIO | INTR_MPSAFE,
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NULL, (driver_intr_t *)ehci_interrupt, sc, &sc->sc_intr_hdl);
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if (err) {
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device_printf(self, "Could not setup irq, %d\n", err);
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sc->sc_intr_hdl = NULL;
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goto error;
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}
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sc->sc_flags |= EHCI_SCFLG_DONTRESET;
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/* Enable clock for USB */
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if (conf->clk_activate() != 0) {
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device_printf(self, "Could not activate clock\n");
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goto error;
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}
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/* Enable passby */
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reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
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reg_value |= SW_AHB_INCR8; /* AHB INCR8 enable */
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reg_value |= SW_AHB_INCR4; /* AHB burst type INCR4 enable */
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reg_value |= SW_AHB_INCRX_ALIGN; /* AHB INCRX align enable */
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reg_value |= SW_ULPI_BYPASS; /* ULPI bypass enable */
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A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
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/* Configure port */
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if (conf->sdram_init) {
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value |= SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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}
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err = ehci_init(sc);
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if (!err) {
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err = device_probe_and_attach(sc->sc_bus.bdev);
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}
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if (err) {
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device_printf(self, "USB init failed err=%d\n", err);
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goto error;
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}
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return (0);
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error:
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a10_ehci_detach(self);
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return (ENXIO);
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}
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static int
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a10_ehci_detach(device_t self)
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{
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ehci_softc_t *sc = device_get_softc(self);
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const struct aw_ehci_conf *conf;
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device_t bdev;
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int err;
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uint32_t reg_value = 0;
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conf = USB_CONF(self);
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if (sc->sc_bus.bdev) {
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bdev = sc->sc_bus.bdev;
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device_detach(bdev);
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device_delete_child(self, bdev);
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}
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/* during module unload there are lots of children leftover */
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device_delete_children(self);
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if (sc->sc_irq_res && sc->sc_intr_hdl) {
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/*
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* only call ehci_detach() after ehci_init()
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*/
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ehci_detach(sc);
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err = bus_teardown_intr(self, sc->sc_irq_res, sc->sc_intr_hdl);
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if (err)
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/* XXX or should we panic? */
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device_printf(self, "Could not tear down irq, %d\n",
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err);
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sc->sc_intr_hdl = NULL;
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}
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if (sc->sc_irq_res) {
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bus_release_resource(self, SYS_RES_IRQ, 0, sc->sc_irq_res);
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sc->sc_irq_res = NULL;
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}
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if (sc->sc_io_res) {
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bus_release_resource(self, SYS_RES_MEMORY, 0,
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sc->sc_io_res);
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sc->sc_io_res = NULL;
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}
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usb_bus_mem_free_all(&sc->sc_bus, &ehci_iterate_hw_softc);
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/* Disable configure port */
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if (conf->sdram_init) {
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reg_value = A10_READ_4(sc, SW_SDRAM_REG_HPCR_USB2);
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reg_value &= ~SW_SDRAM_BP_HPCR_ACCESS;
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A10_WRITE_4(sc, SW_SDRAM_REG_HPCR_USB2, reg_value);
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}
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/* Disable passby */
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reg_value = A10_READ_4(sc, SW_USB_PMU_IRQ_ENABLE);
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reg_value &= ~SW_AHB_INCR8; /* AHB INCR8 disable */
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reg_value &= ~SW_AHB_INCR4; /* AHB burst type INCR4 disable */
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reg_value &= ~SW_AHB_INCRX_ALIGN; /* AHB INCRX align disable */
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reg_value &= ~SW_ULPI_BYPASS; /* ULPI bypass disable */
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A10_WRITE_4(sc, SW_USB_PMU_IRQ_ENABLE, reg_value);
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/* Disable clock for USB */
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conf->clk_deactivate();
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return (0);
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}
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static device_method_t ehci_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, a10_ehci_probe),
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DEVMETHOD(device_attach, a10_ehci_attach),
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DEVMETHOD(device_detach, a10_ehci_detach),
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DEVMETHOD(device_suspend, bus_generic_suspend),
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DEVMETHOD(device_resume, bus_generic_resume),
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DEVMETHOD(device_shutdown, bus_generic_shutdown),
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DEVMETHOD_END
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};
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static driver_t ehci_driver = {
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.name = "ehci",
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.methods = ehci_methods,
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.size = sizeof(ehci_softc_t),
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};
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static devclass_t ehci_devclass;
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DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0);
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MODULE_DEPEND(ehci, usb, 1, 1, 1);
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