450 lines
14 KiB
C
450 lines
14 KiB
C
/* $FreeBSD$ */
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/* from $NetBSD: tcds.c,v 1.25 1998/05/26 23:43:05 thorpej Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1994, 1995, 1996 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Keith Bostic, Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include "opt_cpu.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/bus.h>
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#include <sys/malloc.h>
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#include <vm/vm.h>
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#include <vm/vm_extern.h>
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#include <vm/pmap.h>
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#include <machine/rpb.h>
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#include <machine/clock.h>
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#include <alpha/tc/tcreg.h>
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#include <alpha/tc/tcvar.h>
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#include <alpha/tc/tcdevs.h>
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#include <alpha/tc/tcdsreg.h>
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#include <alpha/tc/tcdsvar.h>
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#define KV(pa) ALPHA_PHYS_TO_K0SEG(pa)
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static devclass_t tcds_devclass;
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static device_t tcds0; /* there can be only one */
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struct tcds_softc {
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device_t sc_dv;
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vm_offset_t sc_base;
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void *sc_cookie;
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volatile u_int32_t *sc_cir;
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volatile u_int32_t *sc_imer;
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struct tcds_slotconfig sc_slots[2];
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};
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#define TCDS_SOFTC(dev) (struct tcds_softc*) device_get_softc(dev)
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static int tcds_probe(device_t dev);
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static int tcds_attach(device_t dev);
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static void tcds_intrnull __P((void *));
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static void tcds_lance_dma_setup(void *v);
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static int tcds_intr __P((void *));
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static device_method_t tcds_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, tcds_probe),
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DEVMETHOD(device_attach, tcds_attach),
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DEVMETHOD(bus_print_child, bus_generic_print_child),
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{ 0, 0 }
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};
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static driver_t tcds_driver = {
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"tcds",
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tcds_methods,
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sizeof(struct tcds_softc),
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};
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extern device_t tc0;
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static int
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tcds_probe(device_t dev)
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{
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if((hwrpb->rpb_type != ST_DEC_3000_300) &&
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(hwrpb->rpb_type != ST_DEC_3000_500))
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return ENXIO;
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if(strcmp(device_get_name(dev),"tcds")){
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return ENXIO;
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}
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tcds0 = dev;
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device_set_desc(dev, "Turbochannel Dual Scsi");
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return 0;
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}
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struct tcdsdev_attach_args tcdsdev;
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static int
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tcds_attach(device_t dev)
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{
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struct tcds_softc* sc = TCDS_SOFTC(dev);
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struct tc_attach_args *ta = device_get_ivars(dev);
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device_t parent = device_get_parent(dev);
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vm_offset_t regs,va;
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u_long i;
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struct tcds_slotconfig *slotc;
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struct tcdsdev_attach_args *tcdsdev;
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tcds0 = dev;
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/*
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XXXXXX
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*/
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sc->sc_base = ta->ta_addr;
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sc->sc_cookie = ta->ta_cookie;
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sc->sc_cir = TCDS_REG(sc->sc_base, TCDS_CIR);
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sc->sc_imer = TCDS_REG(sc->sc_base, TCDS_IMER);
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tc_intr_establish(device_get_parent(dev), sc->sc_cookie, 0, tcds_intr, sc);
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/*
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* XXX
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* IMER apparently has some random (or, not so random, but still
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* not useful) bits set in it when the system boots. Clear it.
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*/
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*sc->sc_imer = 0;
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alpha_wmb();
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/* fill in common information first */
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for (i = 0; i < 2; i++) {
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slotc = &sc->sc_slots[i];
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bzero(slotc, sizeof *slotc); /* clear everything */
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slotc->sc_slot = i;
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slotc->sc_tcds = sc;
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slotc->sc_esp = NULL;
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slotc->sc_intrhand = tcds_intrnull;
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slotc->sc_intrarg = (void *)(long)i;
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}
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/* information for slot 0 */
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slotc = &sc->sc_slots[0];
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slotc->sc_resetbits = TCDS_CIR_SCSI0_RESET;
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slotc->sc_intrmaskbits =
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TCDS_IMER_SCSI0_MASK | TCDS_IMER_SCSI0_ENB;
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slotc->sc_intrbits = TCDS_CIR_SCSI0_INT;
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slotc->sc_dmabits = TCDS_CIR_SCSI0_DMAENA;
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slotc->sc_errorbits = 0; /* XXX */
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slotc->sc_sda = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_ADDR);
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slotc->sc_dic = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_INTR);
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slotc->sc_dud0 = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_DUD0);
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slotc->sc_dud1 = TCDS_REG(sc->sc_base, TCDS_SCSI0_DMA_DUD1);
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/* information for slot 1 */
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slotc = &sc->sc_slots[1];
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slotc->sc_resetbits = TCDS_CIR_SCSI1_RESET;
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slotc->sc_intrmaskbits =
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TCDS_IMER_SCSI1_MASK | TCDS_IMER_SCSI1_ENB;
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slotc->sc_intrbits = TCDS_CIR_SCSI1_INT;
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slotc->sc_dmabits = TCDS_CIR_SCSI1_DMAENA;
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slotc->sc_errorbits = 0; /* XXX */
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slotc->sc_sda = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_ADDR);
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slotc->sc_dic = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_INTR);
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slotc->sc_dud0 = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_DUD0);
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slotc->sc_dud1 = TCDS_REG(sc->sc_base, TCDS_SCSI1_DMA_DUD1);
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/* find the hardware attached to the TCDS ASIC */
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tcdsdev = malloc(sizeof(struct tcdsdev_attach_args),
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M_DEVBUF, M_NOWAIT);
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if (tcdsdev) {
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strncpy(tcdsdev->tcdsda_modname, "PMAZ-AA ", TC_ROM_LLEN);
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tcdsdev->tcdsda_slot = 0;
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tcdsdev->tcdsda_offset = 0;
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tcdsdev->tcdsda_addr = (tc_addr_t)
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TC_DENSE_TO_SPARSE(sc->sc_base + TCDS_SCSI0_OFFSET);
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tcdsdev->tcdsda_cookie = (void *)(long)0;
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tcdsdev->tcdsda_sc = &sc->sc_slots[0];
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tcdsdev->tcdsda_id = 7; /* XXX */
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tcdsdev->tcdsda_freq = 25000000; /* XXX */
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tcds_scsi_reset(tcdsdev->tcdsda_sc);
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device_probe_and_attach(device_add_child(dev, "esp", -1, tcdsdev));
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}
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/* the second SCSI chip isn't present on the 3000/300 series. */
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if (hwrpb->rpb_type != ST_DEC_3000_300) {
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tcdsdev = malloc(sizeof(struct tcdsdev_attach_args),
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M_DEVBUF, M_NOWAIT);
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if (tcdsdev) {
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strncpy(tcdsdev->tcdsda_modname, "PMAZ-AA ",
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TC_ROM_LLEN);
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tcdsdev->tcdsda_slot = 1;
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tcdsdev->tcdsda_offset = 0;
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tcdsdev->tcdsda_addr = (tc_addr_t)
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TC_DENSE_TO_SPARSE(sc->sc_base + TCDS_SCSI1_OFFSET);
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tcdsdev->tcdsda_cookie = (void *)(long)1;
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tcdsdev->tcdsda_sc = &sc->sc_slots[1];
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tcdsdev->tcdsda_id = 7; /* XXX */
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tcdsdev->tcdsda_freq = 25000000; /* XXX */
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tcds_scsi_reset(tcdsdev->tcdsda_sc);
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device_probe_and_attach(device_add_child(dev, "esp", -1, tcdsdev));
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}
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}
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return 0;
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}
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void
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tcds_scsi_reset(sc)
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struct tcds_slotconfig *sc;
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{
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tcds_dma_enable(sc, 0);
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tcds_scsi_enable(sc, 0);
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TCDS_CIR_CLR(*sc->sc_tcds->sc_cir, sc->sc_resetbits);
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alpha_mb();
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DELAY(1);
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TCDS_CIR_SET(*sc->sc_tcds->sc_cir, sc->sc_resetbits);
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alpha_mb();
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tcds_scsi_enable(sc, 1);
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tcds_dma_enable(sc, 1);
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}
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void
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tcds_scsi_enable(sc, on)
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struct tcds_slotconfig *sc;
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int on;
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{
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if (on)
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*sc->sc_tcds->sc_imer |= sc->sc_intrmaskbits;
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else
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*sc->sc_tcds->sc_imer &= ~sc->sc_intrmaskbits;
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alpha_mb();
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}
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void
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tcds_dma_enable(sc, on)
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struct tcds_slotconfig *sc;
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int on;
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{
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/* XXX Clear/set IOSLOT/PBS bits. */
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if (on)
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TCDS_CIR_SET(*sc->sc_tcds->sc_cir, sc->sc_dmabits);
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else
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TCDS_CIR_CLR(*sc->sc_tcds->sc_cir, sc->sc_dmabits);
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alpha_mb();
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}
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int
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tcds_scsi_isintr(sc, clear)
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struct tcds_slotconfig *sc;
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int clear;
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{
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if ((*sc->sc_tcds->sc_cir & sc->sc_intrbits) != 0) {
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if (clear) {
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TCDS_CIR_CLR(*sc->sc_tcds->sc_cir, sc->sc_intrbits);
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alpha_mb();
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}
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return (1);
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} else
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return (0);
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}
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int
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tcds_scsi_iserr(sc)
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struct tcds_slotconfig *sc;
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{
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return ((*sc->sc_tcds->sc_cir & sc->sc_errorbits) != 0);
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}
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static void
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tcds_intrnull(void *val)
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{
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panic("tcds_intrnull: uncaught IOASIC intr for cookie %ld\n",
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(u_long)val);
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}
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void
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tcds_intr_establish(tcds, cookie, level, func, arg)
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struct device *tcds;
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void *cookie, *arg;
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tc_intrlevel_t level;
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int (*func) __P((void *));
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{
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struct tcds_softc *sc = device_get_softc(tcds);
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u_long slot;
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slot = (u_long)cookie;
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#ifdef DIAGNOSTIC
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/* XXX check cookie. */
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#endif
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if (sc->sc_slots[slot].sc_intrhand != tcds_intrnull){
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panic("tcds_intr_establish: cookie %d twice, intrhdlr = 0x%lx",
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slot,sc->sc_slots[slot].sc_intrhand );
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}
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sc->sc_slots[slot].sc_intrhand = func;
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sc->sc_slots[slot].sc_intrarg = arg;
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tcds_scsi_reset(&sc->sc_slots[slot]);
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}
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void
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tcds_intr_disestablish(tcds, cookie)
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struct device *tcds;
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void *cookie;
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{
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struct tcds_softc *sc = device_get_softc(tcds);
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u_long slot;
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slot = (u_long)cookie;
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#ifdef DIAGNOSTIC
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/* XXX check cookie. */
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#endif
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if (sc->sc_slots[slot].sc_intrhand == tcds_intrnull)
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panic("tcds_intr_disestablish: cookie %d missing intr",
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slot);
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sc->sc_slots[slot].sc_intrhand = tcds_intrnull;
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sc->sc_slots[slot].sc_intrarg = (void *)slot;
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tcds_dma_enable(&sc->sc_slots[slot], 0);
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tcds_scsi_enable(&sc->sc_slots[slot], 0);
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}
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static int
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tcds_intr(val)
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void *val;
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{
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struct tcds_softc *sc;
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u_int32_t ir;
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sc = val;
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/*
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* XXX
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* Copy and clear (gag!) the interrupts.
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*/
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ir = *sc->sc_cir;
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alpha_mb();
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TCDS_CIR_CLR(*sc->sc_cir, TCDS_CIR_ALLINTR);
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alpha_mb();
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tc_syncbus();
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alpha_mb();
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#define CHECKINTR(slot) \
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if (ir & sc->sc_slots[slot].sc_intrbits) { \
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(void)(*sc->sc_slots[slot].sc_intrhand) \
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(sc->sc_slots[slot].sc_intrarg); \
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}
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CHECKINTR(0);
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CHECKINTR(1);
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#undef CHECKINTR
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#ifdef DIAGNOSTIC
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/*
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* Interrupts not currently handled, but would like to know if they
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* occur.
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*
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* XXX
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* Don't know if we have to set the interrupt mask and enable bits
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* in the IMER to allow some of them to happen?
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*/
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#define PRINTINTR(msg, bits) \
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if (ir & bits) \
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printf(msg);
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PRINTINTR("SCSI0 DREQ interrupt.\n", TCDS_CIR_SCSI0_DREQ);
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PRINTINTR("SCSI1 DREQ interrupt.\n", TCDS_CIR_SCSI1_DREQ);
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PRINTINTR("SCSI0 prefetch interrupt.\n", TCDS_CIR_SCSI0_PREFETCH);
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PRINTINTR("SCSI1 prefetch interrupt.\n", TCDS_CIR_SCSI1_PREFETCH);
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PRINTINTR("SCSI0 DMA error.\n", TCDS_CIR_SCSI0_DMA);
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PRINTINTR("SCSI1 DMA error.\n", TCDS_CIR_SCSI1_DMA);
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PRINTINTR("SCSI0 DB parity error.\n", TCDS_CIR_SCSI0_DB);
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PRINTINTR("SCSI1 DB parity error.\n", TCDS_CIR_SCSI1_DB);
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PRINTINTR("SCSI0 DMA buffer parity error.\n", TCDS_CIR_SCSI0_DMAB_PAR);
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PRINTINTR("SCSI1 DMA buffer parity error.\n", TCDS_CIR_SCSI1_DMAB_PAR);
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PRINTINTR("SCSI0 DMA read parity error.\n", TCDS_CIR_SCSI0_DMAR_PAR);
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PRINTINTR("SCSI1 DMA read parity error.\n", TCDS_CIR_SCSI1_DMAR_PAR);
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PRINTINTR("TC write parity error.\n", TCDS_CIR_TCIOW_PAR);
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PRINTINTR("TC I/O address parity error.\n", TCDS_CIR_TCIOA_PAR);
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#undef PRINTINTR
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#endif
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/*
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* XXX
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* The MACH source had this, with the comment:
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* This is wrong, but machine keeps dying.
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*/
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DELAY(1);
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return 1;
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}
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DRIVER_MODULE(tcds, tc, tcds_driver, tcds_devclass, 0, 0);
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