c90f7d9b44
they need to be a single statement, and do { } while (0) doesn't work in this
situation so revert until a solution can be devised.
677 lines
20 KiB
C
677 lines
20 KiB
C
/*-
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* Copyright (c) KATO Takenori, 1999.
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*
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* All rights reserved. Unpublished rights reserved under the copyright
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* laws of Japan.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer as
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* the first lines of this file unmodified.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* $NecBSD: busio.h,v 3.25.4.2.2.1 2000/06/12 03:53:08 honda Exp $ */
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/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
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/*-
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1997, 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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*
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* [Ported for FreeBSD]
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* Copyright (c) 2001
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* TAKAHASHI Yoshihiro. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1997, 1998
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* Naofumi HONDA. All rights reserved.
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*
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* This module support generic bus address relocation mechanism.
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* To reduce a function call overhead, we employ pascal call methods.
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*/
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#ifndef _PC98_BUS_H_
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#define _PC98_BUS_H_
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#include <sys/systm.h>
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#include <machine/_bus.h>
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#include <machine/cpufunc.h>
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#define BUS_SPACE_MAXSIZE_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXSIZE 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR_24BIT 0xFFFFFF
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#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF
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#define BUS_SPACE_MAXADDR 0xFFFFFFFF
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#define BUS_SPACE_UNRESTRICTED (~0)
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/*
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* address relocation table
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*/
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#define BUS_SPACE_IAT_MAXSIZE 33
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typedef bus_addr_t *bus_space_iat_t;
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#define BUS_SPACE_IAT_SZ(IOTARRAY) (sizeof(IOTARRAY)/sizeof(bus_addr_t))
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/*
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* Access methods for bus resources and address space.
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*/
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struct resource;
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/*
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* bus space tag
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*/
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#define _PASCAL_CALL (void)
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#define _BUS_SPACE_CALL_FUNCS_TAB(NAME,TYPE,BWN) \
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NAME##_space_read_##BWN, \
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NAME##_space_read_multi_##BWN, \
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NAME##_space_read_region_##BWN, \
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NAME##_space_write_##BWN, \
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NAME##_space_write_multi_##BWN, \
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NAME##_space_write_region_##BWN, \
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NAME##_space_set_multi_##BWN, \
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NAME##_space_set_region_##BWN, \
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NAME##_space_copy_region_##BWN
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#define _BUS_SPACE_CALL_FUNCS_PROTO(NAME,TYPE,BWN) \
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TYPE NAME##_space_read_##BWN _PASCAL_CALL; \
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void NAME##_space_read_multi_##BWN _PASCAL_CALL; \
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void NAME##_space_read_region_##BWN _PASCAL_CALL; \
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void NAME##_space_write_##BWN _PASCAL_CALL; \
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void NAME##_space_write_multi_##BWN _PASCAL_CALL; \
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void NAME##_space_write_region_##BWN _PASCAL_CALL; \
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void NAME##_space_set_multi_##BWN _PASCAL_CALL; \
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void NAME##_space_set_region_##BWN _PASCAL_CALL; \
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void NAME##_space_copy_region_##BWN _PASCAL_CALL;
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#define _BUS_SPACE_CALL_FUNCS(NAME,TYPE,BWN) \
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TYPE (* NAME##_read_##BWN) _PASCAL_CALL; \
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void (* NAME##_read_multi_##BWN) _PASCAL_CALL; \
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void (* NAME##_read_region_##BWN) _PASCAL_CALL; \
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void (* NAME##_write_##BWN) _PASCAL_CALL; \
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void (* NAME##_write_multi_##BWN) _PASCAL_CALL; \
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void (* NAME##_write_region_##BWN) _PASCAL_CALL; \
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void (* NAME##_set_multi_##BWN) _PASCAL_CALL; \
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void (* NAME##_set_region_##BWN) _PASCAL_CALL; \
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void (* NAME##_copy_region_##BWN) _PASCAL_CALL;
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struct bus_space_access_methods {
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/* 8 bits access methods */
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_BUS_SPACE_CALL_FUNCS(bs,u_int8_t,1)
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/* 16 bits access methods */
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_BUS_SPACE_CALL_FUNCS(bs,u_int16_t,2)
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/* 32 bits access methods */
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_BUS_SPACE_CALL_FUNCS(bs,u_int32_t,4)
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};
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/*
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* Access methods for bus resources and address space.
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*/
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struct bus_space_tag {
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#define BUS_SPACE_TAG_IO 0
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#define BUS_SPACE_TAG_MEM 1
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u_int bs_tag; /* bus space flags */
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struct bus_space_access_methods bs_da; /* direct access */
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struct bus_space_access_methods bs_ra; /* relocate access */
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#if 0
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struct bus_space_access_methods bs_ida; /* indexed direct access */
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#endif
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};
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/*
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* bus space handle
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*/
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struct bus_space_handle {
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bus_addr_t bsh_base;
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size_t bsh_sz;
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bus_addr_t bsh_iat[BUS_SPACE_IAT_MAXSIZE];
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size_t bsh_maxiatsz;
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size_t bsh_iatsz;
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struct resource **bsh_res;
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size_t bsh_ressz;
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struct bus_space_access_methods bsh_bam;
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};
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/*
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* Values for the pc98 bus space tag, not to be used directly by MI code.
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*/
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extern struct bus_space_tag SBUS_io_space_tag;
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extern struct bus_space_tag SBUS_mem_space_tag;
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#define I386_BUS_SPACE_IO (&SBUS_io_space_tag)
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#define I386_BUS_SPACE_MEM (&SBUS_mem_space_tag)
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/*
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* Allocate/Free bus_space_handle
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*/
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int i386_bus_space_handle_alloc(bus_space_tag_t t, bus_addr_t bpa,
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bus_size_t size, bus_space_handle_t *bshp);
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void i386_bus_space_handle_free(bus_space_tag_t t, bus_space_handle_t bsh,
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size_t size);
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/*
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* int bus_space_map (bus_space_tag_t t, bus_addr_t addr,
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* bus_size_t size, int flag, bus_space_handle_t *bshp);
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*
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* Map a region of bus space.
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*/
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int i386_memio_map(bus_space_tag_t t, bus_addr_t addr, bus_size_t size,
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int flag, bus_space_handle_t *bshp);
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#define bus_space_map(t, a, s, f, hp) \
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i386_memio_map((t), (a), (s), (f), (hp))
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/*
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* int bus_space_unmap (bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t size);
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*
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* Unmap a region of bus space.
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*/
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void i386_memio_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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#define bus_space_unmap(t, h, s) \
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i386_memio_unmap((t), (h), (s))
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/*
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* int bus_space_map_load (bus_space_tag_t t, bus_space_handle_t bsh,
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* bus_size_t size, bus_space_iat_t iat, u_int flags);
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*
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* Load I/O address table of bus space.
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*/
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int i386_memio_map_load(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size, bus_space_iat_t iat, u_int flags);
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#define bus_space_map_load(t, h, s, iat, f) \
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i386_memio_map_load((t), (h), (s), (iat), (f))
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/*
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* int bus_space_subregion (bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
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* bus_space_handle_t *nbshp);
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*
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* Get a new handle for a subregion of an already-mapped area of bus space.
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*/
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int i386_memio_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t offset, bus_size_t size,
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bus_space_handle_t *nbshp);
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#define bus_space_subregion(t, h, o, s, nhp) \
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i386_memio_subregion((t), (h), (o), (s), (nhp))
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/*
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* int bus_space_free (bus_space_tag_t t,
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* bus_space_handle_t bsh, bus_size_t size);
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*
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* Free a region of bus space.
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*/
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void i386_memio_free(bus_space_tag_t t, bus_space_handle_t bsh,
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bus_size_t size);
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#define bus_space_free(t, h, s) \
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i386_memio_free((t), (h), (s))
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/*
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* int bus_space_compare (bus_space_tag_t t1, bus_space_handle_t bsh1,
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* bus_space_tag_t t2, bus_space_handle_t bsh2);
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*
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* Compare two resources.
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*/
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int i386_memio_compare(bus_space_tag_t t1, bus_space_handle_t bsh1,
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bus_space_tag_t t2, bus_space_handle_t bsh2);
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#define bus_space_compare(t1, h1, t2, h2) \
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i386_memio_compare((t1), (h1), (t2), (h2))
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/*
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* Access methods for bus resources and address space.
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*/
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#define _BUS_ACCESS_METHODS_PROTO(TYPE,BWN) \
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static __inline TYPE bus_space_read_##BWN \
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(bus_space_tag_t, bus_space_handle_t, bus_size_t offset); \
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static __inline void bus_space_read_multi_##BWN \
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(bus_space_tag_t, bus_space_handle_t, \
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bus_size_t, TYPE *, size_t); \
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static __inline void bus_space_read_region_##BWN \
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(bus_space_tag_t, bus_space_handle_t, \
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bus_size_t, TYPE *, size_t); \
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static __inline void bus_space_write_##BWN \
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(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE); \
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static __inline void bus_space_write_multi_##BWN \
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(bus_space_tag_t, bus_space_handle_t, \
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bus_size_t, const TYPE *, size_t); \
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static __inline void bus_space_write_region_##BWN \
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(bus_space_tag_t, bus_space_handle_t, \
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bus_size_t, const TYPE *, size_t); \
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static __inline void bus_space_set_multi_##BWN \
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(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
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static __inline void bus_space_set_region_##BWN \
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(bus_space_tag_t, bus_space_handle_t, bus_size_t, TYPE, size_t);\
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static __inline void bus_space_copy_region_##BWN \
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(bus_space_tag_t, bus_space_handle_t, bus_size_t, \
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bus_space_handle_t, bus_size_t, size_t);
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_BUS_ACCESS_METHODS_PROTO(u_int8_t,1)
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_BUS_ACCESS_METHODS_PROTO(u_int16_t,2)
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_BUS_ACCESS_METHODS_PROTO(u_int32_t,4)
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/*
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* read methods
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*/
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#define _BUS_SPACE_READ(TYPE,BWN) \
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static __inline TYPE \
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bus_space_read_##BWN (tag, bsh, offset) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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{ \
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register TYPE result; \
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\
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__asm __volatile("call *%2" \
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:"=a" (result), \
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"=d" (offset) \
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:"o" (bsh->bsh_bam.bs_read_##BWN), \
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"b" (bsh), \
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"1" (offset) \
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); \
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\
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return result; \
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}
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_BUS_SPACE_READ(u_int8_t,1)
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_BUS_SPACE_READ(u_int16_t,2)
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_BUS_SPACE_READ(u_int32_t,4)
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/*
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* write methods
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*/
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#define _BUS_SPACE_WRITE(TYPE,BWN) \
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static __inline void \
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bus_space_write_##BWN (tag, bsh, offset, val) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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TYPE val; \
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{ \
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\
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__asm __volatile("call *%1" \
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:"=d" (offset) \
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:"o" (bsh->bsh_bam.bs_write_##BWN), \
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"a" (val), \
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"b" (bsh), \
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"0" (offset) \
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); \
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}
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_BUS_SPACE_WRITE(u_int8_t,1)
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_BUS_SPACE_WRITE(u_int16_t,2)
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_BUS_SPACE_WRITE(u_int32_t,4)
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/*
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* multi read
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*/
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#define _BUS_SPACE_READ_MULTI(TYPE,BWN) \
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static __inline void \
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bus_space_read_multi_##BWN (tag, bsh, offset, buf, cnt) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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TYPE *buf; \
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size_t cnt; \
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{ \
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\
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__asm __volatile("call *%3" \
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:"=c" (cnt), \
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"=d" (offset), \
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"=D" (buf) \
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:"o" (bsh->bsh_bam.bs_read_multi_##BWN), \
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"b" (bsh), \
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"0" (cnt), \
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"1" (offset), \
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"2" (buf) \
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:"memory"); \
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}
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_BUS_SPACE_READ_MULTI(u_int8_t,1)
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_BUS_SPACE_READ_MULTI(u_int16_t,2)
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_BUS_SPACE_READ_MULTI(u_int32_t,4)
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/*
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* multi write
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*/
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#define _BUS_SPACE_WRITE_MULTI(TYPE,BWN) \
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static __inline void \
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bus_space_write_multi_##BWN (tag, bsh, offset, buf, cnt) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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const TYPE *buf; \
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size_t cnt; \
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{ \
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\
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__asm __volatile("call *%3" \
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:"=c" (cnt), \
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"=d" (offset), \
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"=S" (buf) \
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:"o" (bsh->bsh_bam.bs_write_multi_##BWN), \
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"b" (bsh), \
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"0" (cnt), \
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"1" (offset), \
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"2" (buf) \
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); \
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}
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_BUS_SPACE_WRITE_MULTI(u_int8_t,1)
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_BUS_SPACE_WRITE_MULTI(u_int16_t,2)
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_BUS_SPACE_WRITE_MULTI(u_int32_t,4)
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/*
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* region read
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*/
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#define _BUS_SPACE_READ_REGION(TYPE,BWN) \
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static __inline void \
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bus_space_read_region_##BWN (tag, bsh, offset, buf, cnt) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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TYPE *buf; \
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size_t cnt; \
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{ \
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\
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__asm __volatile("call *%3" \
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:"=c" (cnt), \
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"=d" (offset), \
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"=D" (buf) \
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:"o" (bsh->bsh_bam.bs_read_region_##BWN), \
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"b" (bsh), \
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"0" (cnt), \
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"1" (offset), \
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"2" (buf) \
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:"memory"); \
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}
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_BUS_SPACE_READ_REGION(u_int8_t,1)
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_BUS_SPACE_READ_REGION(u_int16_t,2)
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_BUS_SPACE_READ_REGION(u_int32_t,4)
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|
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/*
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* region write
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*/
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#define _BUS_SPACE_WRITE_REGION(TYPE,BWN) \
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static __inline void \
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bus_space_write_region_##BWN (tag, bsh, offset, buf, cnt) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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const TYPE *buf; \
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size_t cnt; \
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{ \
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\
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__asm __volatile("call *%3" \
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:"=c" (cnt), \
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"=d" (offset), \
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"=S" (buf) \
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:"o" (bsh->bsh_bam.bs_write_region_##BWN), \
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"b" (bsh), \
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"0" (cnt), \
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"1" (offset), \
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"2" (buf) \
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); \
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}
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_BUS_SPACE_WRITE_REGION(u_int8_t,1)
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_BUS_SPACE_WRITE_REGION(u_int16_t,2)
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_BUS_SPACE_WRITE_REGION(u_int32_t,4)
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|
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/*
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* multi set
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|
*/
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#define _BUS_SPACE_SET_MULTI(TYPE,BWN) \
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static __inline void \
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bus_space_set_multi_##BWN (tag, bsh, offset, val, cnt) \
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bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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TYPE val; \
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size_t cnt; \
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{ \
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\
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__asm __volatile("call *%2" \
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:"=c" (cnt), \
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"=d" (offset) \
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:"o" (bsh->bsh_bam.bs_set_multi_##BWN), \
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"a" (val), \
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"b" (bsh), \
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"0" (cnt), \
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"1" (offset) \
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); \
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}
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|
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_BUS_SPACE_SET_MULTI(u_int8_t,1)
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_BUS_SPACE_SET_MULTI(u_int16_t,2)
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_BUS_SPACE_SET_MULTI(u_int32_t,4)
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|
|
|
/*
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* region set
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*/
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#define _BUS_SPACE_SET_REGION(TYPE,BWN) \
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static __inline void \
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bus_space_set_region_##BWN (tag, bsh, offset, val, cnt) \
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|
bus_space_tag_t tag; \
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bus_space_handle_t bsh; \
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bus_size_t offset; \
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TYPE val; \
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|
size_t cnt; \
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|
{ \
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\
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__asm __volatile("call *%2" \
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:"=c" (cnt), \
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"=d" (offset) \
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:"o" (bsh->bsh_bam.bs_set_region_##BWN), \
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|
"a" (val), \
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"b" (bsh), \
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"0" (cnt), \
|
|
"1" (offset) \
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); \
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}
|
|
|
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_BUS_SPACE_SET_REGION(u_int8_t,1)
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_BUS_SPACE_SET_REGION(u_int16_t,2)
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_BUS_SPACE_SET_REGION(u_int32_t,4)
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|
|
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/*
|
|
* copy
|
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*/
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|
#define _BUS_SPACE_COPY_REGION(BWN) \
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static __inline void \
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bus_space_copy_region_##BWN (tag, sbsh, src, dbsh, dst, cnt) \
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|
bus_space_tag_t tag; \
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bus_space_handle_t sbsh; \
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|
bus_size_t src; \
|
|
bus_space_handle_t dbsh; \
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|
bus_size_t dst; \
|
|
size_t cnt; \
|
|
{ \
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|
\
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|
if (dbsh->bsh_bam.bs_copy_region_1 != sbsh->bsh_bam.bs_copy_region_1) \
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panic("bus_space_copy_region: funcs mismatch (ENOSUPPORT)");\
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|
\
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|
__asm __volatile("call *%3" \
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|
:"=c" (cnt), \
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|
"=S" (src), \
|
|
"=D" (dst) \
|
|
:"o" (dbsh->bsh_bam.bs_copy_region_##BWN), \
|
|
"a" (sbsh), \
|
|
"b" (dbsh), \
|
|
"0" (cnt), \
|
|
"1" (src), \
|
|
"2" (dst) \
|
|
); \
|
|
}
|
|
|
|
_BUS_SPACE_COPY_REGION(1)
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|
_BUS_SPACE_COPY_REGION(2)
|
|
_BUS_SPACE_COPY_REGION(4)
|
|
|
|
/*
|
|
* Bus read/write barrier methods.
|
|
*
|
|
* void bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
* bus_size_t offset, bus_size_t len, int flags);
|
|
*
|
|
*
|
|
* Note that BUS_SPACE_BARRIER_WRITE doesn't do anything other than
|
|
* prevent reordering by the compiler; all Intel x86 processors currently
|
|
* retire operations outside the CPU in program order.
|
|
*/
|
|
#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
|
|
#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
|
|
|
|
static __inline void
|
|
bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t bsh,
|
|
bus_size_t offset, bus_size_t len, int flags)
|
|
{
|
|
if (flags & BUS_SPACE_BARRIER_READ)
|
|
__asm __volatile("lock; addl $0,0(%%esp)" : : : "memory");
|
|
else
|
|
__asm __volatile("" : : : "memory");
|
|
}
|
|
|
|
#ifdef BUS_SPACE_NO_LEGACY
|
|
#undef inb
|
|
#undef outb
|
|
#define inb(a) compiler_error
|
|
#define inw(a) compiler_error
|
|
#define inl(a) compiler_error
|
|
#define outb(a, b) compiler_error
|
|
#define outw(a, b) compiler_error
|
|
#define outl(a, b) compiler_error
|
|
#endif
|
|
|
|
#include <machine/bus_dma.h>
|
|
|
|
/*
|
|
* Stream accesses are the same as normal accesses on i386/pc98; there are no
|
|
* supported bus systems with an endianess different from the host one.
|
|
*/
|
|
#define bus_space_read_stream_1(t, h, o) bus_space_read_1((t), (h), (o))
|
|
#define bus_space_read_stream_2(t, h, o) bus_space_read_2((t), (h), (o))
|
|
#define bus_space_read_stream_4(t, h, o) bus_space_read_4((t), (h), (o))
|
|
|
|
#define bus_space_read_multi_stream_1(t, h, o, a, c) \
|
|
bus_space_read_multi_1((t), (h), (o), (a), (c))
|
|
#define bus_space_read_multi_stream_2(t, h, o, a, c) \
|
|
bus_space_read_multi_2((t), (h), (o), (a), (c))
|
|
#define bus_space_read_multi_stream_4(t, h, o, a, c) \
|
|
bus_space_read_multi_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_write_stream_1(t, h, o, v) \
|
|
bus_space_write_1((t), (h), (o), (v))
|
|
#define bus_space_write_stream_2(t, h, o, v) \
|
|
bus_space_write_2((t), (h), (o), (v))
|
|
#define bus_space_write_stream_4(t, h, o, v) \
|
|
bus_space_write_4((t), (h), (o), (v))
|
|
|
|
#define bus_space_write_multi_stream_1(t, h, o, a, c) \
|
|
bus_space_write_multi_1((t), (h), (o), (a), (c))
|
|
#define bus_space_write_multi_stream_2(t, h, o, a, c) \
|
|
bus_space_write_multi_2((t), (h), (o), (a), (c))
|
|
#define bus_space_write_multi_stream_4(t, h, o, a, c) \
|
|
bus_space_write_multi_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_set_multi_stream_1(t, h, o, v, c) \
|
|
bus_space_set_multi_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_2(t, h, o, v, c) \
|
|
bus_space_set_multi_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_multi_stream_4(t, h, o, v, c) \
|
|
bus_space_set_multi_4((t), (h), (o), (v), (c))
|
|
|
|
#define bus_space_read_region_stream_1(t, h, o, a, c) \
|
|
bus_space_read_region_1((t), (h), (o), (a), (c))
|
|
#define bus_space_read_region_stream_2(t, h, o, a, c) \
|
|
bus_space_read_region_2((t), (h), (o), (a), (c))
|
|
#define bus_space_read_region_stream_4(t, h, o, a, c) \
|
|
bus_space_read_region_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_write_region_stream_1(t, h, o, a, c) \
|
|
bus_space_write_region_1((t), (h), (o), (a), (c))
|
|
#define bus_space_write_region_stream_2(t, h, o, a, c) \
|
|
bus_space_write_region_2((t), (h), (o), (a), (c))
|
|
#define bus_space_write_region_stream_4(t, h, o, a, c) \
|
|
bus_space_write_region_4((t), (h), (o), (a), (c))
|
|
|
|
#define bus_space_set_region_stream_1(t, h, o, v, c) \
|
|
bus_space_set_region_1((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_2(t, h, o, v, c) \
|
|
bus_space_set_region_2((t), (h), (o), (v), (c))
|
|
#define bus_space_set_region_stream_4(t, h, o, v, c) \
|
|
bus_space_set_region_4((t), (h), (o), (v), (c))
|
|
|
|
#define bus_space_copy_region_stream_1(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_1((t), (h1), (o1), (h2), (o2), (c))
|
|
#define bus_space_copy_region_stream_2(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_2((t), (h1), (o1), (h2), (o2), (c))
|
|
#define bus_space_copy_region_stream_4(t, h1, o1, h2, o2, c) \
|
|
bus_space_copy_region_4((t), (h1), (o1), (h2), (o2), (c))
|
|
|
|
#endif /* _PC98_BUS_H_ */
|