8b57ee7e01
SDHCI controllers found in the QorIQ SoCs offer improved accuracy of the clock frequency selection, compared to the SDHCI standard. Frequency selection is performed using two divider registers, named prescaler and divisor, according to the following formula: frequency = base clock / (prescaler * divisor), where prescaler can be bypassed (set to 1) and divisor permitted to take odd values. Rather than depend on clock division precalculated by sdhci core, make use of this property of the divider registers and achieve frequencies closer to the ones requested. Obtained from: Semihalf Sponsored by: Alstom Group Differential revision: https://reviews.freebsd.org/D32706 |
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| .. | ||
| fsl_sdhci.c | ||
| sdhci_acpi.c | ||
| sdhci_fdt_gpio.c | ||
| sdhci_fdt_gpio.h | ||
| sdhci_fdt.c | ||
| sdhci_fsl_fdt.c | ||
| sdhci_if.m | ||
| sdhci_pci.c | ||
| sdhci_xenon_acpi.c | ||
| sdhci_xenon_fdt.c | ||
| sdhci_xenon.c | ||
| sdhci_xenon.h | ||
| sdhci.c | ||
| sdhci.h | ||