c59adfc6a5
QSFP+ data via i2c inteface. These constants has been taken
from SFF-8436 "QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER" standard
rev 4.8.
* Add support for printing QSFP+ information from 40G NICs
such as Chelsio T5.
This commit does not contain ioctl changes necessary for this
functionality work, there will be another commit soon.
Example:
cxl1: flags=8843<UP,BROADCAST,RUNNING,SIMPLEX,MULTICAST> metric 0 mtu 1500
options=ec07bb<RXCSUM,TXCSUM,VLAN_MTU,VLAN_HWTAGGING,JUMBO_MTU,.....>
ether 00:07:43:28:ad:08
nd6 options=29<PERFORMNUD,IFDISABLED,AUTO_LINKLOCAL>
media: Ethernet 40Gbase-LR4 <full-duplex>
status: active
plugged: QSFP+ 40GBASE-LR4 (MPO Parallel Optic)
vendor: OEM PN: OP-QSFP-40G-LR4 SN: 20140318001 DATE: 2014-03-18
module temperature: 64.06 C voltage: 3.26 Volts
lane 1: RX: 0.47 mW (-3.21 dBm) TX: 2.78 mW (4.46 dBm)
lane 2: RX: 0.20 mW (-6.94 dBm) TX: 2.80 mW (4.47 dBm)
lane 3: RX: 0.18 mW (-7.38 dBm) TX: 2.79 mW (4.47 dBm)
lane 4: RX: 0.90 mW (-0.45 dBm) TX: 2.80 mW (4.48 dBm)
Tested on: Chelsio T5
Tested on: Mellanox/Huawei passive/active cables/transceivers.
MFC after: 2 weeks
Sponsored by: Yandex LLC
212 lines
8.2 KiB
C
212 lines
8.2 KiB
C
/*-
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* Copyright (c) 2014 Yandex LLC.
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*
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* The following set of constants are from Document SFF-8436
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* "QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER" revision 4.8 dated October 31, 2013
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*
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* This SFF standard defines the following QSFP+ memory address module:
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*
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* 1) 256-byte addressable block and 128-byte pages
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* 2) Lower 128-bytes addresses always refer to the same page
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* 3) Upper address space may refer to different pages depending on
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* "page select" byte value.
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*
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* Map description:
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*
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* Serial address 0xA02:
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*
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* Lower bits
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* 0-127 Monitoring data & page select byte
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* 128-255:
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*
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* Page 00:
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* 128-191 Base ID Fields
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* 191-223 Extended ID
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* 223-255 Vendor Specific ID
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*
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* Page 01 (optional):
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* 128-255 App-specific data
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*
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* Page 02 (optional):
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* 128-255 User EEPROM Data
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*
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* Page 03 (optional for Cable Assmeblies)
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* 128-223 Thresholds
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* 225-237 Vendor Specific
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* 238-253 Channel Controls/Monitor
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* 254-255 Reserverd
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*
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* All these values are read across an I2C (i squared C) bus.
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*/
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#define SFF_8436_BASE 0xA0 /* Base address for all requests */
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/* Table 17 - Lower Memory Map */
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enum {
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SFF_8436_MID = 0, /* Copy of SFF_8436_ID field */
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SFF_8436_STATUS = 1, /* 2-bytes status (Table 18) */
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SFF_8436_INTR_START = 3, /* Interrupt flags (Tables 19-21) */
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SFF_8436_INTR_END = 21,
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SFF_8436_MODMON_START = 22, /* Module monitors (Table 22 */
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SFF_8436_TEMP = 22, /* Internally measured module temp */
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SFF_8436_VCC = 26, /* Internally mesasure module
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* supplied voltage */
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SFF_8436_MODMON_END = 33,
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SFF_8436_CHMON_START = 34, /* Channel monitors (Table 23) */
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SFF_8436_RX_CH1_MSB = 34, /* Internally measured RX input power */
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SFF_8436_RX_CH1_LSB = 35, /* for channel 1 */
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SFF_8436_RX_CH2_MSB = 36, /* Internally measured RX input power */
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SFF_8436_RX_CH2_LSB = 37, /* for channel 2 */
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SFF_8436_RX_CH3_MSB = 38, /* Internally measured RX input power */
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SFF_8436_RX_CH3_LSB = 39, /* for channel 3 */
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SFF_8436_RX_CH4_MSB = 40, /* Internally measured RX input power */
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SFF_8436_RX_CH4_LSB = 41, /* for channel 4 */
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SFF_8436_TX_CH1_MSB = 42, /* Internally measured TX bias */
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SFF_8436_TX_CH1_LSB = 43, /* for channel 1 */
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SFF_8436_TX_CH2_MSB = 44, /* Internally measured TX bias */
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SFF_8436_TX_CH2_LSB = 45, /* for channel 2 */
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SFF_8436_TX_CH3_MSB = 46, /* Internally measured TX bias */
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SFF_8436_TX_CH3_LSB = 47, /* for channel 3 */
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SFF_8436_TX_CH4_MSB = 48, /* Internally measured TX bias */
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SFF_8436_TX_CH4_LSB = 49, /* for channel 4 */
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SFF_8436_CHANMON_END = 81,
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SFF_8436_CONTROL_START = 86, /* Control (Table 24) */
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SFF_8436_CONTROL_END = 97,
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SFF_8436_MASKS_START = 100, /* Module/channel masks (Table 25) */
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SFF_8436_MASKS_END = 106,
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SFF_8436_CHPASSWORD = 119, /* Password change entry (4 bytes) */
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SFF_8436_PASSWORD = 123, /* Password entry area (4 bytes) */
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SFF_8436_PAGESEL = 127, /* Page select byte */
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};
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/* Table 18 - Status Indicators bits */
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/* Byte 1: all bits reserved */
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/* Byte 2 bits */
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#define SFF_8436_STATUS_FLATMEM (1 << 2) /* Upper memory flat or paged
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* 0 = paging, 1=Page 0 only */
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#define SFF_8436_STATUS_INTL (1 << 1) /* Digital state of the intL
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* Interrupt output pin */
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#define SFF_8436_STATUS_NOTREADY 1 /* Module has not yet achieved
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* power up and memory data is not
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* ready. 0=data is ready */
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/*
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* Upper page 0 definitions:
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* Table 29 - Serial ID: Data fields.
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*
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* Note that this table is mostly the same as used in SFF-8472.
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* The only differenee is address shift: +128 bytes.
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*/
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enum {
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SFF_8436_ID = 128, /* Module Type (defined in sff8472.h) */
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SFF_8436_EXT_ID = 129, /* Extended transceiver type
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* (Table 31) */
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SFF_8436_CONNECTOR = 130, /* Connector type (Table 32) */
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SFF_8436_TRANS_START = 131, /* Electric or Optical Compatibility
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* (Table 33) */
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SFF_8436_CODE_E1040G = 131, /* 10/40G Ethernet Compliance Code */
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SFF_8436_CODE_SONET = 132, /* SONET Compliance codes */
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SFF_8436_CODE_SATA = 133, /* SAS/SATA compliance codes */
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SFF_8436_CODE_E1G = 134, /* Gigabit Ethernet Compliant codes */
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SFF_8436_CODE_FC_START = 135, /* FC link/media/speed */
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SFF_8436_CODE_FC_END = 138,
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SFF_8436_TRANS_END = 138,
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SFF_8436_ENCODING = 139, /* Encoding Code for high speed
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* serial encoding algorithm (see
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* Table 34) */
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SFF_8436_BITRATE = 140, /* Nominal signaling rate, units
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* of 100MBd. */
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SFF_8436_RATEID = 141, /* Extended RateSelect Compliance
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* (see Table 35) */
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SFF_8436_LEN_SMF_KM = 142, /* Link length supported for single
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* mode fiber, units of km */
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SFF_8436_LEN_OM3 = 143, /* Link length supported for 850nm
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* 50um multimode fiber, units of 2 m */
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SFF_8436_LEN_OM2 = 144, /* Link length supported for 50 um
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* OM2 fiber, units of 1 m */
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SFF_8436_LEN_OM1 = 145, /* Link length supported for 1310 nm
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* 50um multi-mode fiber, units of 1m*/
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SFF_8436_LEN_ASM = 144, /* Link length of passive cable assembly
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* Length is specified as in the INF
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* 8074, units of 1m. 0 means this is
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* not value assembly. Value of 255
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* means thet the Module supports length
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* greater than 254 m. */
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SFF_8436_DEV_TECH = 147, /* Device/transmitter technology,
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* see Table 36/37 */
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SFF_8436_VENDOR_START = 148, /* Vendor name, 16 bytes, padded
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* right with 0x20 */
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SFF_8436_VENDOR_END = 163,
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SFF_8436_EXTMODCODE = 164, /* Extended module code, Table 164 */
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SFF_8436_VENDOR_OUI_START = 165 , /* Vendor OUI SFP vendor IEEE
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* company ID */
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SFF_8436_VENDOR_OUI_END = 167,
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SFF_8436_PN_START = 168, /* Vendor PN, padded right with 0x20 */
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SFF_8436_PN_END = 183,
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SFF_8436_REV_START = 184, /* Vendor Revision, padded right 0x20 */
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SFF_8436_REV_END = 185,
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SFF_8436_WAVELEN_START = 186, /* Wavelength Laser wavelength
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* (Passive/Active Cable
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* Specification Compliance) */
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SFF_8436_WAVELEN_END = 189,
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SFF_8436_MAX_CASE_TEMP = 190, /* Allows to specify maximum temp
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* above 70C. Maximum case temperature is
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* an 8-bit value in Degrees C. A value
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*of 0 implies the standard 70C rating.*/
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SFF_8436_CC_BASE = 191, /* CC_BASE Check code for Base ID
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* Fields (first 63 bytes) */
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/* Extended ID fields */
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SFF_8436_OPTIONS_START = 192, /* Options Indicates which optional
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* transceiver signals are
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* implemented (see Table 39) */
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SFF_8436_OPTIONS_END = 195,
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SFF_8436_SN_START = 196, /* Vendor SN, riwght padded with 0x20 */
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SFF_8436_SN_END = 211,
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SFF_8436_DATE_START = 212, /* Vendor’s manufacturing date code
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* (see Table 40) */
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SFF_8436_DATE_END = 219,
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SFF_8436_DIAG_TYPE = 220, /* Diagnostic Monitoring Type
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* Indicates which type of
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* diagnostic monitoring is
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* implemented (if any) in the
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* transceiver (see Table 41) */
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SFF_8436_ENHANCED = 221, /* Enhanced Options Indicates which
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* optional features are implemented
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* (if any) in the transceiver
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* (see Table 42) */
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SFF_8436_CC_EXT = 222, /* Check code for the Extended ID
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* Fields (bytes 192-222 incl) */
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SFF_8436_VENDOR_RSRVD_START = 224,
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SFF_8436_VENDOR_RSRVD_END = 255,
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};
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