265 lines
6.0 KiB
C
265 lines
6.0 KiB
C
/*
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* Mach Operating System
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* Copyright (c) 1991,1990,1989 Carnegie Mellon University
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
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* ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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Copyright 1988, 1989 by Olivetti Advanced Technology Center, Inc.,
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Cupertino, California.
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All Rights Reserved
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Permission to use, copy, modify, and distribute this software and
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its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appears in all
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copies and that both the copyright notice and this permission notice
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appear in supporting documentation, and that the name of Olivetti
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not be used in advertising or publicity pertaining to distribution
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of the software without specific, written prior permission.
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OLIVETTI DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS,
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IN NO EVENT SHALL OLIVETTI BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUR OF OR IN CONNECTION
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WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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/*
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* Defines for managing the status word of the 82586 cpu. For details see
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* the Intel LAN Component User's Manual starting at p. 2-14.
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*
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*/
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#define SCB_SW_INT 0xf000
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#define SCB_SW_CX 0x8000 /* CU finished w/ int. bit set */
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#define SCB_SW_FR 0x4000 /* RU finished receiving a frame */
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#define SCB_SW_CNA 0x2000 /* CU left active state */
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#define SCB_SW_RNR 0x1000 /* RU left ready state */
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/*
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* Defines for managing the Command Unit Status portion of the 82586
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* System Control Block.
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*
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*/
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#define SCB_CUS_IDLE 0x0000
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#define SCB_CUS_SUSPND 0x0100
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#define SCB_CUS_ACTV 0x0200
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/*
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* Defines for managing the Receive Unit Status portion of the System
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* Control Block.
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*
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*/
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#define SCB_RUS_IDLE 0x0000
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#define SCB_RUS_SUSPND 0x0010
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#define SCB_RUS_NORESRC 0x0020
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#define SCB_RUS_READY 0x0040
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/*
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* Defines that manage portions of the Command Word in the System Control
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* Block of the 82586. Below are the Interrupt Acknowledge Bits and their
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* appropriate masks.
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*
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*/
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#define SCB_ACK_CX 0x8000
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#define SCB_ACK_FR 0x4000
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#define SCB_ACK_CNA 0x2000
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#define SCB_ACK_RNR 0x1000
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/*
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* Defines for managing the Command Unit Control word, and the Receive
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* Unit Control word. The software RESET bit is also defined.
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*
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*/
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#define SCB_CU_STRT 0x0100
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#define SCB_CU_RSUM 0x0200
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#define SCB_CU_SUSPND 0x0300
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#define SCB_CU_ABRT 0x0400
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#define SCB_RESET 0x0080
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#define SCB_RU_STRT 0x0010
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#define SCB_RU_RSUM 0x0020
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#define SCB_RU_SUSPND 0x0030
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#define SCB_RU_ABRT 0x0040
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/*
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* The following define Action Commands for the 82586 chip.
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*
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*/
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#define AC_NOP 0x00
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#define AC_IASETUP 0x01
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#define AC_CONFIGURE 0x02
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#define AC_MCSETUP 0x03
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#define AC_TRANSMIT 0x04
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#define AC_TDR 0x05
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#define AC_DUMP 0x06
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#define AC_DIAGNOSE 0x07
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/*
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* Defines for General Format for Action Commands, both Status Words, and
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* Command Words.
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*
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*/
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#define AC_SW_C 0x8000
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#define AC_SW_B 0x4000
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#define AC_SW_OK 0x2000
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#define AC_SW_A 0x1000
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#define TC_CARRIER 0x0400
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#define TC_CLS 0x0200
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#define TC_DMA 0x0100
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#define TC_DEFER 0x0080
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#define TC_SQE 0x0040
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#define TC_COLLISION 0x0020
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#define AC_CW_EL 0x8000
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#define AC_CW_S 0x4000
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#define AC_CW_I 0x2000
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/*
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* Specific defines for the transmit action command.
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*
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*/
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#define TBD_SW_EOF 0x8000
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#define TBD_SW_COUNT 0x3fff
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/*
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* Specific defines for the receive frame actions.
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*
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*/
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#define RBD_SW_EOF 0x8000
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#define RBD_SW_COUNT 0x3fff
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#define RFD_DONE 0x8000
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#define RFD_BUSY 0x4000
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#define RFD_OK 0x2000
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#define RFD_CRC 0x0800
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#define RFD_ALN 0x0400
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#define RFD_RSC 0x0200
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#define RFD_DMA 0x0100
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#define RFD_SHORT 0x0080
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#define RFD_EOF 0x0040
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#define RFD_EL 0x8000
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#define RFD_SUSP 0x4000
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/*
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* 82586 chip specific structure definitions. For details, see the Intel
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* LAN Components manual.
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*
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*/
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typedef struct {
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u_short scp_sysbus;
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u_short scp_unused[2];
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u_short scp_iscp;
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u_short scp_iscp_base;
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} scp_t;
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typedef struct {
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u_short iscp_busy;
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u_short iscp_scb_offset;
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u_short iscp_scb;
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u_short iscp_scb_base;
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} iscp_t;
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typedef struct {
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u_short scb_status;
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u_short scb_command;
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u_short scb_cbl_offset;
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u_short scb_rfa_offset;
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u_short scb_crcerrs;
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u_short scb_alnerrs;
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u_short scb_rscerrs;
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u_short scb_ovrnerrs;
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} scb_t;
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typedef struct {
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u_short tbd_offset;
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u_char dest_addr[6];
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u_short length;
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} transmit_t;
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typedef struct {
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u_short fifolim_bytecnt;
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u_short addrlen_mode;
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u_short linprio_interframe;
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u_short slot_time;
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u_short hardware;
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u_short min_frame_len;
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} configure_t;
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typedef struct {
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u_short ac_status;
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u_short ac_command;
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u_short ac_link_offset;
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union {
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transmit_t transmit;
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configure_t configure;
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u_char iasetup[6];
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} cmd;
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} ac_t;
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typedef struct {
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u_short act_count;
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u_short next_tbd_offset;
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u_short buffer_addr;
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u_short buffer_base;
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} tbd_t;
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typedef struct {
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u_short status;
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u_short command;
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u_short link_offset;
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u_short rbd_offset;
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u_char destination[6];
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u_char source[6];
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u_short length;
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} fd_t;
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typedef struct {
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u_short status;
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u_short next_rbd_offset;
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u_short buffer_addr;
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u_short buffer_base;
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u_short size;
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} rbd_t;
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