ccbdd9ee59
in most of the atomic operations. Now for these operations, you can
use the normal atomic operation, you can use the operation with a read
barrier, or you can use the operation with a write barrier. The function
names follow the same semantics used in the ia64 instruction set. An
atomic operation with a read barrier has the extra suffix 'acq', due to
it having "acquire" semantics. An atomic operation with a write barrier
has the extra suffix 'rel'. These suffixes are inserted between the
name of the operation to perform and the typename. For example, the
atomic_add_int() function now has 3 variants:
- atomic_add_int() - this is the same as the previous function
- atomic_add_acq_int() - this function combines the add operation with a
read memory barrier
- atomic_add_rel_int() - this function combines the add operation with a
write memory barrier
- Add 'ptr' to the list of types that we can perform atomic operations
on. This allows one to do atomic operations on uintptr_t's. This is
useful in the mutex code, for example, because the actual mutex lock is
a pointer.
- Add two new operations for doing loads and stores with memory barriers.
The new load operations use a read barrier before the load, and the
new store operations use a write barrier after the load. For example,
atomic_load_acq_int() will atomically load an integer as well as
enforcing a read barrier.
362 lines
9.6 KiB
C
362 lines
9.6 KiB
C
/*-
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* Copyright (c) 1998 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _MACHINE_ATOMIC_H_
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#define _MACHINE_ATOMIC_H_
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/*
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* Various simple arithmetic on memory which is atomic in the presence
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* of interrupts and multiple processors.
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*
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* atomic_set_char(P, V) (*(u_char*)(P) |= (V))
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* atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V))
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* atomic_add_char(P, V) (*(u_char*)(P) += (V))
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* atomic_subtract_char(P, V) (*(u_char*)(P) -= (V))
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*
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* atomic_set_short(P, V) (*(u_short*)(P) |= (V))
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* atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V))
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* atomic_add_short(P, V) (*(u_short*)(P) += (V))
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* atomic_subtract_short(P, V) (*(u_short*)(P) -= (V))
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*
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* atomic_set_int(P, V) (*(u_int*)(P) |= (V))
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* atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V))
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* atomic_add_int(P, V) (*(u_int*)(P) += (V))
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* atomic_subtract_int(P, V) (*(u_int*)(P) -= (V))
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* atomic_readandclear_int(P) (return *(u_int*)P; *(u_int*)P = 0;)
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*
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* atomic_set_long(P, V) (*(u_long*)(P) |= (V))
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* atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V))
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* atomic_add_long(P, V) (*(u_long*)(P) += (V))
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* atomic_subtract_long(P, V) (*(u_long*)(P) -= (V))
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* atomic_readandclear_long(P) (return *(u_long*)P; *(u_long*)P = 0;)
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*/
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/*
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* The above functions are expanded inline in the statically-linked
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* kernel. Lock prefixes are generated if an SMP kernel is being
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* built.
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*
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* Kernel modules call real functions which are built into the kernel.
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* This allows kernel modules to be portable between UP and SMP systems.
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*/
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#if defined(KLD_MODULE)
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#define ATOMIC_ASM(NAME, TYPE, OP, V) \
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void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v);
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int atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src);
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#else /* !KLD_MODULE */
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#if defined(SMP)
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#if defined(LOCORE)
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#define MPLOCKED lock ;
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#else
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#define MPLOCKED "lock ; "
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#endif
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#else
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#define MPLOCKED
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#endif
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/*
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* The assembly is volatilized to demark potential before-and-after side
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* effects if an interrupt or SMP collision were to occur.
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*/
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#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 9)
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/* egcs 1.1.2+ version */
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#define ATOMIC_ASM(NAME, TYPE, OP, V) \
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static __inline void \
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atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile(MPLOCKED OP \
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: "=m" (*p) \
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: "0" (*p), "ir" (V)); \
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}
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/*
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* Atomic compare and set, used by the mutex functions
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*
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* if (*dst == exp) *dst = src (all 32 bit words)
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*
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* Returns 0 on failure, non-zero on success
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*/
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#if defined(I386_CPU)
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static __inline int
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atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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{
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int res = exp;
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__asm __volatile(
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" pushfl ; "
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" cli ; "
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" cmpl %1,%3 ; "
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" jne 1f ; "
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" movl %2,%3 ; "
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"1: "
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" sete %%al; "
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" movzbl %%al,%0 ; "
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" popfl ; "
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"# atomic_cmpset_int"
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: "=a" (res) /* 0 (result) */
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: "0" (exp), /* 1 */
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"r" (src), /* 2 */
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"m" (*(dst)) /* 3 */
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: "memory");
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return (res);
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}
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#else /* defined(I386_CPU) */
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static __inline int
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atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
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{
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int res = exp;
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__asm __volatile (
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" " MPLOCKED " "
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" cmpxchgl %2,%3 ; "
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" setz %%al ; "
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" movzbl %%al,%0 ; "
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"1: "
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"# atomic_cmpset_int"
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: "=a" (res) /* 0 (result) */
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: "0" (exp), /* 1 */
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"r" (src), /* 2 */
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"m" (*(dst)) /* 3 */
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: "memory");
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return (res);
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}
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#endif /* defined(I386_CPU) */
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#define atomic_cmpset_acq_int atomic_cmpset_int
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#define atomic_cmpset_rel_int atomic_cmpset_int
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#else
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/* gcc <= 2.8 version */
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#define ATOMIC_ASM(NAME, TYPE, OP, V) \
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static __inline void \
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atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile(MPLOCKED OP \
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: "=m" (*p) \
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: "ir" (V)); \
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} \
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\
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#endif
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#endif /* KLD_MODULE */
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#if __GNUC__ > 2 || (__GNUC__ == 2 && __GNUC_MINOR__ > 9)
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/* egcs 1.1.2+ version */
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ATOMIC_ASM(set, char, "orb %b2,%0", v)
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ATOMIC_ASM(clear, char, "andb %b2,%0", ~v)
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ATOMIC_ASM(add, char, "addb %b2,%0", v)
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ATOMIC_ASM(subtract, char, "subb %b2,%0", v)
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ATOMIC_ASM(set, short, "orw %w2,%0", v)
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ATOMIC_ASM(clear, short, "andw %w2,%0", ~v)
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ATOMIC_ASM(add, short, "addw %w2,%0", v)
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ATOMIC_ASM(subtract, short, "subw %w2,%0", v)
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ATOMIC_ASM(set, int, "orl %2,%0", v)
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ATOMIC_ASM(clear, int, "andl %2,%0", ~v)
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ATOMIC_ASM(add, int, "addl %2,%0", v)
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ATOMIC_ASM(subtract, int, "subl %2,%0", v)
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ATOMIC_ASM(set, long, "orl %2,%0", v)
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ATOMIC_ASM(clear, long, "andl %2,%0", ~v)
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ATOMIC_ASM(add, long, "addl %2,%0", v)
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ATOMIC_ASM(subtract, long, "subl %2,%0", v)
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#else
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/* gcc <= 2.8 version */
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ATOMIC_ASM(set, char, "orb %1,%0", v)
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ATOMIC_ASM(clear, char, "andb %1,%0", ~v)
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ATOMIC_ASM(add, char, "addb %1,%0", v)
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ATOMIC_ASM(subtract, char, "subb %1,%0", v)
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ATOMIC_ASM(set, short, "orw %1,%0", v)
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ATOMIC_ASM(clear, short, "andw %1,%0", ~v)
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ATOMIC_ASM(add, short, "addw %1,%0", v)
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ATOMIC_ASM(subtract, short, "subw %1,%0", v)
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ATOMIC_ASM(set, int, "orl %1,%0", v)
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ATOMIC_ASM(clear, int, "andl %1,%0", ~v)
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ATOMIC_ASM(add, int, "addl %1,%0", v)
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ATOMIC_ASM(subtract, int, "subl %1,%0", v)
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ATOMIC_ASM(set, long, "orl %1,%0", v)
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ATOMIC_ASM(clear, long, "andl %1,%0", ~v)
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ATOMIC_ASM(add, long, "addl %1,%0", v)
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ATOMIC_ASM(subtract, long, "subl %1,%0", v)
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#endif
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#undef ATOMIC_ASM
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#ifndef WANT_FUNCTIONS
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#define ATOMIC_ACQ_REL(NAME, TYPE) \
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static __inline void \
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atomic_##NAME##_acq_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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__asm __volatile("lock; addl $0,0(%esp)" : : : "memory");\
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atomic_##NAME##_##TYPE(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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atomic_##NAME##_##TYPE(p, v); \
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}
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ATOMIC_ACQ_REL(set, char)
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ATOMIC_ACQ_REL(clear, char)
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ATOMIC_ACQ_REL(add, char)
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ATOMIC_ACQ_REL(subtract, char)
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ATOMIC_ACQ_REL(set, short)
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ATOMIC_ACQ_REL(clear, short)
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ATOMIC_ACQ_REL(add, short)
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ATOMIC_ACQ_REL(subtract, short)
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ATOMIC_ACQ_REL(set, int)
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ATOMIC_ACQ_REL(clear, int)
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ATOMIC_ACQ_REL(add, int)
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ATOMIC_ACQ_REL(subtract, int)
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ATOMIC_ACQ_REL(set, long)
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ATOMIC_ACQ_REL(clear, long)
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ATOMIC_ACQ_REL(add, long)
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ATOMIC_ACQ_REL(subtract, long)
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#undef ATOMIC_ACQ_REL
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/*
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* We assume that a = b will do atomic loads and stores.
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*/
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#define ATOMIC_STORE_LOAD(TYPE) \
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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__asm __volatile("lock; addl $0,0(%esp)" : : : "memory");\
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return (*p); \
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} \
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\
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\
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{ \
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*p = v; \
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__asm __volatile("" : : : "memory"); \
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}
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ATOMIC_STORE_LOAD(char)
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ATOMIC_STORE_LOAD(short)
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ATOMIC_STORE_LOAD(int)
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ATOMIC_STORE_LOAD(long)
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#undef ATOMIC_STORE_LOAD
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static __inline int
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atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
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{
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return (
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atomic_cmpset_int((volatile u_int *)dst, (u_int)exp, (u_int)src));
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}
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#define atomic_cmpset_acq_ptr atomic_cmpset_ptr
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#define atomic_cmpset_rel_ptr atomic_cmpset_ptr
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static __inline void *
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atomic_load_acq_ptr(volatile void *p)
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{
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return (void *)atomic_load_acq_int((volatile u_int *)p);
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}
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static __inline void
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atomic_store_rel_ptr(volatile void *p, void *v)
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{
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atomic_store_rel_int((volatile u_int *)p, (u_int)v);
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}
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#define ATOMIC_PTR(NAME) \
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static __inline void \
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atomic_##NAME##_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_int((volatile u_int *)p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_acq_int((volatile u_int *)p, v);\
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_ptr(volatile void *p, uintptr_t v) \
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{ \
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atomic_##NAME##_rel_int((volatile u_int *)p, v);\
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}
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ATOMIC_PTR(set)
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ATOMIC_PTR(clear)
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ATOMIC_PTR(add)
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ATOMIC_PTR(subtract)
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#undef ATOMIC_PTR
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static __inline u_int
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atomic_readandclear_int(volatile u_int *addr)
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{
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u_int result;
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__asm __volatile (
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" xorl %0,%0 ; "
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" xchgl %1,%0 ; "
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"# atomic_readandclear_int"
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: "=&r" (result) /* 0 (result) */
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: "m" (*addr)); /* 1 (addr) */
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return (result);
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}
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static __inline u_long
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atomic_readandclear_long(volatile u_long *addr)
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{
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u_long result;
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__asm __volatile (
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" xorl %0,%0 ; "
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" xchgl %1,%0 ; "
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"# atomic_readandclear_int"
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: "=&r" (result) /* 0 (result) */
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: "m" (*addr)); /* 1 (addr) */
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return (result);
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}
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#endif
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#endif /* ! _MACHINE_ATOMIC_H_ */
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