cd4c8d64ff
* Update the hardware access register definitions and functions to bring them in line with other Netlogic software. * Update the platform bus to use PCI even for on-chip devices. Add a dummy PCI driver to ignore on-chip devices which do not need driver. * Provide memory and IRQ resource allocation code for on-chip devices which cannot get it from PCI config. * add support for on-chip PCI and USB interfaces. * update conf files, enable pci and retain old MAXCPU until we can support >32 cpus. Approved by: re(kib), jmallett
254 lines
6.1 KiB
C
254 lines
6.1 KiB
C
/*-
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* Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
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* reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* NETLOGIC_BSD */
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/kernel.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/cpuinfo.h>
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#include <machine/cpuregs.h>
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#include <machine/frame.h>
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#include <machine/intr_machdep.h>
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#include <machine/md_var.h>
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#include <machine/trap.h>
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#include <machine/hwfunc.h>
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#include <mips/nlm/hal/haldefs.h>
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#include <mips/nlm/hal/iomap.h>
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#include <mips/nlm/hal/mips-extns.h>
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#include <mips/nlm/interrupt.h>
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#include <mips/nlm/hal/pic.h>
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#include <mips/nlm/xlp.h>
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struct xlp_intrsrc {
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void (*busack)(int); /* Additional ack */
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struct intr_event *ie; /* event corresponding to intr */
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int irq;
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};
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static struct xlp_intrsrc xlp_interrupts[XLR_MAX_INTR];
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static mips_intrcnt_t mips_intr_counters[XLR_MAX_INTR];
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static int intrcnt_index;
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void
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xlp_enable_irq(int irq)
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{
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uint64_t eimr;
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eimr = nlm_read_c0_eimr();
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nlm_write_c0_eimr(eimr | (1ULL << irq));
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}
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void
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cpu_establish_softintr(const char *name, driver_filter_t * filt,
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void (*handler) (void *), void *arg, int irq, int flags,
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void **cookiep)
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{
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panic("Soft interrupts unsupported!\n");
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}
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void
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cpu_establish_hardintr(const char *name, driver_filter_t * filt,
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void (*handler) (void *), void *arg, int irq, int flags,
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void **cookiep)
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{
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xlp_establish_intr(name, filt, handler, arg, irq, flags,
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cookiep, NULL);
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}
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static void
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xlp_post_filter(void *source)
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{
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struct xlp_intrsrc *src = source;
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if (src->busack)
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src->busack(src->irq);
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nlm_pic_ack(xlp_pic_base, xlp_irq_to_irt(src->irq));
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}
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static void
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xlp_pre_ithread(void *source)
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{
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struct xlp_intrsrc *src = source;
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if (src->busack)
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src->busack(src->irq);
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}
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static void
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xlp_post_ithread(void *source)
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{
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struct xlp_intrsrc *src = source;
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nlm_pic_ack(xlp_pic_base, xlp_irq_to_irt(src->irq));
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}
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void
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xlp_establish_intr(const char *name, driver_filter_t filt,
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driver_intr_t handler, void *arg, int irq, int flags,
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void **cookiep, void (*busack)(int))
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{
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struct intr_event *ie; /* descriptor for the IRQ */
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struct xlp_intrsrc *src = NULL;
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int errcode;
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if (irq < 0 || irq > XLR_MAX_INTR)
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panic("%s called for unknown hard intr %d", __func__, irq);
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/*
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* FIXME locking - not needed now, because we do this only on
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* startup from CPU0
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*/
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src = &xlp_interrupts[irq];
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ie = src->ie;
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if (ie == NULL) {
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/*
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* PIC based interrupts need ack in PIC, and some SoC
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* components need additional acks (e.g. PCI)
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*/
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if (xlp_irq_is_picintr(irq))
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errcode = intr_event_create(&ie, src, 0, irq,
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xlp_pre_ithread, xlp_post_ithread, xlp_post_filter,
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NULL, "hard intr%d:", irq);
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else {
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if (filt == NULL)
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panic("Not supported - non filter percpu intr");
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errcode = intr_event_create(&ie, src, 0, irq,
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NULL, NULL, NULL, NULL, "hard intr%d:", irq);
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}
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if (errcode) {
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printf("Could not create event for intr %d\n", irq);
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return;
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}
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src->irq = irq;
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src->busack = busack;
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src->ie = ie;
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}
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intr_event_add_handler(ie, name, filt, handler, arg,
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intr_priority(flags), flags, cookiep);
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xlp_enable_irq(irq);
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}
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void
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cpu_intr(struct trapframe *tf)
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{
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struct intr_event *ie;
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uint64_t eirr, eimr;
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int i;
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critical_enter();
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/* find a list of enabled interrupts */
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eirr = nlm_read_c0_eirr();
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eimr = nlm_read_c0_eimr();
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eirr &= eimr;
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if (eirr == 0) {
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critical_exit();
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return;
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}
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/*
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* No need to clear the EIRR here as the handler writes to
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* compare which ACKs the interrupt.
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*/
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if (eirr & (1 << IRQ_TIMER)) {
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intr_event_handle(xlp_interrupts[IRQ_TIMER].ie, tf);
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critical_exit();
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return;
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}
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/* FIXME sched pin >? LOCK>? */
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for (i = sizeof(eirr) * 8 - 1; i >= 0; i--) {
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if ((eirr & (1ULL << i)) == 0)
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continue;
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ie = xlp_interrupts[i].ie;
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/* Don't account special IRQs */
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switch (i) {
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case IRQ_IPI:
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case IRQ_MSGRING:
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break;
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default:
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mips_intrcnt_inc(mips_intr_counters[i]);
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}
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/* Ack the IRQ on the CPU */
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nlm_write_c0_eirr(1ULL << i);
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if (intr_event_handle(ie, tf) != 0) {
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printf("stray interrupt %d\n", i);
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}
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}
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critical_exit();
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}
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void
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mips_intrcnt_setname(mips_intrcnt_t counter, const char *name)
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{
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int idx = counter - intrcnt;
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KASSERT(counter != NULL, ("mips_intrcnt_setname: NULL counter"));
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snprintf(intrnames + (MAXCOMLEN + 1) * idx,
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MAXCOMLEN + 1, "%-*s", MAXCOMLEN, name);
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}
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mips_intrcnt_t
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mips_intrcnt_create(const char* name)
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{
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mips_intrcnt_t counter = &intrcnt[intrcnt_index++];
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mips_intrcnt_setname(counter, name);
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return counter;
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}
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void
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cpu_init_interrupts()
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{
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int i;
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char name[MAXCOMLEN + 1];
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/*
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* Initialize all available vectors so spare IRQ
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* would show up in systat output
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*/
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for (i = 0; i < XLR_MAX_INTR; i++) {
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snprintf(name, MAXCOMLEN + 1, "int%d:", i);
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mips_intr_counters[i] = mips_intrcnt_create(name);
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}
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}
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